Re: [Qemu-devel] [V3 PATCH 05/14] target-ppc: Add ISA 2.06 divwe[u][o] Instructions

2013-12-24 Thread Richard Henderson
On 12/18/2013 12:48 PM, Tom Musta wrote: +tcg_gen_div_i64(cpu_gpr[rD(ctx-opcode)], ra, rb); \ +tmp0 = tcg_temp_local_new(); \ +/* does the result fit in 32 bits? */ \ +

[Qemu-devel] [V3 PATCH 05/14] target-ppc: Add ISA 2.06 divwe[u][o] Instructions

2013-12-18 Thread Tom Musta
This patch addes the Signed and Unsigned Divide Word Extended instructions which were introduced in Power ISA 2.06. V2: Eliminating extraneous code in the overflow case per comments from Richard Henderson. Fixed corner case bug in divweu (check for (RA) = (RB)). Signed-off-by: Tom Musta