Hi Laszlo
Below is my thought.
2) You are right. According to IA32 manual - Maskable hardware interrupts,
exceptions, NMI interrupts, SMI interrupts, A20M interrupts, single-step traps,
breakpoint traps, and INIT operations are inhibited when the processor enters
SMM. You can also find more
On 24/04/2015 13:56, Yao, Jiewen wrote:
BTW: I am not sure how QEMU emulate SMI. Does SMI can be trigger by
0xB2 port? And CPU will run to SMBASE in real mode?
Yes, operation is the same.
Paolo
Got it. Thanks!
-Original Message-
From: Paolo Bonzini [mailto:pbonz...@redhat.com]
Sent: Friday, April 24, 2015 9:01 PM
To: Yao, Jiewen; edk2-de...@lists.sourceforge.net; Gerd Hoffmann
Cc: qemu-devel@nongnu.org; m...@redhat.com
Subject: Re: [edk2] implementing
Hi Laszlo
I think there is good resource for your reference - Intel Quark.
https://downloadcenter.intel.com/download/23197
You may download Board_Support_Package_Sources_for_Intel_Quark_v1.1.0.7z, and
find Quark_EDKII_v1.1.0
IA32FamilyCpuBasePkg\PiSmmCpuDxeSmm - it is CPUSMM driver.
On 04/24/15 16:50, Yao, Jiewen wrote:
Hi Laszlo
I think there is good resource for your reference - Intel Quark.
https://downloadcenter.intel.com/download/23197
You may download Board_Support_Package_Sources_for_Intel_Quark_v1.1.0.7z,
and find Quark_EDKII_v1.1.0
