On Mon, Sep 12, 2016 at 01:08:05PM +0300, David Kiarie wrote:
[...]
> @@ -2252,14 +2250,17 @@ static MemTxResult vtd_mem_ir_write(void *opaque,
> hwaddr addr,
> {
> int ret = 0;
> MSIMessage from = {}, to = {};
> -uint16_t sid = X86_IOMMU_SID_INVALID;
> +VTDAddressSpace *as =
On Mon, Sep 12, 2016 at 01:08:05PM +0300, David Kiarie wrote:
> Platform devices are now able to make interrupt request with
> explicit SIDs hence we can safely expect triggered AddressSpace ID
> to match the requesting ID
>
> Signed-off-by: David Kiarie
> ---
>
On Mon, Sep 12, 2016 at 2:09 PM, Peter Xu wrote:
> On Mon, Sep 12, 2016 at 01:08:05PM +0300, David Kiarie wrote:
>
> [...]
>
> > @@ -2252,14 +2250,17 @@ static MemTxResult vtd_mem_ir_write(void
> *opaque, hwaddr addr,
> > {
> > int ret = 0;
> > MSIMessage from = {},
Platform devices are now able to make interrupt request with
explicit SIDs hence we can safely expect triggered AddressSpace ID
to match the requesting ID
Signed-off-by: David Kiarie
---
hw/i386/intel_iommu.c | 77 ++-
1