Hi Petar,
@@ -4214,7 +4215,17 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
//gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */
rn = ContextConfig;
+goto die;
//break;
+case 2:
+
Am 29.05.2014 19:36, schrieb Petar Jovanovic:
From: Petar Jovanovic petar.jovano...@imgtec.com
From MIPS documentation (Volume III):
UserLocal Register (CP0 Register 4, Select 2)
Compliance Level: Recommended.
The UserLocal register is a read-write register that is not interpreted by
-devel] [v4 PATCH] target-mips: implement UserLocal Register
Hi Petar,
@@ -4214,7 +4215,17 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
//gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */
rn = ContextConfig
18, 2014 5:21 PM
To: Petar Jovanovic; qemu-devel@nongnu.org
Cc: r...@twiddle.net; Petar Jovanovic; aurel...@aurel32.net
Subject: Re: [Qemu-devel] [v4 PATCH] target-mips: implement UserLocal Register
Am 29.05.2014 19:36, schrieb Petar Jovanovic:
From: Petar Jovanovic petar.jovano...@imgtec.com
ping
http://patchwork.ozlabs.org/patch/353815/
From: Aurelien Jarno [aurel...@aurel32.net]
Sent: Friday, May 30, 2014 10:02 AM
To: Petar Jovanovic
Cc: qemu-devel@nongnu.org; Petar Jovanovic; afaer...@suse.de; r...@twiddle.net
Subject: Re: [v4 PATCH]
On Thu, May 29, 2014 at 07:36:53PM +0200, Petar Jovanovic wrote:
From: Petar Jovanovic petar.jovano...@imgtec.com
From MIPS documentation (Volume III):
UserLocal Register (CP0 Register 4, Select 2)
Compliance Level: Recommended.
The UserLocal register is a read-write register that is
From: Petar Jovanovic petar.jovano...@imgtec.com
From MIPS documentation (Volume III):
UserLocal Register (CP0 Register 4, Select 2)
Compliance Level: Recommended.
The UserLocal register is a read-write register that is not interpreted by
the hardware and conditionally readable via the RDHWR
