On 12 September 2017 at 08:49, Ramy Sameh wrote:
> Hello Peter,
>
> Any suggestions regarding this topic ?
No, I think at this point you're into the stuff that
you need to think about yourself, ie what exactly
you want fault injection to do.
PS: your emails would be
Hello Peter,
Any suggestions regarding this topic ?
On Sun, Sep 10, 2017 at 8:33 PM, Ramy Sameh wrote:
> Thanks Peter.
>
> I have made a program to read a string from the UART, then write it again
> to the UART.
> I made a function to manipulate values in the pl011
Thanks Peter.
I have made a program to read a string from the UART, then write it again
to the UART.
I made a function to manipulate values in the pl011 registers (bit flipping
the flags inside the registers).
The target is to simulate hardware fault injection.
For each run of the program, I
On 6 September 2017 at 13:12, Ramy Sameh wrote:
> Do the emulated baud rate registers have any effect? (I think they would
> have no effect, because there is no real clock that can be used to produce
> the baud rate).
No, they don't have any effect. (In this UART model we
Hello Peter,
I have one more simple question please.
Do the emulated baud rate registers have any effect? (I think they would
have no effect, because there is no real clock that can be used to produce
the baud rate).
On Tue, Sep 5, 2017 at 8:50 PM, Ramy Sameh wrote:
>
Thank you very much Peter.
I will check the documentation for VersatilePB and ARM926EJ-S for more
understanding of interrupts handling.
On Tue, Sep 5, 2017 at 8:06 PM, Peter Maydell
wrote:
> On 5 September 2017 at 18:56, Ramy Sameh wrote:
> >
On 5 September 2017 at 18:56, Ramy Sameh wrote:
> Are there any documentation or source of information, that can describe how
> interrupts are implemented, and how to use them (where is the vector table
> to put the ISR ... etc) ?
The source code is it.
Note that the
Thanks Peter for your help.
Are there any documentation or source of information, that can describe how
interrupts are implemented, and how to use them (where is the vector table
to put the ISR ... etc) ?
In addition, any source of info that describes the code workflow when
reading or writing to
On 4 September 2017 at 01:27, Ramy Sameh wrote:
> *My 2 questions are:*
>
> *First:*
> Are interrupts activated in the emulated pl011 ?
> I mean, if I enabled the interrupt bits for UARTTXINTR, will this trigger
> an interrupt when the FIFO reaches a certain level?
Yes, we
Hello all,
I have 2 problems regarding UART (pl011) in the emulated board VersatilePB.
(I am using *QEMU version 2.8.1.*)
*My main goal is*:
Disturbing the UART registers (such UARTCR, UARTLCR_H ... etc) in order to
simulate hardware faults (which can make bit flips in the hardware
registers
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