On Wed, Nov 17, 2010 at 11:03:14AM +0900, Isaku Yamahata wrote:
On Tue, Nov 16, 2010 at 12:50:19PM +0200, Michael S. Tsirkin wrote:
On Tue, Nov 16, 2010 at 05:26:05PM +0900, Isaku Yamahata wrote:
This patch cleans up command register initialization with
comments. It also fixes the
On Wed, Nov 17, 2010 at 02:02:00PM +0200, Michael S. Tsirkin wrote:
Another bug is that migrating from qemu where a bit is writeable to one
where it's RO creates a situation where a RW bit becomes RO, or the
reverse, which might confuse guests. So we will need a compatibility
flag and
On Thu, Nov 18, 2010 at 11:08:40AM +0900, Isaku Yamahata wrote:
On Wed, Nov 17, 2010 at 02:02:00PM +0200, Michael S. Tsirkin wrote:
Another bug is that migrating from qemu where a bit is writeable to one
where it's RO creates a situation where a RW bit becomes RO, or the
reverse,
On Tue, Nov 16, 2010 at 05:26:05PM +0900, Isaku Yamahata wrote:
This patch cleans up command register initialization with
comments. It also fixes the initialization of io/memory bit of command
register.
Those bits for type 1 device is RW.
Those bits for type 0 device is
RO = 0 if it has
On Tue, Nov 16, 2010 at 12:50:19PM +0200, Michael S. Tsirkin wrote:
On Tue, Nov 16, 2010 at 05:26:05PM +0900, Isaku Yamahata wrote:
This patch cleans up command register initialization with
comments. It also fixes the initialization of io/memory bit of command
register.
Those bits for
