Re: [RFC PATCH v2 17/30] hw/loongarch: Add LoongArch cpu interrupt support(CPUINTC)

2021-11-11 Thread Mark Cave-Ayland
On 11/11/2021 01:35, Xiaojuan Yang wrote: Loongson-3A5000 support 14 interrupts from 64 - 77(Timer->75 IPI->76) Loongson-3A5000 and ls7a form a legacy model and extended model irq hierarchy.Tcg mode emulate a simplified extended model which has no Legacy I/O Interrupt Controller(LIOINTC) and

[RFC PATCH v2 17/30] hw/loongarch: Add LoongArch cpu interrupt support(CPUINTC)

2021-11-10 Thread Xiaojuan Yang
Loongson-3A5000 support 14 interrupts from 64 - 77(Timer->75 IPI->76) Loongson-3A5000 and ls7a form a legacy model and extended model irq hierarchy.Tcg mode emulate a simplified extended model which has no Legacy I/O Interrupt Controller(LIOINTC) and LPC. e.g: |+-++-+