>-----Original Message-----
>From: CLEMENT MATHIEU--DRIF <clement.mathieu--d...@eviden.com>
>Subject: [PATCH ats_vtd v1 08/24] pcie: add helper to declare PASID
>capability for a pcie device
>
>Signed-off-by: Clément Mathieu--Drif <clement.mathieu--d...@eviden.com>
>---
> hw/pci/pcie.c | 24 ++++++++++++++++++++++++
> include/hw/pci/pcie.h | 6 +++++-
> include/hw/pci/pcie_regs.h | 3 +++
> 3 files changed, 32 insertions(+), 1 deletion(-)
>
>diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
>index 4b2f0805c6..c8e9d4c0f7 100644
>--- a/hw/pci/pcie.c
>+++ b/hw/pci/pcie.c
>@@ -1177,3 +1177,27 @@ void pcie_acs_reset(PCIDevice *dev)
> pci_set_word(dev->config + dev->exp.acs_cap + PCI_ACS_CTRL, 0);
> }
> }
>+
>+/* PASID */
>+void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width,
>+ bool exec_perm, bool priv_mod)
>+{
>+ assert(pasid_width <= PCI_EXT_CAP_PASID_MAX_WIDTH);
>+ static const uint16_t control_reg_rw_mask = 0x07;
>+ uint16_t capability_reg = pasid_width;
>+
>+ pcie_add_capability(dev, PCI_EXT_CAP_ID_PASID, PCI_PASID_VER, offset,
>+ PCI_EXT_CAP_PASID_SIZEOF);
>+
>+ capability_reg <<= PCI_EXT_CAP_PASID_SIZEOF;
Not understand why PCI_EXT_CAP_PASID_SIZEOF is used for shifting?
>+ capability_reg |= exec_perm ? PCI_PASID_CAP_EXEC : 0;
>+ capability_reg |= priv_mod ? PCI_PASID_CAP_PRIV : 0;
>+ pci_set_word(dev->config + offset + PCI_PASID_CAP, capability_reg);
>+
>+ /* Everything is disabled by default */
>+ pci_set_word(dev->config + offset + PCI_PASID_CTRL, 0);
>+
>+ pci_set_word(dev->wmask + offset + PCI_PASID_CTRL,
>control_reg_rw_mask);
>+
>+ dev->exp.pasid_cap = offset;
>+}
>diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
>index 11f5a91bbb..c59627d556 100644
>--- a/include/hw/pci/pcie.h
>+++ b/include/hw/pci/pcie.h
>@@ -69,8 +69,9 @@ struct PCIExpressDevice {
> uint16_t aer_cap;
> PCIEAERLog aer_log;
>
>- /* Offset of ATS capability in config space */
>+ /* Offset of ATS and PASID capabilities in config space */
> uint16_t ats_cap;
>+ uint16_t pasid_cap;
>
> /* ACS */
> uint16_t acs_cap;
>@@ -147,4 +148,7 @@ void pcie_cap_slot_unplug_cb(HotplugHandler
>*hotplug_dev, DeviceState *dev,
> Error **errp);
> void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp);
>+
>+void pcie_pasid_init(PCIDevice *dev, uint16_t offset, uint8_t pasid_width,
>+ bool exec_perm, bool priv_mod);
> #endif /* QEMU_PCIE_H */
>diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
>index 9d3b6868dc..0a86598f80 100644
>--- a/include/hw/pci/pcie_regs.h
>+++ b/include/hw/pci/pcie_regs.h
>@@ -86,6 +86,9 @@ typedef enum PCIExpLinkWidth {
> #define PCI_ARI_VER 1
> #define PCI_ARI_SIZEOF 8
>
>+/* PASID */
>+#define PCI_PASID_VER 1
>+#define PCI_EXT_CAP_PASID_MAX_WIDTH 20
> /* AER */
> #define PCI_ERR_VER 2
> #define PCI_ERR_SIZEOF 0x48
>--
>2.44.0
