Using a union can better reflect this. Also, it can avoid the convert from 2
32-bits register to 64 bits, like the above code does.
ibex_timer_update_irqs() also does this conversion.
It took me a bit of time, but now I think I understand what you mean: a union
of 2 uint32_t's (perhaps packed in
gt; Huth ; Paolo Bonzini ; Palmer
> Dabbelt ; Laurent Vivier
> Subject: Re: [PATCH v2 3/3] hw/timer: ibex_timer.c: Add support for writes
> to mtime
>
> Hi Eddie,
>
> On Mon, Sep 26, 2022 at 2:06 PM Dong, Eddie <mailto:eddie.d...@intel.com>
> wrote:
>
>
>
From: Tyler Ng
Sent: Monday, September 26, 2022 4:38 PM
To: Dong, Eddie
Cc: open list:RISC-V ; qemu-devel@nongnu.org Developers
; Alistair Francis ; Meng, Bin
; Thomas Huth ; Paolo Bonzini
; Palmer Dabbelt ; Laurent Vivier
Subject: Re: [PATCH v2 3/3] hw/timer: ibex_timer.c: Add support
Hi Eddie,
On Mon, Sep 26, 2022 at 2:06 PM Dong, Eddie wrote:
>
>
> > -Original Message-
> > From: Qemu-devel
> > On Behalf Of Tyler Ng
> > Sent: Thursday, September 22, 2022 8:59 AM
> > To: open list:RISC-V ; qemu-devel@nongnu.org
> > Developers
> > Cc: Alistair Francis ; Meng, Bin
> >
On Thu, Sep 22, 2022 at 2:45 PM Philippe Mathieu-Daudé
wrote:
> On 22/9/22 17:58, Tyler Ng wrote:
> > 1. Adds fields to hold the value of mtime in timer_upper0 and
> timer_lower0.
> >
> > 2. Changes the read and write functions to use the mtime fields.
> >
> > 3. Updates the value of mtime in upd
> -Original Message-
> From: Qemu-devel
> On Behalf Of Tyler Ng
> Sent: Thursday, September 22, 2022 8:59 AM
> To: open list:RISC-V ; qemu-devel@nongnu.org
> Developers
> Cc: Alistair Francis ; Meng, Bin
> ; Thomas Huth ; Paolo
> Bonzini ; Palmer Dabbelt ;
> Laurent Vivier
> Subject: [
On 22/9/22 17:58, Tyler Ng wrote:
1. Adds fields to hold the value of mtime in timer_upper0 and timer_lower0.
2. Changes the read and write functions to use the mtime fields.
3. Updates the value of mtime in update_mtime() by extrapolating the
time elapsed. This will need to change if/when the
