> Hello Jamin,
>
>
> [ ... ]
>
> >> See my aspeed-9.1 branch, I did some changes, mostly in the last patch.
> >>
> >> * aspeed_smc_dma_len()
> >>
> >> - can use QEMU_ALIGN_UP(). simpler.
> >>
> >> * aspeed_smc_dma_rw():
> >>
> >> - dram_addr -> dma_dram_offset
> >> - There is no
Hello Jamin,
[ ... ]
See my aspeed-9.1 branch, I did some changes, mostly in the last patch.
* aspeed_smc_dma_len()
- can use QEMU_ALIGN_UP(). simpler.
* aspeed_smc_dma_rw():
- dram_addr -> dma_dram_offset
- There is no need to protect updates of the R_DMA_DRAM_ADDR_HIGH
Hi Cedric,
>
> Hello Jamin
>
> On 5/15/24 11:01, Jamin Lin wrote:
> > Hi Cedric,
> >
> > Sorry reply you late.
> >> Hello Jamin,
> >>
> >> To handle the DMA DRAM Side Address High register, we should
> >> reintroduce an "dram-base" property which I removed a while ago.
> Something like :
> >>
>
Hello Jamin
On 5/15/24 11:01, Jamin Lin wrote:
Hi Cedric,
Sorry reply you late.
Hello Jamin,
To handle the DMA DRAM Side Address High register, we should reintroduce an
"dram-base" property which I removed a while ago. Something like :
diff --git a/include/hw/ssi/aspeed_smc.h
Hi Cedric,
Sorry reply you late.
> Hello Jamin,
>
> To handle the DMA DRAM Side Address High register, we should reintroduce an
> "dram-base" property which I removed a while ago. Something like :
>
>
>
> diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index
>
; Peter Maydell
> >> ; Andrew Jeffery
> >> ; Joel Stanley ;
> >> Alistair Francis ; Cleber Rosa
> >> ; Philippe Mathieu-Daudé ;
> >> Wainer dos Santos Moschetta ; Beraldo Leal
> >> ; open list:ASPEED BMCs ;
> open
> >> list:All patches CC here
Hello Jamin,
To handle the DMA DRAM Side Address High register, we should reintroduce
an "dram-base" property which I removed a while ago. Something like :
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 7f32e43ff6f3..6d8ef6bc968f 100644
---
Moschetta ; Beraldo Leal
; open list:ASPEED BMCs ; open
list:All patches CC here
Cc: Troy Lee ; Yunlin Tang
Subject: Re: [PATCH v3 08/16] aspeed/smc: support 64 bits dma dram address
On 4/19/24 08:00, Jamin Lin wrote:
Hi Cedric,
Hello Jamin,
On 4/16/24 11:18, Jamin Lin wrote:
AST2700 support
tta ; Beraldo Leal
> ; open list:ASPEED BMCs ; open
> list:All patches CC here
> Cc: Troy Lee ; Yunlin Tang
>
> Subject: Re: [PATCH v3 08/16] aspeed/smc: support 64 bits dma dram address
>
> On 4/19/24 08:00, Jamin Lin wrote:
> > Hi Cedric,
> >>
> >>
On 4/19/24 08:00, Jamin Lin wrote:
Hi Cedric,
Hello Jamin,
On 4/16/24 11:18, Jamin Lin wrote:
AST2700 support the maximum dram size is 8GiB and has a "DMA DRAM
Side
Address High Part(0x7C)"
register to support 64 bits dma dram address.
Add helper routines functions to compute the dma dram
Hi Cedric,
>
> Hello Jamin,
>
> On 4/16/24 11:18, Jamin Lin wrote:
> > AST2700 support the maximum dram size is 8GiB and has a "DMA DRAM
> Side
> > Address High Part(0x7C)"
> > register to support 64 bits dma dram address.
> > Add helper routines functions to compute the dma dram address, new
>
Hello Jamin,
On 4/16/24 11:18, Jamin Lin wrote:
AST2700 support the maximum dram size is 8GiB
and has a "DMA DRAM Side Address High Part(0x7C)"
register to support 64 bits dma dram address.
Add helper routines functions to compute the dma dram
address, new features and update trace-event
to
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