On Fri, 14 May 2021 11:35:57 +0930
"Andrew Jeffery" wrote:
> On Thu, 13 May 2021, at 22:30, Jonathan Cameron wrote:
> > On Thu, 13 May 2021 14:36:27 +0200
> > Philippe Mathieu-Daudé wrote:
> >
> > > On 5/13/21 2:23 PM, Peter Maydell wrote:
> > > > On Thu, 13 May 2021 at 12:49, Jonathan
On Thu, 13 May 2021, at 22:30, Jonathan Cameron wrote:
> On Thu, 13 May 2021 14:36:27 +0200
> Philippe Mathieu-Daudé wrote:
>
> > On 5/13/21 2:23 PM, Peter Maydell wrote:
> > > On Thu, 13 May 2021 at 12:49, Jonathan Cameron
> > > wrote:
> > >> My initial suggestion was to fix this by
On 5/13/21 3:00 PM, Jonathan Cameron wrote:
> On Thu, 13 May 2021 14:36:27 +0200
> Philippe Mathieu-Daudé wrote:
>
>> On 5/13/21 2:23 PM, Peter Maydell wrote:
>>> On Thu, 13 May 2021 at 12:49, Jonathan Cameron
>>> wrote:
My initial suggestion was to fix this by adding the relatively
On Thu, 13 May 2021 14:36:27 +0200
Philippe Mathieu-Daudé wrote:
> On 5/13/21 2:23 PM, Peter Maydell wrote:
> > On Thu, 13 May 2021 at 12:49, Jonathan Cameron
> > wrote:
> >> My initial suggestion was to fix this by adding the relatively
> >> simple code needed in the driver to implement byte
On 5/13/21 2:23 PM, Peter Maydell wrote:
> On Thu, 13 May 2021 at 12:49, Jonathan Cameron
> wrote:
>> My initial suggestion was to fix this by adding the relatively
>> simple code needed in the driver to implement byte read / write,
>> but Ben pointed at the QEMU docs - docs/devel/memory.rst
On Thu, 13 May 2021 at 12:49, Jonathan Cameron
wrote:
> My initial suggestion was to fix this by adding the relatively
> simple code needed in the driver to implement byte read / write,
> but Ben pointed at the QEMU docs - docs/devel/memory.rst which
> says
> "
> .impl.min_access_size,
Hi All,
Cc list is a bit of guess, so please add anyone else who might be interested
in this topic.
This came up in discussion of the CXL emulation series a while back
and I've finally gotten around to looking more closely at it
(having carried a local hack in the meantime).
