On 06/17/16 13:20, Eduardo Habkost wrote:
> On Fri, Jun 17, 2016 at 09:26:57AM +0800, Haozhong Zhang wrote:
> [...]
> > > > static void mce_init(X86CPU *cpu)
> > > > {
> > > > CPUX86State *cenv = &cpu->env;
> > > > unsigned int bank;
> > > > +Error *local_err = NULL;
> > > >
> > >
On Fri, Jun 17, 2016 at 09:26:57AM +0800, Haozhong Zhang wrote:
[...]
> > > static void mce_init(X86CPU *cpu)
> > > {
> > > CPUX86State *cenv = &cpu->env;
> > > unsigned int bank;
> > > +Error *local_err = NULL;
> > >
> > > if (((cenv->cpuid_version >> 8) & 0xf) >= 6
> > >
On 06/16/16 16:37, Eduardo Habkost wrote:
> On Thu, Jun 16, 2016 at 02:06:19PM +0800, Haozhong Zhang wrote:
> > From: Ashok Raj
> >
> > This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> > are injected to only one VCPU rather than broadcast to all VCPUs. As KVM
> > reports L
On Thu, Jun 16, 2016 at 02:06:19PM +0800, Haozhong Zhang wrote:
> From: Ashok Raj
>
> This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> are injected to only one VCPU rather than broadcast to all VCPUs. As KVM
> reports LMCE support on Intel platforms, this features is only
On 16/06/2016 20:05, Eduardo Habkost wrote:
> On Thu, Jun 16, 2016 at 12:42:19PM +0200, Paolo Bonzini wrote:
>>
>>
>> On 16/06/2016 12:34, Haozhong Zhang wrote:
>>> On 06/16/16 12:23, Paolo Bonzini wrote:
On 16/06/2016 12:16, Haozhong Zhang wrote:
>>
>>> +has_msr_mc
On Thu, Jun 16, 2016 at 12:42:19PM +0200, Paolo Bonzini wrote:
>
>
> On 16/06/2016 12:34, Haozhong Zhang wrote:
> > On 06/16/16 12:23, Paolo Bonzini wrote:
> >>
> >>
> >> On 16/06/2016 12:16, Haozhong Zhang wrote:
>
> > +has_msr_mcg_ext_ctl = true;
> > }
> >
>
On 16/06/2016 12:34, Haozhong Zhang wrote:
> On 06/16/16 12:23, Paolo Bonzini wrote:
>>
>>
>> On 16/06/2016 12:16, Haozhong Zhang wrote:
> +has_msr_mcg_ext_ctl = true;
> }
>
> c = cpuid_find_entry(&cpuid_data.cpuid, 0x8007, 0);
Which silicon
On 06/16/16 12:23, Paolo Bonzini wrote:
>
>
> On 16/06/2016 12:16, Haozhong Zhang wrote:
> > >
> > > > +has_msr_mcg_ext_ctl = true;
> > > > }
> > > >
> > > > c = cpuid_find_entry(&cpuid_data.cpuid, 0x8007, 0);
> > >
> > > Which silicon has LMCE? We may want to enable th
On 16/06/2016 12:16, Haozhong Zhang wrote:
> >
> > > +has_msr_mcg_ext_ctl = true;
> > > }
> > >
> > > c = cpuid_find_entry(&cpuid_data.cpuid, 0x8007, 0);
> >
> > Which silicon has LMCE? We may want to enable the property for some CPU
> > models. Apart from this, the pa
On 06/16/16 11:50, Paolo Bonzini wrote:
>
>
> On 16/06/2016 08:06, Haozhong Zhang wrote:
> > +if (!lmce_supported()) {
> > +error_setg(&local_err, "KVM unavailable or LMCE not
> > supported");
> > +error_propagate(&error_abort, local_err);
> > +
On 16/06/2016 08:06, Haozhong Zhang wrote:
> +if (!lmce_supported()) {
> +error_setg(&local_err, "KVM unavailable or LMCE not
> supported");
> +error_propagate(&error_abort, local_err);
> +}
Aborts should never be triggered by user input.
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