Re: [Qemu-devel] [PATCH v5 03/11] escc: introduce a selector for the register bit

2018-10-30 Thread Mark Cave-Ayland
On 29/10/2018 23:36, Philippe Mathieu-Daudé wrote: > Hi Marc, Laurent. > > On Mon, Oct 29, 2018 at 2:43 PM Mark Cave-Ayland > wrote: >> >> From: Laurent Vivier >> >> On Sparc and PowerMac, the bit 0 of the address >> selects the register type (control or data) and >> bit 1 selects the channel

Re: [Qemu-devel] [PATCH v5 03/11] escc: introduce a selector for the register bit

2018-10-30 Thread Hervé Poussineau
Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit : From: Laurent Vivier On Sparc and PowerMac, the bit 0 of the address selects the register type (control or data) and bit 1 selects the channel (B or A). On m68k Macintosh, the bit 0 selects the channel and bit 1 the register type. This patch

Re: [Qemu-devel] [PATCH v5 03/11] escc: introduce a selector for the register bit

2018-10-29 Thread Philippe Mathieu-Daudé
Hi Marc, Laurent. On Mon, Oct 29, 2018 at 2:43 PM Mark Cave-Ayland wrote: > > From: Laurent Vivier > > On Sparc and PowerMac, the bit 0 of the address > selects the register type (control or data) and > bit 1 selects the channel (B or A). > > On m68k Macintosh, the bit 0 selects the channel and