Re: [Qemu-devel] [RFC 4/6] target-ppc: add cmprb instruction

2016-08-02 Thread Nikunj A Dadhania
Richard Henderson writes: > This is better implemented without branches, like > >TCGv_i32 src1, src2, src2lo, src2hi; >TCGv_i32 crf = cpu_crf[cdfD(ctx->opcode)]; > >// allocate all 4 "src" temps > >tcg_gen_trunc_tl_i32(src1, cpu_gpr[rA(ctx->opcode)]); >

Re: [Qemu-devel] [RFC 4/6] target-ppc: add cmprb instruction

2016-07-21 Thread Nikunj A Dadhania
Richard Henderson writes: > On 07/12/2016 11:33 PM, Nikunj A Dadhania wrote: >> +/* cmprb - range comparison: isupper, isaplha, islower*/ >> +static void gen_cmprb(DisasContext *ctx) >> +{ >> +TCGLabel *lab1 = gen_new_label(); >> +TCGLabel *lab2 = gen_new_label(); >> +

Re: [Qemu-devel] [RFC 4/6] target-ppc: add cmprb instruction

2016-07-21 Thread Richard Henderson
On 07/12/2016 11:33 PM, Nikunj A Dadhania wrote: +/* cmprb - range comparison: isupper, isaplha, islower*/ +static void gen_cmprb(DisasContext *ctx) +{ +TCGLabel *lab1 = gen_new_label(); +TCGLabel *lab2 = gen_new_label(); +TCGv src1 = tcg_temp_local_new(); +TCGv src2 =

Re: [Qemu-devel] [RFC 4/6] target-ppc: add cmprb instruction

2016-07-17 Thread David Gibson
On Tue, Jul 12, 2016 at 11:33:20PM +0530, Nikunj A Dadhania wrote: > ISA 3.0 Compare Ranged Byte instruction useful for > isupper/islower/isaplha kind of operation. At least until you have locale-aware versions of those... > Signed-off-by: Nikunj A Dadhania