Am 27.11.2012 21:54, schrieb mdroth:
On Tue, Nov 27, 2012 at 01:11:25PM -0700, Bruce Rogers wrote:
The second parameter to qapi_dealloc_type_size should be a uint64_t *,
not a size_t *. This was causing our 32 bit x86 build to fail, since
warnings are treated as errors.
Signed-off-by: Bruce
On Sat, Nov 24, 2012 at 8:51 PM, Liu Ping Fan qemul...@gmail.com wrote:
From: Liu Ping Fan pingf...@linux.vnet.ibm.com
Using irqfd, so we can avoid switch between kernel and user when
VMs interrupts each other.
Nice work. Due to a hardware failure, there will be a small delay in
me being
When MSI is accelerated through KVM the vectors are only programmed
when the guest first enables MSI support. Subsequent writes to the
vector address or data fields are ignored. Unfortunately that means
we're ignore updates done to adjust SMP affinity of the vectors.
MSI SMP affinity already
Convert the msi_virq array into a struct array so we can easily add
a place to track the MSIMessage for each vector.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/kvm/pci-assign.c | 51 ++-
1 file changed, 26 insertions(+), 25
On 27 November 2012 21:18, Richard Henderson r...@twiddle.net wrote:
On 11/26/2012 09:25 PM, Johnson, Eric wrote:
So basically the SC and SCD instructions for user-mode QEMU are implemented
with a dummy exception. Since it is not a real exception, it is not
reported in the QEMU log file as
Track the last MSIMessage programmed so we can determine when it has
changed and update the routing to the guest. We track MSI-X for
consistency, but we don't do anything with it here.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/kvm/pci-assign.c | 29
This is post-1.3 material, so I'll just post it as an RFC for now.
MSI routing updates aren't currently handled by pci-assign or
vfio-pci (when using KVM acceleration), which means that trying to
set interrupt SMP affinity in the guest has no effect unless MSI is
completely disabled and
-Original Message-
From: Richard Henderson [mailto:rth7...@gmail.com] On Behalf Of Richard
Henderson
Sent: Tuesday, November 27, 2012 1:19 PM
To: Johnson, Eric
Cc: 陳韋任 (Wei-Ren Chen); qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] MIPS exception number limits?
On 11/26/2012
Its friends are already stubbed out, add this one too so vfio can
call it without wrapping it in #ifdefs.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
kvm-all.c |5 +
kvm-stub.c |5 +
2 files changed, 10 insertions(+)
diff --git a/kvm-all.c b/kvm-all.c
index
On 11/22/2012 02:00 AM, Stefan Priebe wrote:
This one fixes a race which qemu had also in iscsi block driver
between cancellation and io completition.
qemu_rbd_aio_cancel was not synchronously waiting for the end of
the command.
To archieve this it introduces a new status flag which uses
On 2012-11-27 23:00, Alex Williamson wrote:
This is post-1.3 material, so I'll just post it as an RFC for now.
MSI routing updates aren't currently handled by pci-assign or
vfio-pci (when using KVM acceleration), which means that trying to
set interrupt SMP affinity in the guest has no
On Wed, 2012-11-28 at 00:08 +0100, Jan Kiszka wrote:
On 2012-11-27 23:00, Alex Williamson wrote:
This is post-1.3 material, so I'll just post it as an RFC for now.
MSI routing updates aren't currently handled by pci-assign or
vfio-pci (when using KVM acceleration), which means that
Will,
1. Please check CPUID before using ADJUST_TSC MSR, exit test successfully
if CPUID bit disabled.
2. Please test the implementation of ADJUST_TSC MSR (functional test).
vmexit.flat test can be used for performance of MSR emulation.
Example
tsc1 = rdtsc();
Hi Will,
On Tue, Nov 27, 2012 at 11:09:00AM -0800, Will Auld wrote:
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design is to emulate the MSR by allowing reads and writes to a guest
vcpu specific location to store the value of the emulated MSR while adding
the
On Tue, Nov 27, 2012 at 05:21:03PM +0100, Paolo Bonzini wrote:
Some versions of GCC require insane (2GB) amounts of memory to compile
translate.o. As a countermeasure, disable the culprit optimization pass.
This should fix the buildbot failure for default_x86_64_fedora16.
Anyway is a good
Thanks Marcelo,
I'll address these items.
- Please rebase against queue branch on kvm.git.
I am not sure how to do this. The repository I have been working against is:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
I assume that I need to change this in some way but I am
于 2012-11-28 10:01, 陳韋任 (Wei-Ren Chen) 写道:
On Tue, Nov 27, 2012 at 05:21:03PM +0100, Paolo Bonzini wrote:
Some versions of GCC require insane (2GB) amounts of memory to compile
translate.o. As a countermeasure, disable the culprit optimization pass.
This should fix the buildbot failure for
On Wed, Nov 28, 2012 at 10:29 AM, Auld, Will will.a...@intel.com wrote:
Thanks Marcelo,
I'll address these items.
- Please rebase against queue branch on kvm.git.
I am not sure how to do this. The repository I have been working against
is:
Alex,
If mst should happen to ack this in the next little while, please
don't merge it. I've spotted a couple of little bugs with it.
On Tue, Nov 27, 2012 at 05:07:33PM +1100, David Gibson wrote:
From: Alexey Kardashevskiy a...@ozlabs.ru
Multiple - even many - PCI host bridges (i.e. PCI
On Wed, Nov 28, 2012 at 5:48 AM, Cam Macdonell c...@cs.ualberta.ca wrote:
On Sat, Nov 24, 2012 at 8:51 PM, Liu Ping Fan qemul...@gmail.com wrote:
From: Liu Ping Fan pingf...@linux.vnet.ibm.com
Using irqfd, so we can avoid switch between kernel and user when
VMs interrupts each other.
Nice
About a source of qemu-1.2.0/main-loop.c
The select handling of os_host_main_loop_wait function
I do not seem to do Exit by interrupts such as SIGUSR1
Will not it be necessary to make modifications?
Before
LineNumber:308 ret = select(nfds + 1, rfds, wfds, xfds, tvarg);
After(Example)
do {
On Tue, Nov 27, 2012 at 02:36:57PM +0200, Michael S. Tsirkin wrote:
On Tue, Nov 27, 2012 at 05:07:31PM +1100, David Gibson wrote:
Hi Michael, Alex,
This patch represents a compromise I hope will be acceptable after the
long thread discussing handling of multiple PCI host bridges on the
在 2012-11-12一的 19:38 -0200，Eduardo Habkost写道：
Eventually all of the CPU init code will probably become just a simple
object_new() call, with some arch-independent function that handles the
CPU model string parsing. But right now we need to reorder and split
many of the steps invoved in the CPU
在 2012-11-12一的 19:38 -0200，Eduardo Habkost写道：
Doing error handling on a single place will make it easier to make sure
memory is freed, and that error information is properly printed or
returned to the caller.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
---
target-i386/cpu.c | 13
1.remove unused variable env
2.remove redundant error handling
Signed-off-by: liguang lig.f...@cn.fujitsu.com
---
target-i386/helper.c | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bf206cf..5686130
On 11/27/2012 05:42 AM, Stefan Hajnoczi wrote:
On Mon, Nov 26, 2012 at 6:19 PM, Mike Lovell m...@dev-zero.net wrote:
i think it does still make sense to implement it in QEMU. there isn't a
problem with multiple processes using the same multicast address. the
net_socket_mcast_create function in
Il 27/11/2012 19:17, Stefan Weil ha scritto:
A real problem could arise from compilers which don't support -fno-gcse.
It was introduced in GCC 3.0.
As this option is not checked for compatibility in configure, such
compilers would no longer work with unmodified QEMU sources. clang
obviously
On 11/27/2012 07:24 AM, Anthony Liguori wrote:
Stefan Hajnoczi stefa...@gmail.com writes:
The part I'm wondering about with VXLAN multicast is whether all QEMU
processes on the host need to receive on the same well-known UDP port.
Not sure if that's possible with the sockets API.
Perhaps
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