On 12/11/2013 06:47 PM, Paolo Bonzini wrote:
Il 11/12/2013 06:20, Alexey Kardashevskiy ha scritto:
Any progress on this?
I am asking since the patchset about bootindex you gave me yesterday prints
(process:38896): GLib-CRITICAL **: g_hash_table_foreach: assertion
`version ==
Hi,
I'd like to merge Gerd's patch, and a similar patch for q35.
For q35 we need to get rid of MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT.
Missing q35 patch is no reason to delay the i440fx fix though.
However, I think we have to limit this change to pc-2.0 and newer:
qemu 1.8 still has the pci
lay a foundation for allwinner A10 SoC with a cortex-a8
processor, and will add more devices later.
v2: split timer and interrupt controller emulation into
their corresponding files.
v3:
1. change loader_start address
2. add 64-bit counter
3. fixup fail to clear interrup status
Signed-off-by: liguang lig.f...@cn.fujitsu.com
---
include/migration/vmstate.h |4
savevm.c| 31 +++
2 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index
Signed-off-by: liguang lig.f...@cn.fujitsu.com
---
default-configs/arm-softmmu.mak |1 +
hw/intc/Makefile.objs |1 +
hw/intc/allwinner-a10-pic.c | 200 +++
include/hw/intc/allwinner-a10-pic.h | 40 +++
4 files changed, 242
Signed-off-by: liguang lig.f...@cn.fujitsu.com
Reviewed-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
default-configs/arm-softmmu.mak |2 +
hw/timer/Makefile.objs |2 +
hw/timer/allwinner-a10-pit.c | 254 ++
On Wed, Dec 11, 2013 at 6:08 PM, liguang lig.f...@cn.fujitsu.com wrote:
Signed-off-by: liguang lig.f...@cn.fujitsu.com
---
default-configs/arm-softmmu.mak |1 +
hw/intc/Makefile.objs |1 +
hw/intc/allwinner-a10-pic.c | 200
On Tue, Dec 10, 2013 at 10:23:41PM +, Alex Bennée wrote:
stefa...@redhat.com writes:
On Mon, Nov 18, 2013 at 12:54:59PM +0800, Chunyan Liu wrote:
2013/11/15 Stefan Hajnoczi stefa...@gmail.com
On Thu, Nov 14, 2013 at 04:15:28PM +0800, Chunyan Liu wrote:
Set NOCOW flag to
Signed-off-by: liguang lig.f...@cn.fujitsu.com
Acked-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/arm/Makefile.objs |2 +-
hw/arm/cubieboard.c | 69 ++
2 files changed, 70 insertions(+), 1 deletions(-)
create mode 100644
Paolo, comments for version 2?
Thanks,
Jinsong
Liu, Jinsong wrote:
These patches are version 2 to enalbe Intel MPX for KVM.
Version 1:
* Add some Intel MPX definiation
* Fix a cpuid(0x0d, 0) exposing bug, dynamic per XCR0 features
enable/disable
* vmx and msr handle for MPX
On 12/11/2013 06:59 PM, Alexey Kardashevskiy wrote:
On 12/11/2013 06:47 PM, Paolo Bonzini wrote:
Il 11/12/2013 06:20, Alexey Kardashevskiy ha scritto:
Any progress on this?
I am asking since the patchset about bootindex you gave me yesterday prints
(process:38896): GLib-CRITICAL **:
On Tue, Dec 10, 2013 at 10:49:00AM -0700, Eric Blake wrote:
On 12/09/2013 06:11 AM, Stefan Hajnoczi wrote:
+++ b/qapi-schema.json
@@ -3009,6 +3009,27 @@
'hubid': 'int32' } }
##
+# @NetdevNetmapOptions
+#
+# Connect a client to a netmap-enabled NIC or to a VALE switch
On Tue, Dec 10, 2013 at 01:26:57PM +0100, Paolo Bonzini wrote:
Now that the memory API is thread-safe, we can use it in
virtio-blk-dataplane and replace hostmem.[ch]. This series does this,
and also changes the vring API to use VirtQueueElement (with an eye
towards migration). With this
Map 3G (i440fx) or 2G (q35) of memory below 4G, so the RAM pieces
are nicely aligned to gigabyte borders.
Keep old memory layout for (a) old machine types and (b) in case all
memory fits below 4G and thus we don't have to split RAM into pieces
in the first place. The later makes sure this change
We are moving boldly on to QEMU 2.0 in the next release. Some patches
written at a time where we assumed 1.8 would be the next version number
managed to sneak in.
s/1.8/2.0/ in qapi-schema.json
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
qapi-schema.json | 4 ++--
1 file changed, 2
Do you want me to send the patch?
Thanks,
Vincenzo
2013/12/11 Stefan Hajnoczi stefa...@redhat.com
On Tue, Dec 10, 2013 at 10:49:00AM -0700, Eric Blake wrote:
On 12/09/2013 06:11 AM, Stefan Hajnoczi wrote:
+++ b/qapi-schema.json
@@ -3009,6 +3009,27 @@
'hubid': 'int32' } }
On Wed, Dec 11, 2013 at 10:04 AM, Vincenzo Maffione
v.maffi...@gmail.com wrote:
Do you want me to send the patch?
Don't worry about it, I sent a patch this morning.
Stefan
On Tue, 2013-12-10 at 18:48 +0200, Michael S. Tsirkin wrote:
On Tue, Dec 10, 2013 at 02:50:32PM +0200, Marcel Apfelbaum wrote:
On Tue, 2013-12-10 at 13:38 +0100, Paolo Bonzini wrote:
Il 10/12/2013 13:37, Marcel Apfelbaum ha scritto:
Beside this it looks OK, the branch does not
Fix a bug that was introduced in commit c046e8c4. QEMU fails to
resume from suspend mode (S3).
Signed-off-by: Gal Hammer gham...@redhat.com
---
hw/acpi/piix4.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 93849c8..5c736a4 100644
--- a/hw/acpi/piix4.c
Fix a bug that was introduced in commit 386a5a1e. A removal of a device
set the chr handlers to NULL. However when the device is plugged back,
its read callback is not restored so data can't be transfter from the
host to the guest via the virtio-serial port.
On 2013年12月11日 16:49, Stefan Hajnoczi wrote:
We are moving boldly on to QEMU 2.0 in the next release. Some patches
written at a time where we assumed 1.8 would be the next version number
managed to sneak in.
s/1.8/2.0/ in qapi-schema.json
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
Il 11/12/2013 09:31, Liu, Jinsong ha scritto:
Paolo, comments for version 2?
I think I commented that it's fine, I'm just waiting for a rebase on top
of the generic patches.
Paolo
Thanks,
Jinsong
Liu, Jinsong wrote:
These patches are version 2 to enalbe Intel MPX for KVM.
Version 1:
On 11 December 2013 05:59, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Mon, Dec 9, 2013 at 10:10 AM, liguang lig.f...@cn.fujitsu.com wrote:
Signed-off-by: liguang lig.f...@cn.fujitsu.com
Acked-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Why Acked-by rather than Reviewed-by
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
hw/net/spapr_llan.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c
index 1bd6f50..229de00 100644
--- a/hw/net/spapr_llan.c
+++ b/hw/net/spapr_llan.c
@@ -29,6 +29,7 @@
#include hw/qdev.h
From: Paolo Bonzini pbonz...@redhat.com
There should be no need to look them up nor enumerate the interface
types, whose classes are really just vtables. Just create the
types and add them to the interface list of the parent type.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by:
This defines an object with the interface to fix firmware pathnames
for devices which have @bootindex property.
This fixes SCSI disks device node names (which are wildcard nodes in
the device-tree).
This fixes PHB name from pci to pci@ where is a BUID as
there is no bus on top of
QEMU supports firmware names for all devices in the QEMU tree but
some architectures expect some parts of firmware path names in different
format.
This introduces a firmware-pathname-change interface definition.
If some machines needs to redefine the firmware path format, it has
to add the
From: Paolo Bonzini pbonz...@redhat.com
This is a first step towards QOMifying /machine.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
include/hw/boards.h | 1 +
vl.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index
From: Hervé Poussineau hpous...@reactos.org
We should not modify the type hash table while it is being iterated on.
Assert that it does not happen.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Alexey Kardashevskiy
As suffixes do not make sense for sPAPR's device tree and
there is no way to filter them out on the BusState::get_fw_dev_path
level, let's add an ability for the external caller to specify
whether to apply suffixes or not.
We could handle suffixes in SLOF (ignore for now) but this would require
This changes VIO bridge fw name from spapr-vio-bridge to vdevice and
vscsi/veth node names from QEMU object names to VIO specific device tree
names.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
hw/ppc/spapr_vio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/ppc/spapr_vio.c
With the great help from Paolo, I am presenting yet another try of bootindex
support on sPAPR, this time with some QOM fixes. Details are in the commit
messages.
Please, comment. Thanks.
Alexey Kardashevskiy (5):
boot: extend get_boot_devices_list() to ignore suffixes
spapr-llan: add to boot
Il 11/12/2013 10:21, Gal Hammer ha scritto:
Fix a bug that was introduced in commit c046e8c4. QEMU fails to
resume from suspend mode (S3).
Signed-off-by: Gal Hammer gham...@redhat.com
---
hw/acpi/piix4.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/acpi/piix4.c
On Wed, Dec 11, 2013 at 7:56 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 11 December 2013 05:59, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Mon, Dec 9, 2013 at 10:10 AM, liguang lig.f...@cn.fujitsu.com wrote:
Signed-off-by: liguang lig.f...@cn.fujitsu.com
Acked-by:
On 11 December 2013 10:24, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Wed, Dec 11, 2013 at 7:56 PM, Peter Maydell peter.mayd...@linaro.org
wrote:
On 11 December 2013 05:59, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Mon, Dec 9, 2013 at 10:10 AM, liguang
On Wed, Dec 11, 2013 at 8:31 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 11 December 2013 10:24, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Wed, Dec 11, 2013 at 7:56 PM, Peter Maydell peter.mayd...@linaro.org
wrote:
On 11 December 2013 05:59, Peter Crosthwaite
Il 11/12/2013 11:22, Alexey Kardashevskiy ha scritto:
With the great help from Paolo, I am presenting yet another try of bootindex
support on sPAPR, this time with some QOM fixes. Details are in the commit
messages.
Please, comment. Thanks.
Alexey Kardashevskiy (5):
boot: extend
Il 11/12/2013 10:47, Gal Hammer ha scritto:
Fix a bug that was introduced in commit 386a5a1e. A removal of a device
set the chr handlers to NULL. However when the device is plugged back,
its read callback is not restored so data can't be transfter from the
host to the guest via the
On Wed, Dec 11, 2013 at 11:23:27AM +0100, Paolo Bonzini wrote:
Il 11/12/2013 10:21, Gal Hammer ha scritto:
Fix a bug that was introduced in commit c046e8c4. QEMU fails to
resume from suspend mode (S3).
Signed-off-by: Gal Hammer gham...@redhat.com
---
hw/acpi/piix4.c | 1 -
1 file
Michael,
True, I haven't figure it out yet, but the current status is that recover from
sleep doesn't work.
As far as I can tell it could be either:
1. piix4_reset shouldn't be call on resume.
2. memory_region_set_enabled (called in pm_io_space_update) shouldn't use
config[0x80].
3. the
On Fri, 06 Dec 2013 13:48:25 -0700
Alex Williamson alex.william...@redhat.com wrote:
Update to tag v3.13-rc3 (374b105797c3d4f29c685f3be535c35f5689b30e)
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
linux-headers/asm-arm/kvm.h |3 +
On Tue, Dec 10, 2013 at 11:29 PM, Eric Blake ebl...@redhat.com wrote:
On 12/09/2013 05:25 PM, Antonios Motakis wrote:
Add a new QEMU netdev backend that is intended to invoke vhost_net
with the vhost-user backend. Also decouple virtio-net from the tap
backend.
Signed-off-by: Antonios
From: Miroslav Rezanina mreza...@redhat.com
Function hpet_find could not be used for checking hpet availability becouse
it was not build when hpet was disabled.
To allow proper use of this function, moving it from hw/timer/hpet.c to
hw/i386/pc.c.
Signed-off-by: Miroslav Rezanina
Don't use atoi() function which doesn't detect errors, switch to
strtol and error out on failures. Also add a range check while
being at it.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
util/qemu-sockets.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git
From: Wanlong Gao gaowanl...@cn.fujitsu.com
If the total number of the assigned numa nodes memory is not
equal to the assigned ram size, it will write the wrong data
to ACPI talb, then the guest will ignore the wrong ACPI table
and recognize all memory to one node. It's buggy, we should
check it
From: Wanlong Gao gaowanl...@cn.fujitsu.com
Signed-off-by: Wanlong Gao gaowanl...@cn.fujitsu.com
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
Makefile.target | 2 +-
cpus.c | 14
include/sysemu/cpus.h | 1 -
include/sysemu/sysemu.h | 3 +
numa.c
From: Igor Mammedov imamm...@redhat.com
Signed-off-by: Igor Mammedov imamm...@redhat.com
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
qapi/string-input-visitor.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/qapi/string-input-visitor.c
Hi,
this is a proposal for a common tree for memory hotplug and NUMA
policy patches.
The common base for these tree is Igor's memory device QOM hierarchy,
that subsumes and improves on the -numa mem concept that I had proposed.
These patches include a basic conversion of his QOM hierarchy to
From: Wanlong Gao gaowanl...@cn.fujitsu.com
Add the numa_info structure to contain the numa nodes memory,
VCPUs information and the future added numa nodes host memory
policies.
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
Signed-off-by: Andre Przywara andre.przyw...@amd.com
Signed-off-by:
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hw/i386/pc.c | 11 +--
hw/i386/pc_piix.c| 8 +++-
hw/i386/pc_q35.c | 4 +---
include/hw/i386/pc.h | 7 +++
4 files changed, 12 insertions(+), 18 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index
From: Wanlong Gao gaowanl...@cn.fujitsu.com
libnuma choosed 128 for MAX_NODES, so we follow libnuma here.
Signed-off-by: Wanlong Gao gaowanl...@cn.fujitsu.com
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
include/sysemu/sysemu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
include/qemu/config-file.h | 2 ++
util/qemu-config.c | 14 ++
vl.c | 11 +--
3 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/include/qemu/config-file.h
From: Igor Mammedov imamm...@redhat.com
Adds option to -m
mem - startup memory amount
For compatibility with legacy CLI if suffix-less number is passed,
it assumes amount in Mb.
Otherwise user is free to use suffixed number using suffixes b,k/K,M,G
Signed-off-by: Igor Mammedov
From: Wanlong Gao gaowanl...@cn.fujitsu.com
Signed-off-by: Wanlong Gao gaowanl...@cn.fujitsu.com
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
include/sysemu/sysemu.h | 3 +-
numa.c | 148 +++-
qapi-schema.json| 30
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
hw/i386/pc.c| 4 +---
include/sysemu/sysemu.h | 5 +
numa.c | 10 ++
3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 76c47a9..61df5d4 100644
---
From: Igor Mammedov imamm...@redhat.com
Provides framework for splitting host RAM allocation/
policies into a separate backend that could be used
by devices.
Initially only legacy RAM backend is provided, which
uses memory_region_init_ram() allocator and compatible
with every CLI option that
The object must be unref-ed when its variable goes out of scope.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
vl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index 68ba565..086a062 100644
--- a/vl.c
+++ b/vl.c
@@ -2717,12 +2717,13 @@ static int
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
qom/object.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/qom/object.c b/qom/object.c
index fc19cf6..68fe07a 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -988,17 +988,22 @@ static void
On Tue, Dec 10, 2013 at 05:01:02PM -0200, Eduardo Habkost wrote:
On Tue, Dec 10, 2013 at 07:03:50PM +0100, Paolo Bonzini wrote:
Il 10/12/2013 14:15, Eduardo Habkost ha scritto:
If the total number of the assigned numa nodes memory is not
equal to the assigned ram size, it will write the
This option provides the infrastructure for binding guest NUMA nodes
to host NUMA nodes. For example:
-object memory-ram,size=1024M,policy=membind,host-nodes=0,id=ram-node0 \
-numa node,nodeid=0,cpus=0,memdev=ram-node0 \
-object
Support for a dallas/maxim onewire sensor, enough of it to
fool linux's w1-gpio driver
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/misc/Makefile.objs | 2 +
hw/misc/w1-ds18s20.c | 332
++
2 files changed, 334 insertions(+)
create
On 11 December 2013 12:22, M P buser...@gmail.com wrote:
Support for a dallas/maxim onewire sensor, enough of it to
fool linux's w1-gpio driver
Is there a board in QEMU's current set that would use this, or is
this part of a larger set of patches that would add a board
that uses it?
thanks
--
The latest update to v3.13-rc3 (bf63839f) breaks the
ppc build with KVM:
kvm-all.o: In function `kvm_update_guest_debug':
kvm-all.c:1910: undefined reference to `kvm_arch_update_guest_debug'
kvm-all.o: In function `kvm_insert_breakpoint':
kvm-all.c:1937: undefined reference to
On 11.12.2013, at 14:15, Greg Kurz gk...@linux.vnet.ibm.com wrote:
The latest update to v3.13-rc3 (bf63839f) breaks the
ppc build with KVM:
kvm-all.o: In function `kvm_update_guest_debug':
kvm-all.c:1910: undefined reference to `kvm_arch_update_guest_debug'
kvm-all.o: In function
On Wed, 11 Dec 2013 11:52:28 +0800
Fam Zheng f...@redhat.com wrote:
On 2013年12月10日 23:16, Luiz Capitulino wrote:
On Tue, 10 Dec 2013 15:25:07 +0100
Kevin Wolf kw...@redhat.com wrote:
My objection to your approach is strong because Benoît already sent an
alternative which I believe is
We use the rom infrastructure to write firmware and/or initial kernel
blobs into guest address space. So we're essentially the layer before
the first code that gets executed inside the guest.
The guest expects that its data and instruction cache view of the world
is 100% consistent when it
Il 11/12/2013 14:23, Alexander Graf ha scritto:
+if (kvm_enabled()) {
+/*
+ * The guest may want to directly execute from the rom
region,
+ * so we better invalidate its icache
+ */
+
On 11.12.2013, at 14:27, Paolo Bonzini pbonz...@redhat.com wrote:
Il 11/12/2013 14:23, Alexander Graf ha scritto:
+if (kvm_enabled()) {
+/*
+ * The guest may want to directly execute from the rom
region,
+ * so we better
This driver works sufficiently well that linux can use it to access
the SD card using the SD-DMA-SSI-SD. It hasn't been tested for
much else.
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/dma/Makefile.objs | 1 +
hw/dma/mxs_dma.c | 347
Prototype driver for the mxs/imx23 uart IO block. This has no
real 'uart' functional code, apart from letting itself be
initialized by linux without generating a timeout error.
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/char/Makefile.objs | 1 +
hw/char/mxs_uart.c| 146
Header file containing most of the base addresses and IO registers
needed for the Freescale mxs/imx23 SoC emumation.
Also contains a generic helper to implement the SET/AND/OR/XOR trick
shared by pretty much all of the IO blocks on this SoC
Signed-off-by: Michel Pollet buser...@gmail.com
---
Implements the pinctrl and GPIO block for the imx23
It handles GPIO output, and GPIO input from qemu translated
into pin values and interrupts, if appropriate.
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/arm/Makefile.objs | 2 +-
hw/arm/imx23_pinctrl.c | 293
Implements the interrupt collector IO block
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/intc/Makefile.objs | 1 +
hw/intc/mxs_icoll.c | 200 ++
2 files changed, 201 insertions(+)
create mode 100644 hw/intc/mxs_icoll.c
diff --git
This series adds support for the imx233 SoC, and also adds support for emulating
an Olinux Olinuxino board with a few peripherals, as a test harness.
The emulation works pretty well, boots linux 3.12 vanilla from an emulated SD
card,
has USB bridge support (but no support for USB 1.1 devices like
I've just posted the imx233 patch series, with a board that uses this
driver.
M
On Wed, Dec 11, 2013 at 12:44 PM, Peter Maydell peter.mayd...@linaro.orgwrote:
On 11 December 2013 12:22, M P buser...@gmail.com wrote:
Support for a dallas/maxim onewire sensor, enough of it to
fool
This implements the SSP port(s) of the mxs. Currently hardcoded for
the SD card interface, but as TODO it could rather easily be made
to be generic and support 'generic' SPI too.
It is geared toward working with DMA, as the linux drivers uses it that
way.
Signed-off-by: Michel Pollet
This implements just enough of the digctl IO block to allow
linux to believe it's running on (currently only) an imx23.
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/arm/Makefile.objs | 1 +
hw/arm/imx23_digctl.c | 110 ++
2 files
Allows selective compilation of the MXS bits
Signed-off-by: Michel Pollet buser...@gmail.com
---
default-configs/arm-softmmu.mak | 1 +
1 file changed, 1 insertion(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index e48f102..0d4cf95 100644
---
On 11 December 2013 13:23, Alexander Graf ag...@suse.de wrote:
The guest expects that its data and instruction cache view of the world
is 100% consistent when it initially boots. This works just fine on
initial rom population for the first boot.
However, when we reboot and then repopulate the
Peter Crosthwaite peter.crosthwa...@xilinx.com writes:
Following our discussion RE self asserting API calls, here is a spin of
my proposal. This series obsoletes the need for _nofail variants for
Error ** accepting APIs. Is also greatly reduces the verbosity of calls
sites that are currently
On Tue, Dec 10, 2013 at 11:02:41PM +0200, Michael S. Tsirkin wrote:
On Tue, Dec 10, 2013 at 03:21:44PM -0200, Marcelo Tosatti wrote:
On Tue, Dec 10, 2013 at 01:05:42PM -0200, Marcelo Tosatti wrote:
On Tue, Dec 10, 2013 at 02:18:36PM +0100, Paolo Bonzini wrote:
Il 28/11/2013 11:26,
Adds support for creating a basic imx23 dev board from Olimex, with
a few peripherals, a bitbang i2c bus with a RTC attached, a DS18S20
thermal sensor, and a rather crude 'relay' that increases/decreases
the thermal sensor temperature.
Basicaly, it's a complete emulation of the hardware used for
This adds support for creating an imx23 instance. This also contains
some of the more minor IO blocks, and a 'catchall' driver that helps
debugging access to undocumented IO registers.
Currently the instance can boot a linux kernel, but does not support
booting from the 'special' signed Freescale
Add the USB IO block, and the USB PHY IO block. This just wraps
an ehci instance, and support some of the 'extra' mxs registers
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/usb/Makefile.objs | 1 +
hw/usb/mxs_usb.c | 254 +++
2
Support for the timer IO block of the mxs/imx23. Does not support
any of the fancy function, just the 32khz based timers used by
linux.
Signed-off-by: Michel Pollet buser...@gmail.com
---
hw/timer/Makefile.objs | 2 +-
hw/timer/mxs_timrot.c | 271
Il 11/12/2013 14:35, Alexander Graf ha scritto:
+if (kvm_enabled()) {
+/*
+ * The guest may want to directly execute from the rom
region,
+ * so we better invalidate its icache
+ */
+
noxi...@gmail.com writes:
Hi,
I'm trying to use the latest version of QEMU (1.7) in user mode in Android
1.7. I tried compiling it, but it seems there is a very hard dependency on
glib which is standing in the way. Has anyone tried building qemu 1.7 for
android, if so where can I get the
On 11 December 2013 13:35, Alexander Graf ag...@suse.de wrote:
How would KVM know when things changed inside of a memory region?
It's up to user space to manage the contents of a memory region, no?
If the architecture spec says that a freshly reset physical CPU has
coherent icache and dcache,
On 11.12.2013, at 15:07, Peter Maydell peter.mayd...@linaro.org wrote:
On 11 December 2013 13:35, Alexander Graf ag...@suse.de wrote:
How would KVM know when things changed inside of a memory region?
It's up to user space to manage the contents of a memory region, no?
If the architecture
On Wed, Dec 11, 2013 at 11:41:18AM -0200, Marcelo Tosatti wrote:
On Tue, Dec 10, 2013 at 11:02:41PM +0200, Michael S. Tsirkin wrote:
On Tue, Dec 10, 2013 at 03:21:44PM -0200, Marcelo Tosatti wrote:
On Tue, Dec 10, 2013 at 01:05:42PM -0200, Marcelo Tosatti wrote:
On Tue, Dec 10, 2013 at
On 11.12.2013, at 15:03, Paolo Bonzini pbonz...@redhat.com wrote:
Il 11/12/2013 14:35, Alexander Graf ha scritto:
+if (kvm_enabled()) {
+/*
+ * The guest may want to directly execute from the rom
region,
+ * so we better
On 11 December 2013 14:18, mihai.cara...@freescale.com
mihai.cara...@freescale.com wrote:
From: Peter Maydell [mailto:peter.mayd...@linaro.org]
If the architecture spec says that a freshly reset physical CPU has
coherent icache and dcache, then resetting the vCPU should also
ensure the icache
On 11.12.2013, at 15:25, Peter Maydell peter.mayd...@linaro.org wrote:
On 11 December 2013 14:18, mihai.cara...@freescale.com
mihai.cara...@freescale.com wrote:
From: Peter Maydell [mailto:peter.mayd...@linaro.org]
If the architecture spec says that a freshly reset physical CPU has
coherent
Anthony Liguori anth...@codemonkey.ws writes:
On Tue, Dec 10, 2013 at 4:54 AM, Markus Armbruster arm...@redhat.com wrote
Paolo Bonzini pbonz...@redhat.com writes:
Il 10/12/2013 12:42, Juan Quintela ha scritto:
Hi
Please, send any topic that you are interested in covering.
May not need a
Le Monday 09 Dec 2013 à 17:15:26 (+0100), Kevin Wolf a écrit :
Am 05.12.2013 um 18:14 hat Benoît Canet geschrieben:
Signed-off-by: Benoit Canet ben...@irqsave.net
---
block.c | 44 +++-
1 file changed, 39 insertions(+), 5 deletions(-)
diff
On Wed, 2013-12-11 at 12:09 +0100, Greg Kurz wrote:
On Fri, 06 Dec 2013 13:48:25 -0700
Alex Williamson alex.william...@redhat.com wrote:
Update to tag v3.13-rc3 (374b105797c3d4f29c685f3be535c35f5689b30e)
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
Il 11/12/2013 15:20, Michael S. Tsirkin ha scritto:
It means that its necessary to expose that 3-4GB physical memory region
in QEMU belongs to the same node (that is, guest must be aware that
3-3.75GB and the tail of RAM are on the same node).
So the problem Paolo mentions is fixable.
On 11.12.2013, at 15:44, Alex Williamson alex.william...@redhat.com wrote:
On Wed, 2013-12-11 at 12:09 +0100, Greg Kurz wrote:
On Fri, 06 Dec 2013 13:48:25 -0700
Alex Williamson alex.william...@redhat.com wrote:
Update to tag v3.13-rc3 (374b105797c3d4f29c685f3be535c35f5689b30e)
Bandan Das b...@redhat.com writes:
These patches add realize and unrealize interfaces to BusState just
like we have for DeviceState. 1/3 and 2/3 implement the interface and
attempt to integrate it to the existing DeviceState call path.
3/3 is an example user of the interface, pci in this
On Wed, Dec 11, 2013 at 03:45:29PM +0100, Paolo Bonzini wrote:
Il 11/12/2013 15:20, Michael S. Tsirkin ha scritto:
It means that its necessary to expose that 3-4GB physical memory region
in QEMU belongs to the same node (that is, guest must be aware that
3-3.75GB and the tail of RAM are
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