[Qemu-devel] [PATCH] audio: Use g_new() & friends where that makes obvious sense WIP

TODO credit coccinelle g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size

[Qemu-devel] [PATCH] ui: Use g_new() & friends where that makes obvious sense WIP

TODO credit coccinelle g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size

[Qemu-devel] [PATCH 0/2] target-mips: non-enabled interrupts can wake up the CPU in R6

MIPS Release 6 requires that the CPU blocked on WAIT instruction can be woken up by an interrupt, even if interrupts are not enabled. First patch does not contain any functional change, it just moves the "are interrupts enabled?" part into separate cpu_mips_hw_interrupts_enabled() function.

[Qemu-devel] [PATCH 2/2] target-mips: implement the CPU wake-up on non-enabled interrupts in R6

In Release 6, the behaviour of WAIT has been modified to make it a requirement that a processor that has disabled operation as a result of executing a WAIT will resume operation on arrival of an interrupt even if interrupts are not enabled. Signed-off-by: Leon Alrae ---

[Qemu-devel] [PATCH] linux-user: assert that target_mprotect cannot fail

All error conditions that target_mprotect checks are also checked by target_mmap. EACCESS cannot happen because we are just removing PROT_WRITE. ENOMEM should not happen because we are modifying a whole VMA (and we have bigger problems anyway if it happens). Fixes a Coverity false positive,

[Qemu-devel] [PATCH] tcg/mips: Fix clobbering of qemu_ld inputs

The MIPS TCG backend implements qemu_ld with 64-bit targets using the v0 register (base) as a temporary to load the upper half of the QEMU TLB comparator (see line 5 below), however this happens before the input address is used (line 8 to mask off the low bits for the TLB comparison, and line 12

[Qemu-devel] [PATCH] qxl: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

[Qemu-devel] [PATCH] audio: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

Re: [Qemu-devel] [PATCH] rocker: Use g_new() & friends where that makes obvious sense

Mon, Sep 14, 2015 at 01:52:23PM CEST, arm...@redhat.com wrote: >g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, >for two reasons. One, it catches multiplication overflowing size_t. >Two, it returns T * rather than void *, which lets the compiler catch >more type errors. >

[Qemu-devel] virtio-gpu: cursor update not in sync with resource update

Hi Afaik, the goal of the seperate cursor queue is to update cursor quickly (probably to give good input responsiveness). However, the VIRTIO_GPU_CMD_UPDATE_CURSOR references a surface that is uploaded via the ctrl queue. The same resource id may be reused for cursor update. But there is no

[Qemu-devel] [PATCH] target-mips: add missing restriction in DAUI instruction

rs cannot be the zero register, Reserved Instruction exception must be signalled for this case. Signed-off-by: Leon Alrae --- target-mips/translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c

Re: [Qemu-devel] [PATCH v11 1/5] apic: move APIC's MMIO region mapping into APIC

On Wed, 2 Sep 2015 17:36:18 +0800 Zhu Guihua wrote: > From: Chen Fan > > When ICC bus/bridge is removed, APIC MMIO will be left > unmapped since it was mapped into system's address space > indirectly by ICC bridge. > Fix it by moving

[Qemu-devel] [PATCH 2/2] target-arm: Implement checking of fired watchpoint

ARM stops before access to a location covered by watchpoint. Also, QEMU watchpoint fire is not necessarily an architectural watchpoint match. Unfortunately, that is hardly possible to ignore a fired watchpoint in debug exception handler. So move watchpoint check from debug exception handler to the

[Qemu-devel] [PATCH 1/2] cpu: Add callback to check architectural watchpoint match

When QEMU watchpoint matches, that is not definitely an architectural watchpoint match yet. If it is a stop-before-access watchpoint then that is hardly possible to ignore it after throwing a TCG exception. A special callback is introduced to check for architectural watchpoint match before

[Qemu-devel] [PATCH] target-arm: fix CPU breakpoint handling

A QEMU breakpoint match is not definitely an architectural breakpoint match. If an exception is generated unconditionally during translation, it is hardly possible to ignore it in the debug exceptoin hanlder. Generate a call to helper to check CPU breakpoints and raise an exception only if any

[Qemu-devel] [PATCH] usb: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

[Qemu-devel] [PATCH] ui: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

[Qemu-devel] [PATCH] block/ssh: remove dead code

The "err" label cannot be reached with qp != NULL. Remove the free-ing of qp and avoid future regressions by removing the initializer. Signed-off-by: Paolo Bonzini --- block/ssh.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/block/ssh.c

Re: [Qemu-devel] [RFCv2 1/2] spapr: Remove unnecessary owner field from sPAPRDRConnector

On Mon, Sep 14, 2015 at 06:22:35PM +1000, Alexey Kardashevskiy wrote: > On 09/14/2015 11:41 AM, David Gibson wrote: > >The sPAPRDRConnector pseudo-device contains an owner field which is > >set in spapr_dr_connector_new(). However, that function also calls > >object_property_add_child() to set

Re: [Qemu-devel] [RFCv2 1/2] spapr: Remove unnecessary owner field from sPAPRDRConnector

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 14/09/2015 13:45, David Gibson wrote: >>> >>> === * There is no way for a child to determine what its parent >>> is. It is not * a bidirectional relationship. This is by >>> design. === >>> >>> This part always confused me as there is

Re: [Qemu-devel] [RFC PATCH] libcacard: Fix bug detected with 'smatch'

Hi On Mon, Sep 14, 2015 at 2:11 PM, Markus Armbruster wrote: > Stumbled over this while throwing out old mail. Copying Marc-André and > Jeremy. > Thanks, the patch is applied in my libcacard "next" branch (https://github.com/elmarco/libcacard/tree/next). > Thomas Huth

[Qemu-devel] [PATCH] target-mips: update writing to CP0.Status.KX/SX/UX in MIPS Release R6

Implement the relationship between CP0.Status.KX, SX and UX. It should not be possible to set UX bit if SX is 0, the same applies for setting SX if KX is 0. Signed-off-by: Leon Alrae --- target-mips/cpu.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff

[Qemu-devel] [PATCH 1/2] target-mips: move the test for enabled interrupts to a separate function

Signed-off-by: Leon Alrae --- target-mips/cpu.c| 4 +++- target-mips/cpu.h| 29 +++-- target-mips/helper.c | 3 ++- 3 files changed, 20 insertions(+), 16 deletions(-) diff --git a/target-mips/cpu.c b/target-mips/cpu.c index

Re: [Qemu-devel] [PATCH v2] hw/misc/zynq_slcr: Change CPU clock rate for Linux boots

On Mon, Sep 14, 2015 at 10:07 PM, Peter Maydell wrote: > On 13 September 2015 at 23:42, Peter Crosthwaite > wrote: >> On Sun, Sep 13, 2015 at 1:47 PM, Peter Maydell >> wrote: >>> On 13 September 2015 at 21:22,

[Qemu-devel] [PATCH] qga: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

[Qemu-devel] [PATCH 0/2] target-mips: minor clean up in mtc0 and mfc0

This patchset removes the gen_mtc0_store64() which is actually incorrect as MTC0 instruction in MIPS64 is supposed to move entire content (if dst CP0 register is 64-bit) without sign extending. It also removes the gen_mfc0_load64() and replaces the pair of tcg_gen_ld_tl() + tcg_gen_ext32s_tl()

[Qemu-devel] [PATCH] target-arm: implement arm_debug_target_el()

Implement debug exception routing according to ARM ARM D2.3.1 Pseudocode description of routing debug exceptions. Signed-off-by: Sergey Fedorov --- target-arm/cpu.h | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/target-arm/cpu.h

[Qemu-devel] [PATCH] migration: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

[Qemu-devel] [PATCH] rocker: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

[Qemu-devel] [PATCH 2/2] target-mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl()

Remove misleading gen_mfc0_load64() which actually loads 32 or 64 bits depending whether MIPS32 or MIPS64 and also replace the pair of tcg_gen_ld_tl() + tcg_gen_ext32s_tl() with single tcg_gen_ld32s_tl(). Signed-off-by: Leon Alrae --- target-mips/translate.c | 43

Re: [Qemu-devel] [PATCH v11 4/5] cpu/apic: drop icc bus/bridge

On Wed, 2 Sep 2015 17:36:21 +0800 Zhu Guihua wrote: > From: Chen Fan > > After CPU hotplug has been converted to BUS-less hot-plug infrastructure, > the only function ICC bus performs is to propagate reset to LAPICs. However > LAPIC

[Qemu-devel] [PATCH] piix: fix resource leak reported by Coverity

config_fd should be closed before return, or there will be a resource leak error. Signed-off-by: zhanghailiang --- hw/pci-host/piix.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index

[Qemu-devel] [PATCH] usb: Use g_new() & friends where that makes obvious sense WIP

TODO credit coccinelle g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size

[Qemu-devel] [PATCH] qxl: Use g_new() & friends where that makes obvious sense WIP

TODO credit coccinelle g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size

[Qemu-devel] [PATCH 0/2] Architectural watchpoint check

This series is intended to fix ARM watchpoint emulation misbehavior. QEMU hangs when QEMU watchpoint fires but it does not pass additional architectural checks in ARM CPU debug exception handler. For details, please see individual patches. The most relevant parts of the original discussion about

Re: [Qemu-devel] [PATCH] block/ssh: remove dead code

On Mon, Sep 14, 2015 at 01:12:34PM +0200, Paolo Bonzini wrote: > The "err" label cannot be reached with qp != NULL. Remove the free-ing > of qp and avoid future regressions by removing the initializer. > > Signed-off-by: Paolo Bonzini > --- > block/ssh.c | 5 + > 1

[Qemu-devel] [PATCH] linux-user: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

Re: [Qemu-devel] [PATCH 0/2] target-mips: get rid of old debugging code

On 13/09/15 22:07, Aurelien Jarno wrote: > This patchset get rid of old debugging code in translate.c, that has > been superseded by other debugging way (e.g. (-d in_asm,op). It comes > from the discussion there: > > https://lists.gnu.org/archive/html/qemu-devel/2015-07/msg03162.html > > I had

Re: [Qemu-devel] [RFC PATCH] libcacard: Fix bug detected with 'smatch'

Stumbled over this while throwing out old mail. Copying Marc-André and Jeremy. Thomas Huth writes: > 'smatch' complains about two bugs and one style issue in card_7816.c: > > libcacard/card_7816.c:273 vcard_apdu_set_length() warn: should this be a > bitwise op? >

Re: [Qemu-devel] [PATCH 0/7] qapi-flattening and preparation of -audiodev option

"Kővágó, Zoltán" writes: > As discussed here[1], I'm splitting the qapi related patches from my > previous -audiodev patch series. These are patches 2--7 and 9 from my > previous patches. (Patch 1 was merged into -trivial in the meanwhile.) > > Please review. > > [1]:

[Qemu-devel] [PATCH 1/2] target-mips: correct MTC0 instruction on MIPS64

MTC0 on a 64-bit processor should move entire 64-bit GPR content to CP0 register. Signed-off-by: Leon Alrae --- target-mips/translate.c | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/target-mips/translate.c

Re: [Qemu-devel] [PULL 0/6] sh4-next queue

On 13 September 2015 at 22:18, Aurelien Jarno wrote: > The following changes since commit 7b9c09f7d486647784c605739d69b708a7249c9b: > > Merge remote-tracking branch 'remotes/sstabellini/tags/xen-2015-09-10-tag' > into staging (2015-09-10 18:25:52 +0100) > > are available

Re: [Qemu-devel] [PATCH] audio: Use g_new() & friends where that makes obvious sense WIP

Sent out the patches with unfinished commit messages by mistake, please ignore.

Re: [Qemu-devel] [PATCH qemu v2 2/2] spapr_pci: Remove constraints about VFIO-PCI devices

On Mon, Sep 14, 2015 at 06:56:35PM +1000, Alexey Kardashevskiy wrote: > On 09/14/2015 02:04 PM, David Gibson wrote: > >On Fri, Sep 11, 2015 at 02:03:38PM -0600, Alex Williamson wrote: > >>On Wed, 2015-09-09 at 20:43 -0600, Alex Williamson wrote: > >>>On Thu, 2015-09-03 at 14:40 +1000, Alexey

[Qemu-devel] [PATCH] qemu-char: Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form

Re: [Qemu-devel] [PATCH v2] hw/misc/zynq_slcr: Change CPU clock rate for Linux boots

On 13 September 2015 at 23:42, Peter Crosthwaite wrote: > On Sun, Sep 13, 2015 at 1:47 PM, Peter Maydell > wrote: >> On 13 September 2015 at 21:22, Peter Crosthwaite >> wrote: >>> There may be more changes worth

[Qemu-devel] [PATCH] target-mips: fix corner case in TLBWR causing QEMU to hang

cpu_mips_get_random() function is used to generate a random index from CP0.Wired to TLBSize-1 range. Current implementation avoids generating the same as before value, hence the while loop. If the guest sets CP0.Wired to TLBSize-1 (which actually does not sound to be very practical) QEMU will get

[Qemu-devel] [PATCH v4 1/9] i6300esb: remove muldiv64()

Originally, timers were ticks based, and it made sense to add ticks to current time to know when to trigger an alarm. But since commit: 7447545 change all other clock references to use nanosecond resolution accessors All timers use nanoseconds and we need to convert ticks to nanoseconds, by

Re: [Qemu-devel] [PATCH v2 2/3] q35: Move options common to all classes to pc_i440fx_machine_options()

On Fri, 11 Sep 2015 17:14:24 -0300 Eduardo Habkost wrote: > The existing default_machine_opts and default_display settings will > still apply to future machine classes. So it makes sense to move them to > pc_i440fx_machine_options() instead of keeping them in a >

Re: [Qemu-devel] [PATCH v2 2/3] q35: Move options common to all classes to pc_i440fx_machine_options()

On Fri, 11 Sep 2015 17:14:24 -0300 Eduardo Habkost wrote: > The existing default_machine_opts and default_display settings will > still apply to future machine classes. So it makes sense to move them to > pc_i440fx_machine_options() instead of keeping them in a >

Re: [Qemu-devel] [PATCH v2 3/3] pc: Introduce pc-*-2.5 machine classes

On Fri, 11 Sep 2015 17:14:25 -0300 Eduardo Habkost wrote: > Signed-off-by: Eduardo Habkost > --- > hw/i386/pc_piix.c| 14 +- > hw/i386/pc_q35.c | 12 +++- > include/hw/compat.h | 3 +++ > include/hw/i386/pc.h | 4 >

[Qemu-devel] [PULL 14/24] i.MX: Add GPIO device

From: Jean-Christophe Dubois Signed-off-by: Jean-Christophe Dubois Reviewed-by: Peter Crosthwaite Message-id: 5ea3b0021e47cf7f7d883a7edbabee44980f3df7.1441828793.git@tribudubois.net Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 24/24] target-arm: Add VMPIDR_EL2

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-9-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 19/24] target-arm: Add VTTBR_EL2

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-4-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 22/24] target-arm: Add VPIDR_EL2

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-7-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 07/24] target-arm: Implement ccmp branchless

From: Richard Henderson This can allow much of a ccmp to be elided when particular flags are subsequently dead. Signed-off-by: Richard Henderson Message-id: 1441909103-24666-6-git-send-email-...@twiddle.net Reviewed-by: Peter Maydell

[Qemu-devel] [PULL 10/24] target-arm: Recognize UXTB, UXTH, LSR, LSL

From: Richard Henderson These are all special case aliases of UBFM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 1441909103-24666-9-git-send-email-...@twiddle.net Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 17/24] hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully

From: "Edgar E. Iglesias" Handle missing CPU support for EL3 gracefully. Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-2-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell

[Qemu-devel] [PULL 21/24] target-arm: Suppress EPD for S2, EL2 and EL3 translations

From: "Edgar E. Iglesias" Stage-2 translations, EL2 and EL3 regimes don't have the EPD control. Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-6-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell

[Qemu-devel] [PULL 18/24] target-arm: Add VTCR_EL2

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-3-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell [PMM: fixed typo in comment] Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH v2] hw/misc/zynq_slcr: Change CPU clock rate for Linux boots

On 09/14/2015 06:17 AM, Nathan Rossi wrote: On Mon, Sep 14, 2015 at 10:07 PM, Peter Maydell wrote: On 13 September 2015 at 23:42, Peter Crosthwaite wrote: On Sun, Sep 13, 2015 at 1:47 PM, Peter Maydell wrote:

Re: [Qemu-devel] [PULL 00/23] Block layer patches

On 14.09.2015 11:57, Kevin Wolf wrote: > Am 14.09.2015 um 11:46 hat Peter Maydell geschrieben: >> On 11 September 2015 at 20:40, Kevin Wolf wrote: >>> The following changes since commit 30c38c90bd3f1bb105ebc069ac1821067c980b7c: >>> >>> scripts/qemu-gdb: Add brief comment

[Qemu-devel] [PATCH v2 5/5] fw_cfg: document ACPI device node information

Signed-off-by: Gabriel Somlo --- docs/specs/fw_cfg.txt | 9 + 1 file changed, 9 insertions(+) diff --git a/docs/specs/fw_cfg.txt b/docs/specs/fw_cfg.txt index 5bc7b96..b5f4b5d 100644 --- a/docs/specs/fw_cfg.txt +++ b/docs/specs/fw_cfg.txt @@ -77,6 +77,15 @@ increasing

[Qemu-devel] [PATCH v2 4/5] acpi: arm: add fw_cfg device node to dsdt

Add a fw_cfg device node to the ACPI DSDT. This is mostly informational, as the authoritative fw_cfg MMIO region(s) are listed in the Device Tree. However, since we are building ACPI tables, we might as well be thorough while at it... Signed-off-by: Gabriel Somlo ---

Re: [Qemu-devel] [PATCH v2 1/3] q35: Move options common to all classes to pc_q35_machine_options()

On Fri, 11 Sep 2015 17:14:23 -0300 Eduardo Habkost wrote: > The existing default_machine_opts, default_display, no_floppy, and > no_tco settings will still apply to future machine classes. So it makes > sense to move them to pc_q35_machine_options() instead of keeping them >

[Qemu-devel] [PULL 15/24] i.MX: Add GPIO devices to i.MX31 SOC

From: Jean-Christophe Dubois Signed-off-by: Jean-Christophe Dubois Reviewed-by: Peter Crosthwaite Message-id: 60b67c9a8b948159f4b4163ead86fbf701c011c6.1441828793.git@tribudubois.net Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 16/24] i.MX: Add GPIO devices to i.MX25 SOC

From: Jean-Christophe Dubois Signed-off-by: Jean-Christophe Dubois Reviewed-by: Peter Crosthwaite Message-id: 2eb129ba8713aedfe877eaa3d8de80061d880fbb.1441828793.git@tribudubois.net Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH v3 4/5] qmp: add monitor command to add/remove a child

Wen Congyang writes: > Signed-off-by: Wen Congyang > Signed-off-by: zhanghailiang > Signed-off-by: Gonglei > --- > blockdev.c | 47 ++ >

Re: [Qemu-devel] [PULL 44/44] cutils: work around platform differences in strto{l, ul, ll, ull}

On 14 September 2015 at 15:33, Paolo Bonzini wrote: > Linux returns 0 if no conversion was made, while OS X and presumably > the BSDs return EINVAL. The OS X convention rejects more invalid > inputs, so convert to it and adjust the test case. > > Windows returns 1 from

[Qemu-devel] [Bug 1495380] [NEW] Invalid parameter 'queues'. multi-queue vhost-user backends does not work.

Public bug reported: The command line which I use: /usr/bin/qemu-system-x86_64 -name instance-0006 -S -machine pc-i440fx-2.4,accel=kvm,usb=off -cpu Haswell-noTSX,+abm,+pdpe1gb,+rdrand,+f16c,+osxsave,+pdcm,+xtpr,+tm2,+est,+smx,+vmx,+ds_cpl,+monitor,+dtes64,+pbe,+tm,+ht,+ss,+acpi,+ds,+vme -m

Re: [Qemu-devel] [RFC PATCH] libcacard: Fix bug detected with 'smatch'

Marc-André Lureau writes: > Hi > > On Mon, Sep 14, 2015 at 2:11 PM, Markus Armbruster wrote: >> Stumbled over this while throwing out old mail. Copying Marc-André and >> Jeremy. >> > > Thanks, the patch is applied in my libcacard "next" branch >

[Qemu-devel] [PULL 08/24] target-arm: Implement fcsel with movcond

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 1441909103-24666-7-git-send-email-...@twiddle.net Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 00/24] target-arm queue

://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150914 for you to fetch changes up to f0d574d63f4603ec431f16ad535a555bf7548b94: target-arm: Add VMPIDR_EL2 (2015-09-14 14:39:51 +0100) target-arm queue: * fix

[Qemu-devel] [PULL 23/24] target-arm: Break out mpidr_read_val()

From: "Edgar E. Iglesias" Break out mpidr_read_val() to allow future sharing of the code that conditionally sets the M and U bits of MPIDR. No functional changes. Signed-off-by: Edgar E. Iglesias Message-id:

[Qemu-devel] [PULL 20/24] target-arm: Suppress TBI for S2 translations

From: "Edgar E. Iglesias" Stage-2 MMU translations do not have configurable TBI as the top byte is always 0 (48-bit IPAs). Signed-off-by: Edgar E. Iglesias Message-id: 1442135278-25281-5-git-send-email-edgar.igles...@gmail.com Reviewed-by:

[Qemu-devel] [PULL 06/24] target-arm: Use setcond and movcond for csel

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 1441909103-24666-5-git-send-email-...@twiddle.net Signed-off-by: Peter Maydell ---

[Qemu-devel] [PULL 13/24] target-arm: Use tcg_gen_extrh_i64_i32

From: Richard Henderson Usually, eliminate an operation from the translator by combining a shift with an extract. In the case of gen_set_NZ64, we don't need a boolean value for cpu_ZF, merely a non-zero value. Given that we can extract both halves of a 64-bit input in one

[Qemu-devel] [PULL 09/24] target-arm: Recognize SXTB, SXTH, SXTW, ASR

From: Richard Henderson These are all special case aliases of SBFM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 1441909103-24666-8-git-send-email-...@twiddle.net Signed-off-by: Peter Maydell

[Qemu-devel] [PULL 02/24] xlnx-zynqmp: Remove unnecessary brackets around error messages

From: Alistair Francis The errp and err variable have unnecessary brackets around them, so remove the brackets. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite Message-id:

Re: [Qemu-devel] [RFCv2 1/2] spapr: Remove unnecessary owner field from sPAPRDRConnector

On 09/14/2015 10:11 PM, Paolo Bonzini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 14/09/2015 13:45, David Gibson wrote: === * There is no way for a child to determine what its parent is. It is not * a bidirectional relationship. This is by design. === This part always

Re: [Qemu-devel] [PATCH v3 2/4] block: Add 'ignore-backing' field to BlockdevOptionsGenericCOWFormat

On Mon 14 Sep 2015 10:45:55 AM CEST, Kevin Wolf wrote: >> >>> So why do we need the new flag? Because "backing: ''" is ugly? >> >> Anyway, was this ever implemented? It seems that passing a string to >> the 'backing' parameter is only specified in the JSON schema, but no >> one actually uses

Re: [Qemu-devel] [PULL 44/44] cutils: work around platform differences in strto{l, ul, ll, ull}

On 14 September 2015 at 15:47, Peter Maydell wrote: > On 14 September 2015 at 15:33, Paolo Bonzini wrote: >> Windows returns 1 from strtoul and strtoull (instead of -1) for >> negative out-of-range input; fix it up. No problem with this patch, just

Re: [Qemu-devel] [PATCH 0/2] Architectural watchpoint check

On 14 September 2015 at 11:50, Sergey Fedorov wrote: > This series is intended to fix ARM watchpoint emulation misbehavior. > QEMU hangs when QEMU watchpoint fires but it does not pass additional > architectural checks in ARM CPU debug exception handler. For details, >

[Qemu-devel] [PULL 03/24] target-arm: Share all common TCG temporaries

From: Richard Henderson This is a bug fix for aarch64. At present, we have branches using the 32-bit (translate.c) versions of cpu_[NZCV]F, but we set the flags using the 64-bit (translate-a64.c) versions of cpu_[NZCV]F. From the view of the TCG code generator, these are

[Qemu-devel] [PULL 11/24] target-arm: Eliminate unnecessary zero-extend in disas_bitfield

From: Richard Henderson For !SF, this initial ext32u can't be optimized away by the current TCG code generator. (It would require backward bit liveness propagation.) But since the range of bits for !SF are already constrained by unallocated_encoding, we'll never reference the

[Qemu-devel] [PULL 01/24] arm: xlnx-zynqmp: Fix up GIC region size

From: Nathan Rossi The GIC in ZynqMP cover a 64K address space, however the actual registers are decoded within a 4K address space and mirrored at the 4K boundaries. This change fixes the defined size for these regions as it was set to 0x4000/16K incorrectly.

[Qemu-devel] [PULL 05/24] target-arm: Handle always condition codes within arm_test_cc

From: Richard Henderson Handling this with TCG_COND_ALWAYS will allow these unlikely cases to be handled without special cases in the rest of the translator. The TCG optimizer ought to be able to reduce these ALWAYS conditions completely. Reviewed-by: Peter Maydell

Re: [Qemu-devel] [PATCH v3 3/4] block: add a 'blockdev-snapshot' QMP command

On Fri 11 Sep 2015 07:58:11 PM CEST, Eric Blake wrote: >> +void qmp_blockdev_snapshot(const char *device, const char *snapshot, >> + Error **errp) >> +{ >> +BlockdevSnapshot snapshot_data = { >> +.device = (char *) device, >> +.snapshot = (char *)

Re: [Qemu-devel] [RFCv2 1/2] spapr: Remove unnecessary owner field from sPAPRDRConnector

On 14/09/2015 16:06, Alexey Kardashevskiy wrote: > > === * There is no way for a child to determine what its parent > is. It is not * a bidirectional relationship. This is by > design. === > > This part always confused me as there is "Object *parent" in > the

[Qemu-devel] [PULL v2 00/44] First batch of misc changes for 2.5 (2015-09-09)

The following changes since commit 090d0bfd948343d522cd20bc634105b5cfe2483b: s390: fix softmmu compilation (2015-08-28 16:05:24 +0100) are available in the git repository at: git://github.com/bonzini/qemu.git tags/for-upstream for you to fetch changes up to

[Qemu-devel] [PATCH v3 2/3] piix: Move options common to all classes to pc_i440fx_machine_options()

The existing default_machine_opts and default_display settings will still apply to future machine classes. So it makes sense to move them to pc_i440fx_machine_options() instead of keeping them in a version-specific machine_options function. Reviewed-by: Igor Mammedov

[Qemu-devel] [PATCH v2 2/5] pc: fw_cfg: move ioport base constant to pc.h

Move BIOS_CFG_IOPORT define from pc.c to pc.h, and rename it to FW_CFG_IO_BASE. Signed-off-by: Gabriel Somlo --- hw/i386/pc.c | 5 ++--- include/hw/i386/pc.h | 2 ++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index

Re: [Qemu-devel] RFC: async commands with QMP

I'm so far behind on e-mail it's not funny anymore. My apologies... Marc-André Lureau writes: > Hi Daniel > > On Wed, Jul 29, 2015 at 5:05 PM, Daniel P. Berrange > wrote: >> When QMP was originally written there was some infrastructure for

Re: [Qemu-devel] [PATCH 9/9] gtk/opengl: add opengl context and scanout support (GtkGLArea)

On Fr, 2015-09-11 at 16:44 +0200, Marc-André Lureau wrote: > Hi > > On Wed, Sep 9, 2015 at 1:20 PM, Gerd Hoffmann wrote: > > This allows virtio-gpu to render in 3d mode. > > Uses native opengl support which is present > > in gtk versions 3.16 and newer. > > > > Signed-off-by:

[Qemu-devel] [PULL 04/24] target-arm: Introduce DisasCompare

From: Richard Henderson Split arm_gen_test_cc into 3 functions, so that it can be reused for non-branch TCG comparisons. Signed-off-by: Richard Henderson Message-id: 1441909103-24666-3-git-send-email-...@twiddle.net Reviewed-by: Peter Maydell

[Qemu-devel] [PULL 12/24] target-arm: Recognize ROR

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 1441909103-24666-11-git-send-email-...@twiddle.net Signed-off-by: Peter Maydell ---

[Qemu-devel] [PATCH v3 0/3] pc-*-2.5 machine-types

This introduces the pc-q35-2.5 and pc-i440fx-2.5 machine-types. Changes v2 -> v3: * Move broken_reserved_end=true to pc_*_2_4_machine_options() Reported-by: Igor Mammedov * Fixed patch description on patch 2/3 (s/q35/piix/) Reported-by: Igor Mammedov

[Qemu-devel] [PATCH v3 1/3] q35: Move options common to all classes to pc_q35_machine_options()

The existing default_machine_opts, default_display, no_floppy, and no_tco settings will still apply to future machine classes. So it makes sense to move them to pc_q35_machine_options() instead of keeping them in a version-specific machine_options function. Reviewed-by: Igor Mammedov

Re: [Qemu-devel] [PATCH qemu v2 2/2] spapr_pci: Remove constraints about VFIO-PCI devices

On 09/14/2015 09:42 PM, David Gibson wrote: On Mon, Sep 14, 2015 at 06:56:35PM +1000, Alexey Kardashevskiy wrote: On 09/14/2015 02:04 PM, David Gibson wrote: On Fri, Sep 11, 2015 at 02:03:38PM -0600, Alex Williamson wrote: On Wed, 2015-09-09 at 20:43 -0600, Alex Williamson wrote: On Thu,

[Qemu-devel] [PATCH v3 2/2] iotests: Add test for checking large image files

Add a test for checking a qcow2 file with a multiple of 2^32 clusters. Signed-off-by: Max Reitz Reviewed-by: Eric Blake --- tests/qemu-iotests/138 | 73 ++ tests/qemu-iotests/138.out | 9 ++

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