On 06/09/2016 11:58 PM, Markus Armbruster wrote:
I had only minor stylistic remarks this time. However, the series needs
a rebase already. If the conflict resolution is trivial, you may add my
Yes, it is trivial. just two file name changed in commit 605d52e62:
-#include "vmxnet_tx_pkt.h"
On Fri, 10 Jun 2016 14:04:41 +1000
David Gibson wrote:
> On Fri, Jun 10, 2016 at 06:29:00AM +0530, Bharata B Rao wrote:
> > Add an API object_type_get_size(const char *typename) that returns the
> > instance_size of the give typename.
I'd rename it to
Hi all,
we are working on a new virtio device, namely the Signal Distribution
Module (SDM). The SDM routes inter-processor signals intra and inter QEMU
instances, using a user-defined communication channel. At the current state
the
SDM provides a local channel, for intra-QEMU signals, and a
On Fri, 10 Jun 2016 10:01:05 +0200
Christian Pinto wrote:
> I am writing to understand how to start the procedure to include this
> device in
> the virtio specification and get a virtio device ID assigned.
The best way is to prepare some patches against the
That's great! it works for me. Thanks a lot.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/955379
Title:
cmake hangs with qemu-arm-static
Status in QEMU:
Confirmed
Status in Linaro QEMU:
On Thu, 9 Jun 2016 14:29:00 -0300
Eduardo Habkost wrote:
> On Thu, Jun 09, 2016 at 07:10:58PM +0200, Igor Mammedov wrote:
> [...]
> > +
> > +if (local_err) {
> > +error_propagate(errp, local_err);
> > }
>
> error_propagate() already ignores
On Fri, Jun 10, 2016 at 06:29:07AM +0530, Bharata B Rao wrote:
> This is the HMP equivalent for QMP query-hotpluggable-cpus.
>
> Signed-off-by: Bharata B Rao
> Reviewed-by: David Gibson
This has a compile error on 32-bit host, because
From: Guillaume Delbergue
Reviewed-by: Sergey Fedorov
Signed-off-by: Guillaume Delbergue
[Rewritten. - Paolo]
Signed-off-by: Paolo Bonzini
[Emilio's additions: use TAS instead
From: "Emilio G. Cota"
It is a more appropriate name, now that the mutex embedded
in the seqlock is gone.
Reviewed-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Signed-off-by:
From: "Emilio G. Cota"
This is a fast, scalable chained hash table with optional auto-resizing,
allowing
reads that are concurrent with reads, and reads/writes that are concurrent
with writes to separate buckets.
A hash table with these features will be necessary for the
From: "Emilio G. Cota"
Reviewed-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Message-Id:
From: "Emilio G. Cota"
This option is unused; besides, it bloats the struct when not needed.
Let's just let writers define their own locks elsewhere.
Reviewed-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Reviewed-by: Richard
The *_to_cpup() functions just compose a pointer dereference with
a *_to_cpu() byteswap. Instead use ld*_p(), which handles potential
pointer misaligment and avoids the need to cast the pointer.
Signed-off-by: Peter Maydell
---
The motivation here is that I'd like to
Events with the 'vcpu' property are conditionally emitted according to
their per-vCPU state. Other events are emitted normally based on their
global tracing state.
Note that the per-vCPU condition check applies to all tracing backends.
Signed-off-by: Lluís Vilanova
Eliminates a future compilation error when UI code includes the tracing
headers (indirectly pulling "disas/bfd.h" through "qom/cpu.h") and
GLib's i18n '_' macro.
Signed-off-by: Lluís Vilanova
---
disas/alpha.c |6 +++---
disas/arm.c |2 +-
disas/i386.c
On 26/05/16 19:35, Alvise Rigo wrote:
> Using tcg_exclusive_{lock,unlock}(), make the emulation of
> LoadLink/StoreConditional thread safe.
>
> During an LL access, this lock protects the load access itself, the
> update of the exclusive history and the update of the VCPU's protected
> range. In
Signed-off-by: Lluís Vilanova
Reviewed-by: Stefan Hajnoczi
---
monitor.c |4 +-
qapi/trace.json | 20 ++--
qmp-commands.hx | 17 ++-
trace/qmp.c | 143 ---
4 files changed,
There is no CONFIG_QGA_NTDDDISK define used anywhere in the QEMU
sources. Looking at the changelog and qga/commands-win32.c, it
seems like this should be called CONFIG_QGA_NTDDSCSI instead.
Signed-off-by: Thomas Huth
---
configure | 2 +-
1 file changed, 1 insertion(+), 1
From: Aleksandar Markovic
New set of helpers for handling nan2008-syle versions of instructions
.., for Mips R6.
All involved instructions have float operand and integer result. Their
core functionality is implemented via
From: Aleksandar Markovic
This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.
Background:
In
From: "Dr. David Alan Gilbert"
The RAM section of qmp_query_migrate is reasonably complex
and repeated 3 times. Split it out into a helper.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Eric Blake
Reviwed-by: Denis V. Lunev
From: "Dr. David Alan Gilbert"
The discard code in migration/ram.c would send request for
zero length discards in the case where no discards were needed.
It doesn't appear to have had any bad effect.
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by:
The following changes since commit 0c33682d5f29b0a4ae53bdec4c8e52e4fae37b34:
target-i386: Move user-mode exception actions out of user-exec.c (2016-06-09
15:55:02 +0100)
are available in the git repository at:
https://git.kernel.org/pub/scm/virt/qemu/amit/migration.git
On 8 June 2016 at 21:24, Laurent Vivier wrote:
> From: Laurent Vivier
>
> Signed-off-by: Laurent Vivier
> ---
> include/exec/user/abitypes.h | 23 ++
> linux-user/strace.c | 550
> +++
>
On 10 June 2016 at 12:48, Amit Shah wrote:
>
> The following changes since commit 0c33682d5f29b0a4ae53bdec4c8e52e4fae37b34:
>
> target-i386: Move user-mode exception actions out of user-exec.c
> (2016-06-09 15:55:02 +0100)
>
> are available in the git repository at:
>
>
From: "Emilio G. Cota"
Sometimes it is useful to have a quick histogram to represent a certain
distribution -- for example, when investigating a performance regression
in a hash table due to inadequate hashing.
The appended allows us to easily represent a distribution using
We've noticed recently that the GPG keyservers have fake keys for
some of the QEMU maintainers, which have keys which have been
deliberately constructed to have collisions on the 32-bit "short ID"
field which gpg shows you by default.
(Example:
https://pgp.mit.edu/pks/lookup?op=vindex=0x14360CDE
The *_to_cpup() functions are not very useful, as they simply do
a pointer dereference and then a *_to_cpu(). Instead use either:
* ld*_*_p(), if the data is at an address that might not be
correctly aligned for the load
* a local dereference and *_to_cpu(), if the pointer is
the correct
NOTE: This series applies on top of "trace: Show vCPU info in guest code events"
Provides per-vCPU dynamic controls of the tracing state of events with the
"vcpu" property.
A later series proposes an optimization where tracing code can be elided for
dynamically disabled events (it uses multiple
On 06/10/2016 09:00 AM, Peter Maydell wrote:
> The *_to_cpup() functions are not very useful, as they simply do
> a pointer dereference and then a *_to_cpu(). Instead use either:
> * ld*_*_p(), if the data is at an address that might not be
>correctly aligned for the load
> * a local
Alvise Rigo writes:
> Hi,
>
> This series ports the latest iteration of the LL/SC work on top of the
> latest MTTCG reference branch posted recently by Alex.
>
> These patches apply on top of the following series:
>
> - [RFC v1 00/12] Enable MTTCG for 32 bit arm
86: Move user-mode exception actions out of user-exec.c
> (2016-06-09 15:55:02 +0100)
>
> are available in the git repository at:
>
> git://git.kraxel.org/qemu tags/pull-ui-20160610-1
>
> for you to fetch changes up to 1185fde40c3ba02406665b9ee0743270c526be26:
>
>
I might have broken something while rebasing on top of
enable-mttcg-for-armv7-v1.
I will sort this problem out.
Thank you,
alvise
On Fri, Jun 10, 2016 at 5:21 PM, Alex Bennée wrote:
>
> Alvise Rigo writes:
>
>> Hi,
>>
>> This series ports
>From bit to enum OnOffAuto.
cc: Michael S. Tsirkin
cc: Markus Armbruster
cc: Marcel Apfelbaum
Reviewed-by: Markus Armbruster
Signed-off-by: Cao jin
---
hw/pci-bridge/pci_bridge_dev.c | 13
From: Aleksandar Markovic
Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct default NaN values (in their 16-, 32-, and 64-bit flavors).
For more info, see [1], page 84, Table 6.3 "Value Supplied When a New
Quiet NaN Is Created", and
From: Aleksandar Markovic
Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct the order of argument comparisons in pickNaNMulAdd().
For more info, see [1], page 53, section "3.5.3 NaN Propagation".
[1] "MIPS Architecture for Programmers
Spotted by Coverity.
Cc: Paolo Bonzini
Signed-off-by: Gerd Hoffmann
Message-id: 1465204725-31562-1-git-send-email-kra...@redhat.com
---
ui/vnc.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/ui/vnc.c b/ui/vnc.c
index
On Fri, 10 Jun 2016 08:48:33 -0300
Eduardo Habkost wrote:
> The code will be changed to allow creation of the CPU object and
> report kvm_required errors only at realizefn, so we need to make
> the instance_init function more flexible.
>
> Signed-off-by: Eduardo Habkost
From: "Emilio G. Cota"
Taken from the linux kernel.
Reviewed-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Message-Id:
From: "Emilio G. Cota"
This will be used by upcoming changes for hashing the tb hash.
Add this into a separate file to include the copyright notice from
xxhash.
Reviewed-by: Sergey Fedorov
Reviewed-by: Richard Henderson
-tcg-20160610
for you to fetch changes up to 9b1b8e78a5a8c849f5ca800d71497dc88a338483:
translate-all: add tb hash bucket info to 'info jit' dump (2016-06-10
07:21:54 -0700)
TB hashing improvements
From: "Emilio G. Cota"
Examples:
- Good hashing, i.e. tb_hash_func5(phys_pc, pc, flags):
TB count715135/2684354
[...]
TB hash buckets 388775/524288 (74.15% head buckets used)
TB hash occupancy 33.04% avg chain occ. Histogram: [0,10)%|▆ █
▅▁▃▁▁|[90,100]%
TB
From: "Emilio G. Cota"
Acked-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
Message-Id: <1465412133-3029-10-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
From: "Emilio G. Cota"
For some workloads such as arm bootup, tb_phys_hash is performance-critical.
The is due to the high frequency of accesses to the hash table, originated
by (frequent) TLB flushes that wipe out the cpu-private tb_jmp_cache's.
More info:
From: "Emilio G. Cota"
Acked-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
Message-Id:
From: "Emilio G. Cota"
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is
On 06/10/2016 09:01 AM, Peter Maydell wrote:
> The *_to_cpup() functions just compose a pointer dereference with
> a *_to_cpu() byteswap. Instead use ld*_p(), which handles potential
> pointer misaligment and avoids the need to cast the pointer.
s/misaligment/misalignment/
>
> Signed-off-by:
Signed-off-by: Lluís Vilanova
Reviewed-by: Stefan Hajnoczi
---
trace/control-internal.h |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/trace/control-internal.h b/trace/control-internal.h
index c78a45a..d1f99e3 100644
---
On 06/09/2016 10:31 AM, Lluís Vilanova wrote:
This series adds an event to track information related to memory accesses
performed by the guest CPUs ("guest_mem_before").
A future series might extend this to contain the physical address and memory
value (e.g., "guest_mem_after").
Signed-off-by:
Each vCPU gets a 'trace_dstate' bitmap to control the per-vCPU dynamic
tracing state of events with the 'vcpu' property.
Signed-off-by: Lluís Vilanova
---
Makefile.objs|1 +
bsd-user/main.c |2 +
include/qom/cpu.h|6
The CONFIG_SIGEV_THREAD_ID switch is unused since the related code
has been removed by commit 6d327171551a12b937c5718073b9848d0274c74d
("aio / timers: Remove alarm timers"), so it can safely be removed
nowadays.
Signed-off-by: Thomas Huth
---
configure | 22
From: "Emilio G. Cota"
This serves as a performance benchmark as well as a stress test
for QHT. We can tweak quite a number of things, including the
number of resize threads and how frequently resizes are triggered.
A performance comparison of QHT vs CLHT[1] and ck_hs[2] using
From: "Emilio G. Cota"
Signed-off-by: Emilio G. Cota
Message-Id: <1465412133-3029-14-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
tests/.gitignore | 1 +
tests/Makefile.include | 5 -
tests/test-qht-par.c |
Eric Blake writes:
> On 06/09/2016 11:34 AM, Lluís Vilanova wrote:
>> Signed-off-by: Lluís Vilanova
>> Reviewed-by: Stefan Hajnoczi
>> ---
>> monitor.c |4 +-
>> qapi/trace.json | 20 ++--
>> qmp-commands.hx | 18 ++-
>> trace/qmp.c
On 06/09/2016 11:34 AM, Lluís Vilanova wrote:
> Signed-off-by: Lluís Vilanova
> Reviewed-by: Stefan Hajnoczi
> ---
> monitor.c |4 +-
> qapi/trace.json | 20 ++--
> qmp-commands.hx | 18 ++-
> trace/qmp.c | 143
>
> Subject: Re: [PATCH v2 2/9] migration: Fix a potential issue
>
> On (Thu) 05 May 2016 [15:32:52], Liang Li wrote:
> > At the end of live migration and before vm_start() on the destination
> > side, we should make sure all the decompression tasks are finished, if
> > this can not be guaranteed,
A new event attribute 'cpu_id' is added to have a separate ID
space ('TRACE_VCPU_*') for all events with the 'vcpu' property.
These are later used to identify which events are enabled on each vCPU.
Signed-off-by: Lluís Vilanova
Reviewed-by: Stefan Hajnoczi
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