Re: [Qemu-devel] [PATCH v3 13/34] tcg: Add atomic helpers

On Fri, Sep 09, 2016 at 09:26:29AM -0700, Richard Henderson wrote: > On 09/09/2016 07:46 AM, Leon Alrae wrote: > >Wouldn't it be useful if tcg.h provided also aliases for _le/_be atomic > >helpers (equivalent to helper_ret_X_mmu) so that in target-* code we wouldn't > >need to care about the

Re: [Qemu-devel] [PATCH v2] qom: Implement qom-get HMP command

"Daniel P. Berrange" writes: > On Fri, Sep 09, 2016 at 06:21:15PM +0200, Markus Armbruster wrote: >> "Dr. David Alan Gilbert" writes: >> >> > * Daniel P. Berrange (berra...@redhat.com) wrote: >> >> IIUC, you switched because string-output-visitor could

[Qemu-devel] [PATCH v1] spapr: Introduce sPAPRCPUCoreClass

Each spapr cpu core type defines an instance_init routine which just populates the CPU class name. This can be done in the class_init commonly for all core types which simplifies the registration. This is inspired by how PowerNV core types are registered. Certain types of spapr cpu cores ('host'

Re: [Qemu-devel] [PATCH v7 1/4] vfio: Mediated device Core driver

On 9/12/2016 10:40 AM, Jike Song wrote: > On 09/10/2016 03:55 AM, Kirti Wankhede wrote: >> On 9/10/2016 12:12 AM, Alex Williamson wrote: >>> On Fri, 9 Sep 2016 23:18:45 +0530 >>> Kirti Wankhede wrote: >>> On 9/8/2016 1:39 PM, Jike Song wrote: > On 08/25/2016 11:53

Re: [Qemu-devel] [PATCH] virtio-gpu-pci: tag as not hotpluggable

On Fr, 2016-09-09 at 21:16 +0300, Michael S. Tsirkin wrote: > On Thu, Sep 08, 2016 at 09:17:17AM +0200, Gerd Hoffmann wrote: > > We can't hotplug display adapters in qemu, tag virtio-gpu-pci > > accordingly (virtio-vga already has this). > > > > Signed-off-by: Gerd Hoffmann >

Re: [Qemu-devel] [PATCH v2 0/8] nvdimm: hotplug support

On 08/12/2016 11:13 PM, Igor Mammedov wrote: Reviewed-by: Stefan Hajnoczi I'd like to review it but I need to read NVDIMM/ACPI specs first to make sensible comments. However it will take some time and I'm on vacation starting next week and I'll be back in a month. So

Re: [Qemu-devel] [PATCH 2/2] vhost-user: only seek a reply if needed in set_mem_table

On 09/08/2016 05:15 PM, Michael S. Tsirkin wrote: On Thu, Sep 08, 2016 at 10:34:10AM +0200, Maxime Coquelin wrote: The goal of this patch is to only request a sync (reply_ack, or get_features) in set_mem_table only when necessary. It should not be necessary the first time we set the table,

Re: [Qemu-devel] [PATCH RESEND v2 00/17] POWER9 TCG enablements - part4

Hi, Your series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1473662506-27441-1-git-send-email-nik...@linux.vnet.ibm.com Subject: [Qemu-devel] [PATCH RESEND v2 00/17] POWER9 TCG enablements - part4 === TEST SCRIPT BEGIN ===

[Qemu-devel] [PATCH RESEND v2 17/17] target-ppc: add stxvb16x and stxvh8x

stxvb16x: Store VSX Vector Byte*16 stxvh8x: Store VSX Vector Halfword*8 Signed-off-by: Nikunj A Dadhania --- target-ppc/translate/vsx-impl.inc.c | 55 + target-ppc/translate/vsx-ops.inc.c | 2 ++ 2 files changed, 57 insertions(+)

[Qemu-devel] [PATCH RESEND v2 15/17] target-ppc: add lxvb16x and lxvh8x

lxvb16x: Load VSX Vector Byte*16 lxvh8x: Load VSX Vector Halfword*8 Signed-off-by: Nikunj A Dadhania --- target-ppc/helper.h | 1 + target-ppc/mem_helper.c | 6 target-ppc/translate/vsx-impl.inc.c | 57

[Qemu-devel] [PATCH RESEND v2 11/17] target-ppc: implement darn instruction

From: Ravi Bangoria darn: Deliver A Random Number Currently return invalid random number for all the case. This needs proper algorithm to provide cryptographically suitable random data. Reading from /dev/random can block and that is not an expected behaviour

[Qemu-devel] [PATCH RESEND v2 14/17] target-ppc: improve lxvw4x implementation

Load 8byte at a time and manipulate. Signed-off-by: Nikunj A Dadhania --- target-ppc/helper.h | 1 + target-ppc/mem_helper.c | 5 + target-ppc/translate/vsx-impl.inc.c | 34 -- 3 files changed, 26

[Qemu-devel] [PATCH RESEND v2 05/17] target-ppc: convert st64 to use new macro

Use macro for ld64 as well, this changes the function signature from gen_qemu_st64 => gen_qemu_st64_i64. Replace this at all the call sites. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 37 ++--

[Qemu-devel] [PATCH RESEND v2 16/17] target-ppc: improve stxvw4x implementation

Manipulate data and store 8bytes instead of 4bytes. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate/vsx-impl.inc.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/target-ppc/translate/vsx-impl.inc.c

[Qemu-devel] [PATCH RESEND v2 08/17] target-ppc: move out stqcx impementation

Being a 16byte operation, qemu_ld/st still does not support this. Move this out so other store operation can use qemu_ld/st in the following patch. Also, convert it to two MO_Q operations for stqcx. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 69

[Qemu-devel] [PATCH RESEND v2 13/17] target-ppc: add stxsi[bh]x instruction

stxsibx - Store VSX Scalar as Integer Byte Indexed stxsihx - Store VSX Scalar as Integer Halfword Indexed Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 2 ++ target-ppc/translate/vsx-impl.inc.c | 3 +++ target-ppc/translate/vsx-ops.inc.c

[Qemu-devel] [PATCH RESEND v2 12/17] target-ppc: add lxsi[bw]zx instruction

lxsibzx - Load VSX Scalar as Integer Byte & Zero Indexed lxsihzx - Load VSX Scalar as Integer Halfword & Zero Indexed Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 2 ++ target-ppc/translate/vsx-impl.inc.c | 2 ++

[Qemu-devel] [PATCH RESEND v2 02/17] target-ppc: convert ld64 to use new macro

Use macro for ld64 as well, this changes the function signature from gen_qemu_ld64 => gen_qemu_ld64_i64. Replace this at all the call sites. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 39 +++---

[Qemu-devel] [PATCH RESEND v2 07/17] target-ppc: consolidate load with reservation

Use tcg_gen_qemu_ld in the load with reservation instructions. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c

[Qemu-devel] [PATCH RESEND v2 09/17] target-ppc: consolidate store conditional

Use tcg_gen_qemu_st store conditional instructions. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 58 +- 1 file changed, 24 insertions(+), 34 deletions(-) diff --git a/target-ppc/translate.c

[Qemu-devel] [PATCH RESEND v2 10/17] target-ppc: add xxspltib instruction

xxspltib: VSX Vector Splat Immediate Byte Copy the immediate byte in each byte of target VSR Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 2 ++ target-ppc/translate/vsx-impl.inc.c | 20

[Qemu-devel] [PATCH RESEND v2 04/17] target-ppc: consolidate store operations

Implement macro to consolidate store operations using newer tcg_gen_qemu_st function. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 35 --- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git

[Qemu-devel] [PATCH RESEND v2 06/17] target-ppc: convert st[16, 32, 64]r to use new macro

Make byte-swap routines use the common GEN_QEMU_LOAD macro Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 32 ++-- 1 file changed, 10 insertions(+), 22 deletions(-) diff --git a/target-ppc/translate.c

[Qemu-devel] [PATCH RESEND v2 00/17] POWER9 TCG enablements - part4

1) Consolidate Load/Store operations using tcg_gen_qemu_ld/st functions 2) This series contains 10 new instructions for POWER9 ISA3.0 Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x. Patches: 01-09: Cleanup load/store operations in ppc translator 10: xxspltib: VSX

[Qemu-devel] [PATCH RESEND v2 03/17] target-ppc: convert ld[16, 32, 64]ur to use new macro

Make byte-swap routines use the common GEN_QEMU_LOAD macro Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 27 ++- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c

[Qemu-devel] [PATCH RESEND v2 01/17] target-ppc: consolidate load operations

Implement macro to consolidate store operations using newer tcg_gen_qemu_ld functions. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 58 +- 1 file changed, 20 insertions(+), 38 deletions(-) diff --git

[Qemu-devel] [PATCH v2] kvm-all: drop kvm_setup_guest_memory

kvm_setup_guest_memory only does "madvise to QEMU_MADV_DONTFORK" and is only called by ram_block_add, which actually is duplicate code. Bonus: add simple comment for kvm_has_sync_mmu to make life easier. Suggested-by: Paolo Bonzini Signed-off-by: Cao jin

Re: [Qemu-devel] [PATCH] kvm-all: drop kvm_setup_guest_memory

Hi, Your series failed automatic build test. Please find the testing commands and their output below. If you have docker installed, you can probably reproduce it locally. Type: series Message-id: 1473591360-13163-1-git-send-email-caoj.f...@cn.fujitsu.com Subject: [Qemu-devel] [PATCH] kvm-all:

Re: [Qemu-devel] [PATCH v3 3/3] target-ppc: tlbie should have global effect

Benjamin Herrenschmidt writes: > On Mon, 2016-09-12 at 11:18 +0530, Nikunj A Dadhania wrote: >> diff --git a/target-ppc/translate.c b/target-ppc/translate.c >> index 5026804..d96ff66 100644 >> --- a/target-ppc/translate.c >> +++ b/target-ppc/translate.c >> @@ -4448,6

Re: [Qemu-devel] [PATCH v3 0/3] ppc: Broadcast tlb flush should have global effect

Benjamin Herrenschmidt writes: > On Mon, 2016-09-12 at 11:18 +0530, Nikunj A Dadhania wrote: >> PowerPC targets should do tlb invalidation on other cpus on  >> instructions that expect a global effect. >> >> * ptesync for BookS >> * tlbsync primarily for BookE >>  

Re: [Qemu-devel] [PATCH v3 3/3] target-ppc: tlbie should have global effect

Benjamin Herrenschmidt writes: > On Mon, 2016-09-12 at 11:18 +0530, Nikunj A Dadhania wrote: >> diff --git a/target-ppc/translate.c b/target-ppc/translate.c >> index 5026804..d96ff66 100644 >> --- a/target-ppc/translate.c >> +++ b/target-ppc/translate.c >> @@ -4448,6

Re: [Qemu-devel] [PATCH v3 3/3] target-ppc: tlbie should have global effect

On Mon, 2016-09-12 at 11:18 +0530, Nikunj A Dadhania wrote: > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index 5026804..d96ff66 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -4448,6 +4448,7 @@ static void gen_tlbie(DisasContext *ctx) >  #if

Re: [Qemu-devel] [PATCH v3 0/3] ppc: Broadcast tlb flush should have global effect

On Mon, 2016-09-12 at 11:18 +0530, Nikunj A Dadhania wrote: > PowerPC targets should do tlb invalidation on other cpus on  > instructions that expect a global effect. > > * ptesync for BookS > * tlbsync primarily for BookE >   (for BookS make it a nop, as it always come along with ptesync) > *

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