[Qemu-devel] [PATCH v5 3/3] intel_iommu: allow UNMAP notifiers

Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism. Before that is achieved, let's open a door for vhost DMAR support, which only requires cache invalidations (UNMAP operations). Meanwhile, converting hw_error() to error_report() and exit(1), to make the error messages clean and

[Qemu-devel] [PULL 04/27] MAINTAINERS: Add include/hw/unicore32/ to UniCore32 section

From: Thomas Huth get_maintainer.pl now properly recognizes that the file in include/hw/unicore32/ belongs to UniCore32. Signed-off-by: Thomas Huth Acked-by: Guan Xuetao Signed-off-by: Michael Tokarev --- MAINTAINERS

[Qemu-devel] [PULL 10/27] MAINTAINERS: Fix up F: entry bit rot

From: Markus Armbruster include/hw/xilinx.h is gone since commit d5001cf, drop. include/hw/*/xlnx*.c is a typo, change .c to .h. include/hw/acpi/piix.h is a typo, change piix.h to piix4.h. hw/i386/*dsl and scripts/acpi*py are gone since since commit 9fc6502, drop.

[Qemu-devel] [PULL 26/27] linux-user/qemu.h: change malloc to g_malloc, free to g_free

From: Md Haris Iqbal Signed-off-by: Md Haris Iqbal Reviewed-by: Stefan Hajnoczi Signed-off-by: Michael Tokarev --- linux-user/qemu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [Qemu-devel] [virtio-dev] Re: [PATCH v2 02/15] crypto: introduce crypto queue handler

On 14/09/2016, 03:07, "Gonglei (Arei)" wrote: >Hi Ola, > > > >> -Original Message- >> From: Ola Liljedahl [mailto:ola.liljed...@arm.com] >> Sent: Tuesday, September 13, 2016 7:53 PM >> To: Paolo Bonzini; Daniel P. Berrange; Gonglei (Arei) >> Cc:

[Qemu-devel] [PATCH v5 2/3] memory: introduce IOMMUOps.notify_flag_changed

The new interface can be used to replace the old notify_started() and notify_stopped(). Meanwhile it provides explicit flags so that IOMMUs can know what kind of notifications it is requested for. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 6 --

[Qemu-devel] [PULL 08/27] MAINTAINERS: Fix wildcard for scsi headers

From: Thomas Huth get_maintainer.pl currently thinks that the scsi headers are currrently unmaintained. So let's fix the corresponding wildcard expression. Signed-off-by: Thomas Huth Acked-by: Paolo Bonzini Signed-off-by: Michael

[Qemu-devel] [PULL 20/27] linux-user,s390x: remove useless cast

From: Laurent Vivier This patch is the result of coccinelle script scripts/coccinelle/typecast.cocci CC: Riku Voipio CC: Alexander Graf Signed-off-by: Laurent Vivier Signed-off-by: Michael Tokarev

Re: [Qemu-devel] [RFC PATCH v1 10/22] sev: add SEV debug decrypt command

On 14/09/2016 04:28, Michael S. Tsirkin wrote: > On Tue, Sep 13, 2016 at 10:48:27AM -0400, Brijesh Singh wrote: >> The SEV DEBUG_DECRYPT command is used for decrypting a guest memory >> for the debugging purposes. Note that debugging is permitting only >> when guest policy allows it. > > When

Re: [Qemu-devel] [PATCH] bitmap: refine and move BITMAP_{FIRST/LAST}_WORD_MASK

On 14/09/2016 09:33, Michael Tokarev wrote: > Is this (quite old) patch still relevant? Yes, I think it's a nice cleanup. The interesting bit is that it expands nbits exactly once. Paolo > Thanks, > > /mjt > > 05.03.2016 16:47, Wei Yang wrote: >> According to linux kernel commit

Re: [Qemu-devel] [RFC PATCH v1 15/22] i386: sev: register RAM read/write ops for BIOS and PC.RAM region

So looking at code, i have impression that write will go through the cpu_physical_memory_write_rom but the read will still go through address_space_rw which will eventually invoke address_space_read. Yes, you'd have to modify it a bit. Something like Sure this will works, thanks for the

Re: [Qemu-devel] [RFC PATCH v1 15/22] i386: sev: register RAM read/write ops for BIOS and PC.RAM region

On 15/09/2016 00:06, Brijesh Singh wrote: > > here is what I see: > > int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, > uint8_t *buf, int len, int is_write) > { > > >if (is_write) >cpu_physical_memory_write_rom_internal() > else

Re: [Qemu-devel] [PATCH v2 3/6] trace: remove some now unused functions

Daniel P Berrange writes: > The trace_event_count, trace_event_id and > trace_event_pattern methods are no longer required > now that everything is using the iterator APIs > The trace_event_set_state and trace_event_set_vcpu_state > macros were also unused. > Signed-off-by: Daniel P. Berrange

Re: [Qemu-devel] [PATCH 0/5] ps2: fix keyboard set 3 and misc improvements

Hi, Your series failed automatic build test. Please find the testing commands and their output below. If you have docker installed, you can probably reproduce it locally. Type: series Message-id: 1473890265-3304-1-git-send-email-hpous...@reactos.org Subject: [Qemu-devel] [PATCH 0/5] ps2: fix

Re: [Qemu-devel] [PATCH v2 1/2] xen_platform: unplug also SCSI disks

On Fri, 2 Sep 2016, Olaf Hering wrote: > Using 'vdev=sd[a-o]' will create an emulated LSI controller, which can > be used by the emulated BIOS to boot from disk. If the HVM domU has also > PV driver the disk may appear twice in the guest. To avoid this an > unplug of the emulated hardware is

Re: [Qemu-devel] [PATCH v4 3/3] target-ppc: tlbie/tlbivax should have global effect

On Thu, Sep 15, 2016 at 11:41:01AM +1000, Benjamin Herrenschmidt wrote: > On Thu, 2016-09-15 at 10:25 +1000, David Gibson wrote: > > >  void helper_booke206_tlbivax(CPUPPCState *env, target_ulong > > address) > > >  { > > > -    PowerPCCPU *cpu = ppc_env_get_cpu(env); > > > +    CPUState *cs; > >

Re: [Qemu-devel] [PATCH RESEND v2 11/17] target-ppc: implement darn instruction

On Mon, Sep 12, 2016 at 12:11:40PM +0530, Nikunj A Dadhania wrote: > From: Ravi Bangoria > > darn: Deliver A Random Number > > Currently return invalid random number for all the case. This needs > proper algorithm to provide cryptographically suitable random

Re: [Qemu-devel] [PATCH RESEND v2 15/17] target-ppc: add lxvb16x and lxvh8x

On Mon, Sep 12, 2016 at 12:11:44PM +0530, Nikunj A Dadhania wrote: > lxvb16x: Load VSX Vector Byte*16 > lxvh8x: Load VSX Vector Halfword*8 > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/helper.h | 1 + > target-ppc/mem_helper.c |

Re: [Qemu-devel] [PATCH v4 0/3] block: Fix libbz2 library dependency regresssion

On Wed, 09/14 16:48, Max Reitz wrote: > On 2016-09-14 at 16:35, Stefan Hajnoczi wrote: > > On Mon, Sep 05, 2016 at 10:50:42AM +0800, Fam Zheng wrote: > > > v4: Remove unused variable in patch 1 and unwanted warning in patch 2. > > > [Max] > > > > > > v3: Fix typo in copyright header. [Max] > > >

Re: [Qemu-devel] [PATCH RESEND v2 17/17] target-ppc: add stxvb16x and stxvh8x

On Mon, Sep 12, 2016 at 12:11:46PM +0530, Nikunj A Dadhania wrote: > stxvb16x: Store VSX Vector Byte*16 > stxvh8x: Store VSX Vector Halfword*8 > > Signed-off-by: Nikunj A Dadhania Basically the same comments as on the load side - this looks bogus to me. I think it

Re: [Qemu-devel] [PATCH RESEND v2 16/17] target-ppc: improve stxvw4x implementation

On Mon, Sep 12, 2016 at 12:11:45PM +0530, Nikunj A Dadhania wrote: > Manipulate data and store 8bytes instead of 4bytes. > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/translate/vsx-impl.inc.c | 27 +-- > 1 file changed, 13

Re: [Qemu-devel] [PATCH RESEND v2 14/17] target-ppc: improve lxvw4x implementation

On Mon, Sep 12, 2016 at 12:11:43PM +0530, Nikunj A Dadhania wrote: > Load 8byte at a time and manipulate. > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/helper.h | 1 + > target-ppc/mem_helper.c | 5 + >

Re: [Qemu-devel] [RFC PATCH v1 13/22] hmp: update 'info kvm' to display SEV status

On Wed, Sep 14, 2016 at 11:16:12AM -0500, Brijesh Singh wrote: > Hi Eric, > > Thanks for feedback. > > > > # @present: true if KVM acceleration is built into this executable > > > # > > > +# @sev: true if SEV is active > > > > Worth expanding what the acronym stands for. Also needs a '(since

Re: [Qemu-devel] [PATCH v3 25/34] tests: add atomic_add-bench

On Wed, Sep 14, 2016 at 14:53:14 +0100, Alex Bennée wrote: > Richard Henderson writes: > > From: "Emilio G. Cota" > > QEMU_CFLAGS += -I$(SRC_PATH)/tests > > @@ -465,6 +466,7 @@ tests/test-qdist$(EXESUF): tests/test-qdist.o > > $(test-util-obj-y) > >

Re: [Qemu-devel] [PATCH v2 2/2] xen_platform: SUSE xenlinux unplug for emulated PCI

On Fri, 2 Sep 2016, Olaf Hering wrote: > Implement SUSE specific unplug protocol for emulated PCI devices > in PVonHVM guests. Its a simple 'outl(1, (ioaddr + 4));'. > This protocol was implemented and used since Xen 3.0.4. > It is used in all SUSE/SLES/openSUSE releases up to SLES11SP3 and >

Re: [Qemu-devel] [PATCH RESEND v2 00/17] POWER9 TCG enablements - part4

On Thu, Sep 15, 2016 at 10:56:56AM +1000, David Gibson wrote: > On Mon, Sep 12, 2016 at 12:11:29PM +0530, Nikunj A Dadhania wrote: > > 1) Consolidate Load/Store operations using tcg_gen_qemu_ld/st functions > > 2) This series contains 10 new instructions for POWER9 ISA3.0 > >Use newer qemu

Re: [Qemu-devel] [PATCH v4 3/3] target-ppc: tlbie/tlbivax should have global effect

On Thu, 2016-09-15 at 10:25 +1000, David Gibson wrote: > >  void helper_booke206_tlbivax(CPUPPCState *env, target_ulong > address) > >  { > > -    PowerPCCPU *cpu = ppc_env_get_cpu(env); > > +    CPUState *cs; > >   > >  if (address & 0x4) { > >  /* flush all entries */ > > @@ -2774,11

Re: [Qemu-devel] [PATCH v7 0/2] qemu-qdisk: Implementation of grant copy operation.

Hi Wei, I am happy to queue up this for QEMU, but I'll wait for the first patch to be committed to Xen before sending a pull request. Is that OK? Cheers, Stefano On Wed, 14 Sep 2016, Paulina Szubarczyk wrote: > Hi, > > It is a proposition for implementation of grant copy operation in

Re: [Qemu-devel] [PATCH] pc: apic: introduce APIC macro

On Thu, Sep 15, 2016 at 08:43:33AM +0800, Wanpeng Li wrote: > From: Wanpeng Li > > Introduce a new APIC macro to replace APIC_COMMON macro in > hw/intc/apic.c in order to capture access LAPIC in qemu > even if LAPIC is emulated in kvm. > > Suggested-by: Paolo Bonzini

[Qemu-devel] [PATCH V3 2/2] arm: virt: add PMU property to mach-virt machine type

CPU vPMU is now turned off by default, but it was ON in virt-2.7 machine type. To solve this problem, this patch adds a PMU option in machine state, which is used to control CPU's vPMU status. This PMU option is not exposed to command line and is turned on in virt-2.7 machine type to make sure it

[Qemu-devel] [PATCH V3 0/2] Add option to configure guest vPMU

This patchset adds a pmu=[on/off] option to enable/disable vPMU support for guest VM. There are several reasons to justify this option. First, vPMU can be problematic for cross-migration between different SoC as perf counters are architecture-dependent. It is more flexible to have an option to

[Qemu-devel] [PATCH V3 1/2] arm64: Add an option to turn on/off vPMU support

This patch adds a pmu=[on/off] option to enable/disable vPMU support in guest vCPU. This option is only available for cortex-a57/cortex-53/ host under both TCG and KVM modes, but unavailable on ARMv7 and other processors. It allows virt tools, such as libvirt, to determine the exsitence of vPMU

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