Re: [Qemu-devel] [PATCH v8] Allow setting NUMA distance for different NUMA nodes

On Tue, Apr 25, 2017 at 09:52:33AM +0800, He Chen wrote: > This patch is going to add SLIT table support in QEMU, and provides > additional option `dist` for command `-numa` to allow user set vNUMA > distance by QEMU command. > > With this patch, when a user wants to create a guest that contains

Re: [Qemu-devel] [PATCH 2/2] migration: to_dst_file at that point is NULL

On 25/04/2017 12:17, Juan Quintela wrote: > We have just arrived as: > > migration.c: qemu_migrate() > > s = migrate_init() <- puts it to NULL > > {tcp,unix}_start_outgoing_migration -> > socket_outgoing_migration > migration_channel_connect() > sets

[Qemu-devel] [PATCH 12/13] arm: add MPU support to M profile CPUs

From: Michael Davidsaver The M series MPU is almost the same as the already implemented R profile MPU (v7 PMSA). So all we need to implement here is the MPU register interface in the system register space. This implementation has the same restriction as the R profile MPU

[Qemu-devel] [PATCH 09/13] armv7m: Implement M profile default memory map

From: Michael Davidsaver Add support for the M profile default memory map which is used if the MPU is not present or disabled. The main differences in behaviour from implementing this correctly are that we set the PAGE_EXEC attribute on the right regions of memory, such

[Qemu-devel] [PATCH 07/13] arm: Remove unnecessary check on cpu->pmsav7_dregion

Now that we enforce both: * pmsav7_dregion == 0 implies has_mpu == false * PMSA with has_mpu == false means SCTLR.M cannot be set we can remove a check on pmsav7_dregion from get_phys_addr_pmsav7(), because we can only reach this code path if the MPU is enabled (and so

[Qemu-devel] [PATCH 04/13] arm: Clean up handling of no-MPU PMSA CPUs

ARM CPUs come in two flavours: * proper MMU ("VMSA") * only an MPU ("PMSA") For PMSA, the MPU may be implemented, or not (in which case there is default "always acts the same" behaviour, but it isn't guest programmable). QEMU is a bit confused about how we indicate this: we have an

Re: [Qemu-devel] [PATCH] COLO-compare: Add compare_lock aviod comparison conflict

On 04/25/2017 08:07 PM, Hailiang Zhang wrote: On 2017/4/25 19:57, Zhang Chen wrote: On 04/20/2017 02:40 PM, Jason Wang wrote: On 2017年04月20日 14:36, Zhang Chen wrote: On 04/20/2017 02:20 PM, Hailiang Zhang wrote: On 2017/4/20 12:32, Zhang Chen wrote: When network traffic heavy,

Re: [Qemu-devel] [PATCH v2 06/13] tcg: add goto_ptr opcode

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: +void tcg_gen_goto_ptr(TCGv_ptr ptr) +{ +if (TCG_TARGET_HAS_goto_ptr) { +tcg_gen_op1i(INDEX_op_goto_ptr, GET_TCGV_PTR(ptr)); +} else { +tcg_gen_exit_tb(0); +} +} + I think this function should look more like void

Re: [Qemu-devel] [PATCH] COLO-compare: Add compare_lock aviod comparison conflict

On 2017/4/25 19:57, Zhang Chen wrote: On 04/20/2017 02:40 PM, Jason Wang wrote: On 2017年04月20日 14:36, Zhang Chen wrote: On 04/20/2017 02:20 PM, Hailiang Zhang wrote: On 2017/4/20 12:32, Zhang Chen wrote: When network traffic heavy, compare_pri_rs_finalize() and compare_sec_rs_finalize()

[Qemu-devel] [PATCH 08/13] armv7m: Improve "-d mmu" tracing for PMSAv7 MPU

From: Michael Davidsaver Improve the "-d mmu" tracing for the PMSAv7 MPU translation process as an aid in debugging guest MPU configurations: * fix a missing newline for a guest-error log * report the region number with guest-error or unimp logs of bad region register

Re: [Qemu-devel] [PATCH] ui/cocoa.m: Fix macOS 10.12 deprecation warnings

On 25 April 2017 at 07:29, Brendan Shanks wrote: > macOS 10.12 deprecated/replaced many AppKit constants to make naming > more consistent. Use the new constants, and #define them to the > old constants when compiling against a pre-10.12 SDK. > > Signed-off-by: Brendan Shanks

[Qemu-devel] [PATCH 02/13] arm: Add support for M profile CPUs having different MMU index semantics

The M profile CPU's MPU has an awkward corner case which we would like to implement with a different MMU index. We can avoid having to bump the number of MMU modes ARM uses, because some of our existing MMU indexes are only used by non-M-profile CPUs, so we can borrow one. To avoid that getting

[Qemu-devel] [PATCH 11/13] armv7m: Classify faults as MemManage or BusFault

From: Michael Davidsaver General logic is that operations stopped by the MPU are MemManage, and those which go through the MPU and are caught by the unassigned handle are BusFault. Distinguish these by looking at the exception.fsr values, and set the CFSR bits and (if

[Qemu-devel] [PATCH 10/13] arm: All M profile cores are PMSA

All M profile CPUs are PMSA, so set the feature bit. (We haven't actually implemented the M profile MPU register interface yet, but setting this feature bit gives us closer to correct behaviour for the MPU-disabled case.) Signed-off-by: Peter Maydell ---

[Qemu-devel] [PATCH 01/13] arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access()

When identifying the DFSR format for an alignment fault, use the mmu index that we are passed, rather than calling cpu_mmu_index() to get the mmu index for the current CPU state. This doesn't actually make any difference since the only cases where the current MMU index differs from the index used

[Qemu-devel] [PATCH 13/13] arm: Implement HFNMIENA support for M profile MPU

Implement HFNMIENA support for the M profile MPU. This bit controls whether the MPU is treated as enabled when executing at execution priorities of less than zero (in NMI, HardFault or with the FAULTMASK bit set). Doing this requires us to use a different MMU index for "running at execution

[Qemu-devel] [PATCH 06/13] arm: Don't let no-MPU PMSA cores write to SCTLR.M

If the CPU is a PMSA config with no MPU implemented, then the SCTLR.M bit should be RAZ/WI, so that the guest can never turn on the non-existent MPU. Signed-off-by: Peter Maydell --- target/arm/helper.c | 5 + 1 file changed, 5 insertions(+) diff --git

[Qemu-devel] [PATCH 03/13] arm: Use different ARMMMUIdx values for M profile

Make M profile use completely separate ARMMMUIdx values from those that A profile CPUs use. This is a prelude to adding support for the MPU and for v8M, which together will require 6 MMU indexes which don't map cleanly onto the A profile uses: non secure User non secure Privileged non secure

[Qemu-devel] [PATCH 00/13] armv7m: Implement MPU support

This patchset implements support for the MPU in our v7M cores. Support is on the same level as that for the R profile MPU: it works, but regions smaller than 1K in size are not supported. It likely has some missing corner-case features. The patchset can be divided into three parts: * patches

[Qemu-devel] [PATCH 05/13] arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs

Fix the handling of QOM properties for PMSA CPUs with no MPU: Allow no-MPU to be specified by either: * has-mpu = false * pmsav7_dregion = 0 and make setting one imply the other. Don't clear the PMSA feature bit in this situation. Signed-off-by: Peter Maydell ---

Re: [Qemu-devel] [BUG] QEMU crashes with dpdk virtio pmd

On 2017年04月25日 19:37, wangyunjian wrote: The q->tx_bh will free in virtio_net_del_queue() function, when remove virtio queues if the guest doesn't support multiqueue. But it might be still referenced by others (eg . virtio_net_set_status()), which need so set NULL. diff --git

Re: [Qemu-devel] [PATCH 1/2] migration: Move check_migratable() into qdev.c

On 25/04/2017 12:17, Juan Quintela wrote: > The function is only used once, and nothing else in migration knows > about objects. Create the function vmstate_device_is_migratable() in > savem.c that really do the bit that is related with migration. > > Signed-off-by: Juan Quintela

Re: [Qemu-devel] [PATCH] COLO-compare: Add compare_lock aviod comparison conflict

On 04/20/2017 02:40 PM, Jason Wang wrote: On 2017年04月20日 14:36, Zhang Chen wrote: On 04/20/2017 02:20 PM, Hailiang Zhang wrote: On 2017/4/20 12:32, Zhang Chen wrote: When network traffic heavy, compare_pri_rs_finalize() and compare_sec_rs_finalize() have a chance to confilct. Both of

Re: [Qemu-devel] [virtio-comment] Re: [RFC 1/2] spec/vhost-user: Introduce secondary channel for slave initiated requests

Hi Wei, On 04/24/2017 10:05 AM, Wei Wang wrote: On 04/14/2017 05:03 PM, Marc-André Lureau wrote: Hi On Tue, Apr 11, 2017 at 5:53 PM Maxime Coquelin > wrote: Hi Marc-André, On 04/11/2017 03:06 PM, Marc-André Lureau

Re: [Qemu-devel] [PATCH] ram: Split dirty bitmap by RAMBlock

On 2017/4/25 18:11, Juan Quintela wrote: Both the ram bitmap and the unsent bitmap are split by RAMBlock. Signed-off-by: Juan Quintela --- include/exec/ram_addr.h | 13 +- include/migration/postcopy-ram.h | 3 - migration/postcopy-ram.c | 5 +-

Re: [Qemu-devel] [PATCH 3/6] migration: add UFFD_FEATURE_THREAD_ID feature support

On 04/25/2017 02:14 PM, Dr. David Alan Gilbert wrote: * Alexey (a.pereva...@samsung.com) wrote: + Andrea Arcangeli On Mon, Apr 24, 2017 at 06:10:02PM +0100, Dr. David Alan Gilbert wrote: * Alexey (a.pereva...@samsung.com) wrote: On Mon, Apr 24, 2017 at 04:12:29PM +0800, Peter Xu wrote: On

[Qemu-devel] [PULL 2/2] s390x/misc_helper.c: wrap s390_virtio_hypercall in BQL

From: Aurelien Jarno s390_virtio_hypercall can trigger IO events and interrupts, most notably when using virtio-ccw devices. Reviewed-by: Alexander Graf Signed-off-by: Aurelien Jarno Reviewed-by: Philippe Mathieu-Daudé

[Qemu-devel] [PULL 1/2] target-s390x: Mask the SIGP order_code to 8bit.

From: Philipp Kern According to "CPU Signaling and Response", "Signal-Processor Orders", the order field is bit position 56-63. Without this, the Linux guest kernel is sometimes unable to stop emulation and enters an infinite loop of "XXX unknown sigp: 0x0005".

Re: [Qemu-devel] [PATCH v8] Allow setting NUMA distance for different NUMA nodes

On Tue, 25 Apr 2017 09:52:33 +0800 He Chen wrote: > This patch is going to add SLIT table support in QEMU, and provides > additional option `dist` for command `-numa` to allow user set vNUMA > distance by QEMU command. > > With this patch, when a user wants to create a

[Qemu-devel] [PULL 0/2] s390 patch queue 2017-04-25

Hi Peter, This is my current patch queue for s390. Please pull. Alex The following changes since commit f4b5b021c847669b1c78050aea26fe9abceef6dd: Merge remote-tracking branch 'remotes/cody/tags/block-pull-request' into staging (2017-04-25 09:21:54 +0100) are available in the git

Re: [Qemu-devel] [PATCH RESEND v2 01/18] net/colo: Add notifier/callback related helpers for filter

On 2017年04月22日 16:35, zhanghailiang wrote: We will use this notifier to help COLO to notify filter object to do something, like do checkpoint, or process failover event. Cc: Jason Wang Signed-off-by: zhanghailiang Signed-off-by: Zhang

Re: [Qemu-devel] [BUG] QEMU crashes with dpdk virtio pmd

The q->tx_bh will free in virtio_net_del_queue() function, when remove virtio queues if the guest doesn't support multiqueue. But it might be still referenced by others (eg . virtio_net_set_status()), which need so set NULL. diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index

Re: [Qemu-devel] [PATCH v2] hw/arm/exynos: Add generic SDHCI devices

On 22 April 2017 at 20:07, Krzysztof Kozlowski wrote: > Exynos4210 has four SD/MMC controllers supporting: > - SD Standard Host Specification Version 2.0, > - MMC Specification Version 4.3, > - SDIO Card Specification Version 2.0, > - DMA and ADMA. > > Add emulation of SDHCI

Re: [Qemu-devel] [PATCH 1/3] colo-compare: serialize compare thread's initialization with main thread

On 2017年04月25日 17:59, Hailiang Zhang wrote: On 2017/4/25 16:41, Jason Wang wrote: On 2017年04月24日 14:03, Hailiang Zhang wrote: On 2017/4/24 12:10, Jason Wang wrote: On 2017年04月20日 15:46, zhanghailiang wrote: We call qemu_chr_fe_set_handlers() in colo-compare thread, it is used to detach

Re: [Qemu-devel] [PATCH v2 07/13] tcg/i386: implement goto_ptr op

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) { +static const TCGTargetOpDef ri = { .args_ct_str = { "ri" } }; static const TCGTargetOpDef ri_r = { .args_ct_str = { "ri", "r" } }; static const TCGTargetOpDef re_r =

Re: [Qemu-devel] question about block size and virtual disks

Am 21.04.2017 um 18:26 hat Chris Friesen geschrieben: > On 04/20/2017 03:21 PM, Eric Blake wrote: > >On 04/20/2017 04:03 PM, Chris Friesen wrote: > > >>Also, does the 4KB block size get "passed-through" to the guest somehow > >>so that the guest knows it needs to use 4KB blocks, or does that need

Re: [Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit.

On 04/25/2017 01:21 PM, Philipp Kern wrote: On 2017-04-25 11:51, Richard Henderson wrote: On 04/24/2017 10:25 AM, Alexander Graf wrote: On 24.04.17 00:32, Aurelien Jarno wrote: From: Philipp Kern According to "CPU Signaling and Response", "Signal-Processor Orders", the

[Qemu-devel] [PULL V2 8/8] COLO-compare: Optimize tcp compare trace event

From: Zhang Chen Optimize two trace events as one, adjust print format make it easy to read. rename trace_colo_compare_pkt_info_src/dst to trace_colo_compare_tcp_info. Signed-off-by: Zhang Chen Signed-off-by: Jason Wang

[Qemu-devel] [PULL V2 5/8] aspeed: add a FTGMAC100 nic

From: Cédric Le Goater There is a second NIC but we do not use it for the moment. We use the 'aspeed' property to tune the definition of the end of ring buffer bit for the Aspeed SoCs. Signed-off-by: Cédric Le Goater Signed-off-by: Jason Wang

[Qemu-devel] [PULL V2 3/8] net: add FTGMAC100 support

From: Cédric Le Goater The FTGMAC100 device is an Ethernet controller with DMA function that can be found on Aspeed SoCs (which include NCSI). It is fully compliant with IEEE 802.3 specification for 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000 Mbps Ethernet and

[Qemu-devel] [PULL V2 7/8] COLO-compare: Optimize tcp compare for option field

From: Zhang Chen In this patch we support packet that have tcp options field. Add tcp options field check, If the packet have options field we just skip it and compare tcp payload, Avoid unnecessary checkpoint, optimize performance. Signed-off-by: Zhang Chen

[Qemu-devel] [PULL V2 6/8] slirp: add a fake NC-SI backend

From: Cédric Le Goater NC-SI (Network Controller Sideband Interface) enables a BMC to manage a set of NICs on a system. This model takes the simplest approach and reverses the NC-SI packets to pretend a NIC is present and exercise the Linux driver. The NCSI header file comes

[Qemu-devel] [PULL V2 1/8] colo-compare: Fix old packet check bug.

From: Zhang Chen If colo-compare find one old packet,we can notify colo-frame do checkpoint, no need continue find more old packet here. Signed-off-by: Zhang Chen Signed-off-by: Jason Wang ---

[Qemu-devel] [PULL V2 0/8] Net patches

The following changes since commit 32c7e0ab755745e961f1772e95cac381cc68769d: Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170421' into staging (2017-04-21 15:59:27 +0100) are available in the git repository at: https://github.com/jasowang/qemu.git

[Qemu-devel] [PULL V2 4/8] net/ftgmac100: add a 'aspeed' property

From: Cédric Le Goater The Aspeed SoCs have a different definition of the end of the ring buffer bit. Add a property to specify which set of bits should be used by the NIC. Signed-off-by: Cédric Le Goater Signed-off-by: Jason Wang ---

[Qemu-devel] [PULL V2 2/8] hw/net: add MII definitions

From: Cédric Le Goater This adds comments on the Basic mode control and status registers bit definitions. It also adds a couple of bits for 1000BASE-T and the RealTek 8211E PHY for the FTGMAC100 model to use. Signed-off-by: Cédric Le Goater Reviewed-by: Philippe

Re: [Qemu-devel] [PATCH] tcg: Initialize return value after exit_atomic

On 04/25/2017 01:21 PM, Nikunj A Dadhania wrote: Richard Henderson writes: Users of tcg_gen_atomic_cmpxchg and do_atomic_op rightfully utilize the output. Even though this code is dead, it gets translated, and without the initialization we encounter a tcg_error.

Re: [Qemu-devel] [PATCH v2 07/13] tcg/i386: implement goto_ptr op

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: +case INDEX_op_goto_ptr: +/* save target address into new register */ +tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_EDX, a0); +/* set return value to 0 */ +tgen_arithr(s, ARITH_XOR, TCG_REG_EAX, TCG_REG_EAX); +/*

Re: [Qemu-devel] [PATCH 2/6] util: introduce glib-helper.c

* Peter Maydell (peter.mayd...@linaro.org) wrote: > On 21 April 2017 at 16:10, Alexey wrote: > > Hello, thank you for so detailed comment, > > > > On Fri, Apr 21, 2017 at 11:27:55AM +0100, Peter Maydell wrote: > > >> Can we have a proper doc comment format comment,

Re: [Qemu-devel] [PATCH] tcg: Initialize return value after exit_atomic

Richard Henderson writes: > Users of tcg_gen_atomic_cmpxchg and do_atomic_op rightfully utilize > the output. Even though this code is dead, it gets translated, and > without the initialization we encounter a tcg_error. > > Reported-by: Nikunj A Dadhania

Re: [Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit.

On 2017-04-25 11:51, Richard Henderson wrote: On 04/24/2017 10:25 AM, Alexander Graf wrote: On 24.04.17 00:32, Aurelien Jarno wrote: From: Philipp Kern According to "CPU Signaling and Response", "Signal-Processor Orders", the order field is bit position 56-63. Without this,

Re: [Qemu-devel] [PATCH v2 13/13] tb-hash: improve tb_jmp_cache hash function in user mode

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: Optimizations to cross-page chaining and indirect branches make performance more sensitive to the hit rate of tb_jmp_cache. The constraint of reserving some bits for the page number lowers the achievable quality of the hashing function.

Re: [Qemu-devel] [PATCH RESEND v2 08/18] ram/COLO: Record the dirty pages that SVM received

On 2017/4/25 2:29, Juan Quintela wrote: zhanghailiang wrote: We record the address of the dirty pages that received, it will help flushing pages that cached into SVM. Here, it is a trick, we record dirty pages by re-using migration dirty bitmap. In the later

Re: [Qemu-devel] [PATCH v2 02/13] exec-all: inline tb_from_jmp_cache

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: +/* tb_hash_func() in tb-hash.h needs tb_page_addr_t, defined above */ +#include "tb-hash.h" + This causes an include loop (I think), and quite a few targets fail to build. Are you using --target-list in your testing? r~

Re: [Qemu-devel] [PATCH 3/6] migration: add UFFD_FEATURE_THREAD_ID feature support

* Alexey (a.pereva...@samsung.com) wrote: > + Andrea Arcangeli > > On Mon, Apr 24, 2017 at 06:10:02PM +0100, Dr. David Alan Gilbert wrote: > > * Alexey (a.pereva...@samsung.com) wrote: > > > On Mon, Apr 24, 2017 at 04:12:29PM +0800, Peter Xu wrote: > > > > On Fri, Apr 21, 2017 at 06:22:12PM

Re: [Qemu-devel] [PATCH v2 09/13] target/arm: optimize indirect branches with TCG's goto_ptr

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: + +gen_jr = false; +gen_helper_lookup_tb_ptr(ptr, cpu_env, cpu_R[15]); +tcg_gen_goto_ptr(ptr); +tcg_temp_free_ptr(ptr); +break; Likewise doesn't compile for aarch64.

Re: [Qemu-devel] [PATCH v2 08/13] target/arm: optimize cross-page block chaining in softmmu

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: Instead of unconditionally exiting to the exec loop, use the lookup_tb_ptr helper to jump to the target if it is valid. As long as the hit rate in tb_jmp_cache remains high, this will improve performance. Perf impact: see the next commit's log.

Re: [Qemu-devel] [PATCH RESEND v2 07/18] COLO: Load dirty pages into SVM's RAM cache firstly

On 2017/4/25 2:27, Juan Quintela wrote: zhanghailiang wrote: We should not load PVM's state directly into SVM, because there maybe some errors happen when SVM is receving data, which will break SVM. We need to ensure receving all data before load the state into

Re: [Qemu-devel] [PATCH v2 06/13] tcg: add goto_ptr opcode

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: @@ -1138,6 +1138,7 @@ void tcg_dump_ops(TCGContext *s) } switch (c) { case INDEX_op_set_label: +case INDEX_op_goto_tb: case INDEX_op_br: case INDEX_op_brcond_i32:

Re: [Qemu-devel] [PATCH RESEND v2 04/18] COLO: integrate colo compare with colo frame

On 2017/4/25 2:18, Juan Quintela wrote: zhanghailiang wrote: For COLO FT, both the PVM and SVM run at the same time, only sync the state while it needs. So here, let SVM runs while not doing checkpoint, change DEFAULT_MIGRATE_X_CHECKPOINT_DELAY to 200*100.

Re: [Qemu-devel] [PATCH v2 05/13] tcg-runtime: add lookup_tb_ptr helper

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: Signed-off-by: Emilio G. Cota --- tcg-runtime.c | 7 +++ tcg/tcg-runtime.h | 2 ++ tcg/tcg.h | 1 + 3 files changed, 10 insertions(+) Modulo what I mentioned earlier about maybe directly inlining

Re: [Qemu-devel] [PATCH v2 03/13] tcg: enforce 64-byte alignment of TCGContext

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: This will allow us to prevent cache line false sharing in TCGContext. Before: $ objdump -t build/x86_64-linux-user/qemu-x86_64 | grep tcg_ctx 003ea820 g O .bss 000152d8 tcg_ctx After: $ objdump -t

Re: [Qemu-devel] [PATCH v2 02/13] exec-all: inline tb_from_jmp_cache

On 04/25/2017 09:53 AM, Emilio G. Cota wrote: The inline improves performance, as shown in upcoming commits' logs. This commit is kept separate to ease review, since the inclusion of tb-hash.h might be controversial. The problem here, which was introduced before this commit, is that

Re: [Qemu-devel] DMG chunk size independence

Hi, cc'ing Peter Wu in... Currently I have completed the task for zlib, uncompressed and zeroed chunks in a DMG file using the approach we discussed earlier. Unfortunately, this approach is not appropriate for bz2 chunks since we cannot restart our decompression from the access point we cached

Re: [Qemu-devel] [PATCH 4/6] migration: calculate downtime on dst side

On 04/25/2017 01:25 PM, Peter Xu wrote: On Tue, Apr 25, 2017 at 01:10:30PM +0300, Alexey Perevalov wrote: On 04/25/2017 11:24 AM, Peter Xu wrote: On Fri, Apr 14, 2017 at 04:17:18PM +0300, Alexey Perevalov wrote: [...] +/* + * This function calculates downtime per cpu and trace it + * + *

[Qemu-devel] [PATCH 10/11] pc-bios/s390-ccw: add boot entry selection to El Torito routine

From: "Eugene (jno) Dvurechenski" If there is no LOADPARM given or '0' specified, then IPL the first matched entry. Otherwise IPL the matching entry of that number. Signed-off-by: Eugene (jno) Dvurechenski Signed-off-by: Farhan Ali

[Qemu-devel] [PATCH 09/11] pc-bios/s390-ccw: add boot entry selection for ECKD DASD

From: Farhan Ali 1. change a bit definition of ScsiMbr to allow an array of pointers 2. add loadparm fetch to boot script processing 3. apply loadparm index to boot entry selection, if any Initial patch from Eugene (jno) Dvurechenski. Signed-off-by: Eugene (jno)

[Qemu-devel] [PATCH 08/11] pc-bios/s390-ccw: provide entry selection on LOADPARM for SCSI disk

From: Farhan Ali Fix SCSI bootmap interpreter to make use of any specified entry of the Program Table using the leftmost numeric value from the LOADPARM, if specified. Initial patch from Eugene (jno) Dvurechenski. Signed-off-by: Eugene (jno) Dvurechenski

[Qemu-devel] [PATCH 11/11] pc-bios/s390-ccw.img: update image

Contains the following commits: - pc-bios/s390-ccw: Make ebcdic/ascii conversion public - pc-bios/s390-ccw: get LOADPARM stored in SCP Read Info - pc-bios/s390-ccw: provide a function to interpret LOADPARM value - pc-bios/s390-ccw: provide entry selection on LOADPARM for SCSI disk -

[Qemu-devel] [PATCH 02/11] hw/s390x/ipl: enable LOADPARM in IPIB for a boot device

From: Farhan Ali Insert the LOADPARM value to the IPL Information Parameter Block. An IPL Information Parameter Block is created when "bootindex" is specified for a device. If a user specifies "loadparm=", then we store the loadparm value in the created IPIB for that

[Qemu-devel] [PATCH 05/11] pc-bios/s390-ccw: Make ebcdic/ascii conversion public

From: "Eugene (jno) Dvurechenski" Make the ebcdic_to_ascii function public to the rest of the "bios" code, as the volume label is no more the single thing to be converted. Signed-off-by: Eugene (jno) Dvurechenski Signed-off-by: Farhan Ali

[Qemu-devel] [PATCH 07/11] pc-bios/s390-ccw: provide a function to interpret LOADPARM value

From: Farhan Ali The LOADPARM value is fetched from SCP Read Info, but it's applied only at the phase of bootmap interpretation. So let's read the LOARPARM value and store it. Also provide a parsing function to detect numbers in the LOADPARM which can be used during

[Qemu-devel] [PATCH 04/11] util/qemu-config: Add loadparm to qemu machine_opts

From: Farhan Ali Add S390CcwMachineState machine parameter "loadparm" to qemu machine_opts so libvirt can query for it. Signed-off-by: Farhan Ali Signed-off-by: Cornelia Huck --- util/qemu-config.c | 6 ++ 1

[Qemu-devel] [PATCH 06/11] pc-bios/s390-ccw: get LOADPARM stored in SCP Read Info

From: Farhan Ali Obtain the loadparm value stored in SCP Read Info by performing a SCLP Read Info request. Rename sclp-ascii.c to sclp.c to reflect the changed scope of the file. Signed-off-by: Farhan Ali Reviewed-by: Christian Borntraeger

[Qemu-devel] [PATCH 01/11] hw/s390x: provide loadparm property for the machine

From: Farhan Ali In order to specify the LOADPARM value one may now add ",loadparm=xxx" parameter to the "-machine s390-ccw-virtio" option. The property setter will normalize and check the value provided much like the way the HMC does. The value is stored, but not

[Qemu-devel] [PATCH 03/11] hw/s390x/sclp: update LOADPARM in SCP Info

From: Farhan Ali LOADPARM has two copies: 1. in SCP Information Block 2. in IPL Information Parameter Block So, update SCLP intrinsics now. We always store LOADPARM in SCP information block even if we don't have a valid IPL Information Parameter Block. Initial patch

[Qemu-devel] [PATCH 00/11] s390x: support for LOADPARM

This patchset implements the LOADPARM machine property. This is exposed via SCLP and diagnose 308 to the guest. It will be used by the bios to select a boot entry; guest operating systems can use it as well. Cornelia Huck (1): pc-bios/s390-ccw.img: update image Eugene (jno) Dvurechenski (2):

[Qemu-devel] [PATCH] tcg: Initialize return value after exit_atomic

Users of tcg_gen_atomic_cmpxchg and do_atomic_op rightfully utilize the output. Even though this code is dead, it gets translated, and without the initialization we encounter a tcg_error. Reported-by: Nikunj A Dadhania Signed-off-by: Richard Henderson

[Qemu-devel] [PULL 1/4] hmp: gpa2hva and gpa2hpa hostaddr command

From: Paolo Bonzini These commands are useful when testing machine-check passthrough. gpa2hva is useful to inject a MADV_HWPOISON madvise from gdb, while gpa2hpa is useful to inject an error with the mce-inject kernel module. Signed-off-by: Paolo Bonzini

[Qemu-devel] [PULL 2/4] libqtest: Ignore QMP events when parsing the response for HMP commands

From: Thomas Huth When running certain HMP commands (like "device_del") via QMP, we can sometimes get a QMP event in the response first, so that the "g_assert(ret)" statement in qtest_hmp() triggers and the test fails. Fix this by ignoring such QMP events while looking for the

[Qemu-devel] [PULL 4/4] tests: Add a tester for HMP commands

From: Thomas Huth HMP commands do not get any automatic testing yet, so on certain QEMU machines, some HMP commands were causing crashes in the past. Thus we should test HMP commands in our test suite, too, to avoid that such problems creep in again in the future.

[Qemu-devel] [PULL 3/4] libqtest: Add a generic function to run a callback function for every machine

From: Thomas Huth Some tests need to run single tests for every available machine of the current QEMU binary. To avoid code duplication, let's extract this code that deals with 'query-machines' into a separate function. Signed-off-by: Thomas Huth Message-Id:

[Qemu-devel] [PULL 0/4] hmp queue

itory at: git://github.com/dagrh/qemu.git tags/pull-hmp-20170425 for you to fetch changes up to 1eb8e78dd1cd4e0b4170fd42f6d8882c867f334b: tests: Add a tester for HMP commands (2017-04-25 11:26:52 +0100) HMP pull with fixed

Re: [Qemu-devel] [Qemu-devel RFC v2 1/4] msf2: Add Smartfusion2 System timer

Hi Alistair, On Mon, Apr 24, 2017 at 11:14 PM, Alistair Francis wrote: + +isr = !!(st->regs[R_RIS] & TIMER_RIS_ACK); +ier = !!(st->regs[R_CTRL] & TIMER_CTRL_INTR); + +qemu_set_irq(st->irq, (ier && isr)); +} + +static

[Qemu-devel] [PATCH 2/3] migration: Remove use of old MigrationParams

We have change in the previous patch to use migration capabilities for it. Notice that we continue using the old command line flags from migrate command from the time being. Remove the set_params method as now it is empty. Signed-off-by: Juan Quintela ---

[Qemu-devel] [PATCH 1/3] migration: Create block capabilities for shared and enable

Those two capabilities were added through the command line. Notice that we just created them. This is just the boilerplate. Signed-off-by: Juan Quintela Reviewed-by: Eric Blake --- include/migration/migration.h | 3 +++ migration/migration.c |

[Qemu-devel] [PATCH 3/3] migration: Remove old MigrationParams

Not used anymore after moving block migration to use capabilities. Signed-off-by: Juan Quintela --- include/migration/migration.h | 10 ++ include/migration/vmstate.h | 1 - include/qemu/typedefs.h | 1 - include/sysemu/sysemu.h | 3 +--

[Qemu-devel] [PATCH 0/3] Remove old MigrationParams

Hi Upon a time there were MigrationParms (only used for block migration) and then MigrationParams used for everything else. This series: - create migration capabilities for block parameters - make the migrate command line parameters to use capabilities - remove MigrationParams completely

Re: [Qemu-devel] [PATCH 4/6] migration: calculate downtime on dst side

On Tue, Apr 25, 2017 at 01:10:30PM +0300, Alexey Perevalov wrote: > On 04/25/2017 11:24 AM, Peter Xu wrote: > >On Fri, Apr 14, 2017 at 04:17:18PM +0300, Alexey Perevalov wrote: > > > >[...] > > > >>+/* > >>+ * This function calculates downtime per cpu and trace it > >>+ * > >>+ * Also it

[Qemu-devel] [PATCH 6/6] migration: Pass Error ** argument to {save, load}_vmstate

This way we use the "normal" way of printing errors for hmp commands. -- Paolo suggestion Signed-off-by: Juan Quintela --- hmp.c| 9 +++-- include/sysemu/sysemu.h | 4 ++-- migration/savevm.c | 51

[Qemu-devel] [PATCH 5/6] monitor: Move hmp_info_snapshots from savevm.c to hmp.c

It only uses block/* functions, nothing from migration. Signed-off-by: Juan Quintela --- hmp.c | 143 ++ hmp.h | 1 + include/sysemu/sysemu.h | 1 - migration/savevm.c | 147

[Qemu-devel] [PATCH 4/6] monitor: Move hmp_delvm from savevm.c to hmp.c

It really uses block/* stuff, not migration one. Signed-off-by: Juan Quintela --- hmp.c | 13 + hmp.h | 1 + include/sysemu/sysemu.h | 1 - migration/savevm.c | 13 - 4 files changed, 14 insertions(+), 14

[Qemu-devel] [PATCH 2/6] monitor: Move hmp_loadvm from monitor.c to hmp.c

We are going to move the rest of hmp snapshots functions there instead of monitor.c. Signed-off-by: Juan Quintela --- hmp.c | 13 + hmp.h | 1 + monitor.c | 13 - 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/hmp.c b/hmp.c

[Qemu-devel] [PATCH 0/6] Move snapshots commands to hmp

Hi This series: - Move snapshots commands to hmp.c, as they don't have code for migration - Make them work with errors in a modern way instead of writting to the monitor - make paolo happy and use hmp_handle_error Later, Juan. Juan Quintela (6): monitor: Remove monitor parameter from

[Qemu-devel] [PATCH 1/6] monitor: Remove monitor parameter from save_vmstate

load_vmstate() already use error_report, so be consistent. There is an identical error message in load_vmstate() that ends in a period. Remove it. Signed-off-by: Juan Quintela --- include/sysemu/sysemu.h | 2 +- migration/savevm.c | 20 ++--

[Qemu-devel] [PATCH 3/6] monitor: Move hmp_savevm from savevm.c to hmp.c

It is a monitor command, and has nothing migration specific in it. Signed-off-by: Juan Quintela --- hmp.c | 5 + hmp.h | 1 + include/sysemu/sysemu.h | 1 - migration/savevm.c | 5 - 4 files changed, 6 insertions(+), 6

Re: [Qemu-devel] [PATCH v2 00/25] qmp: add async command type

Am 24.04.2017 um 21:10 hat Markus Armbruster geschrieben: > With 2.9 out of the way, how can we make progress on this one? > > I can see two ways to get asynchronous QMP commands accepted: > > 1. We break QMP compatibility in QEMU 3.0 and convert all long-running >tasks from "synchronous

[Qemu-devel] [PATCH 1/2] migration: Move check_migratable() into qdev.c

The function is only used once, and nothing else in migration knows about objects. Create the function vmstate_device_is_migratable() in savem.c that really do the bit that is related with migration. Signed-off-by: Juan Quintela --- hw/core/qdev.c| 15

[Qemu-devel] [PATCH 2/2] migration: to_dst_file at that point is NULL

We have just arrived as: migration.c: qemu_migrate() s = migrate_init() <- puts it to NULL {tcp,unix}_start_outgoing_migration -> socket_outgoing_migration migration_channel_connect() sets to_dst_file if tls is enabled, we do another round through

[Qemu-devel] [PATCH 0/2] Misc migration fixes

Hi This are independent of all my series, so send then here. - check_migratable needs to now about objects, device class, etc, that migration code don't care. So move it to qdev.c. - to_dst_file is set to NULL before this call, just remove it. Long term idea is that nothing outside

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