Commit bde4d9205 ("Fix the -accel parameter and the documentation for
'hax'") introduced a regression by adding a new local accel_opts
variable which shadows the variable with the same name that is
declared at the beginning of the main() scope. This causes the
qemu_tcg_configure() call later to be
在 2017/6/7 20:18, Dr. David Alan Gilbert 写道:
* QingFeng Hao (ha...@linux.vnet.ibm.com) wrote:
在 2017/6/6 20:49, Kevin Wolf 写道:
Am 06.06.2017 um 07:24 hat QingFeng Hao geschrieben:
I can't tell for postcopy_ram_listen_thread() - commit 660819b didn't
seem to remove a qemu_fclose() call
spapr_drc_detach() is called when qemu generic code requests a device be
unplugged. It makes a number of tests, which could well delay further
action until later, before actually detach the device from the DRC.
This splits out the part which actually removes the device from the DRC
into
This fourth isntallment of cleanups to the DRC code introduces the
first changes to the fundamental state handling. We change the
initial states in the reset code and attach code for PCI devices, and
are able to remove the 'signalled' state variable with those fixes.
There are also some more
The allocation-state indicator should only actually be implemented for
"logical" DRCs, not physical ones. Factor a check for this, and also for
valid indicator state values into rtas_set_allocation_state(). Because
they don't exist for physical DRCs, there's no reason that we'd ever want
more
PCI DRCs, and only PCI DRCs, are immediately moved to UNISOLATED isolation
state once the device is attached. This has been there from the initial
implementation, and it's not clear why.
The state diagram in PAPR 13.4 suggests PCI devices should start in
ISOLATED state until the guest moves them
The reset handler for DRCs attempts several state transitions which are
subject to various checks and restrictions. But at reset time we know
there is no guest, so we can ignore most of the usual sequencing rules and
just set the DRC back to a known state. In fact, it's safer to do so.
The
On Thu, Jun 08, 2017 at 06:33:57AM +0200, Thomas Huth wrote:
> On 08.06.2017 02:18, David Gibson wrote:
> > On Wed, Jun 07, 2017 at 07:10:55PM +0200, Thomas Huth wrote:
> >> On 07.06.2017 16:34, Paolo Bonzini wrote:
> >>>
> >>>
> >>> On 07/06/2017 09:33, Thomas Huth wrote:
> On 07.06.2017
The 'signalled' field in the DRC appears to be entirely a torturous
workaround for the fact that PCI devices were started in UNISOLATED state
for unclear reasons.
1) 'signalled' is already meaningless for logical (so far, all non PCI)
DRCs. It's always set to true (at least at any point it might
There are substantial differences in the various paths through
set_isolation_state(), both for setting to ISOLATED versus UNISOLATED
state and for logical versus physical DRCs.
So, split the set_isolation_state() method into isolate() and unisolate()
methods, and give it different implementations
On 06/08/17 11:07 +0800, Xiao Guangrong wrote:
>
>
> On 06/07/2017 04:06 PM, Haozhong Zhang wrote:
> > Per ACPI 6.2, section 5.2.25.6 and JEDEC Annex L Release 3, the
> > current region format interface code 0x201 indicates the block
> > addressed function interface 1, rather than a byte
On Wed, 2017-06-07 at 20:16 +0100, Dr. David Alan Gilbert wrote:
> * Suraj Jitindar Singh (sjitindarsi...@gmail.com) wrote:
> > The info registers command in the qemu monitor is used to dump
> > register
> > values.
> >
> > Currently this command uses the monitor cpu (which can be set by
> > the
On 06/07/2017 10:55 PM, Greg Kurz wrote:
> On Wed, 7 Jun 2017 20:11:38 +0200
> Cédric Le Goater wrote:
>
>> On 06/07/2017 07:17 PM, Greg Kurz wrote:
>>> Until recently, spapr used to allocate ICPState objects for the lifetime
>>> of the machine. They would only be associated to
The info registers command in the qemu monitor is used to dump register
values.
Currently this command uses the monitor cpu (which can be set by the
user) as the cpu for whose registers will be dumped. Sometimes it is
useful to see the registers for all cpus and currently this requires
setting
On 07.06.2017 22:14, Emilio G. Cota wrote:
> On Thu, May 04, 2017 at 09:11:50 +0200, Markus Armbruster wrote:
>> Thomas Huth writes:
> (snip)
>>> STEXI
>>> @item -accel @var{name}[,prop=@var{value}[,...]]
>>> @findex -accel
>>> This is used to enable an accelerator.
If EL3 is not implemented (ie only one security state) then the
one and only ICC_BPR1 register behaves like the Non-secure
ICC_BPR1 in an EL3-present configuration. In particular, its
reset value is GIC_MIN_BPR_NS, not GIC_MIN_BPR.
Correct the erroneous reset value; this fixes a problem where
we
On Tue, Jun 06, 2017 at 03:22:26PM +0800, Haozhong Zhang wrote:
> Signed-off-by: Haozhong Zhang
> ---
> hw/mem/nvdimm.c | 2 +-
> include/hw/mem/nvdimm.h | 3 +++
> 2 files changed, 4 insertions(+), 1 deletion(-)
Reviewed-by: Stefan Hajnoczi
On 06/07/2017 09:08 AM, Alberto Garcia wrote:
> We are using the return value of qcow2_encrypt_sectors() to detect
> problems but we are throwing away the returned Error since we have no
> way to report it to the user. Therefore we can simply get rid of the
> local Error variable and pass NULL
Use the actual unsigned integer type name.
The type name change impacts the following externally visible area:
* vl.c's machine_help_func() puts it in help for -machine NAME,help.
* QMP command qom-list exposes it in ObjectPropertyInfo member @type.
* QMP command device-list-properties exposes
The property is defined with object_property_add_uint32_ptr()
Signed-off-by: Marc-André Lureau
---
hw/acpi/pcihp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 3a531a4416..c420a388ea 100644
---
This is TYPE_MEMORY_REGION's property. Its getter
memory_region_get_addr() uses visit_type_uint64().
Signed-off-by: Marc-André Lureau
---
hw/core/platform-bus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/core/platform-bus.c
nks, Juan.
>
> The following changes since commit 65dfad62a176f5265f801683be64149c5ad55f7d:
>
> Merge remote-tracking branch 'remotes/xtensa/tags/20170606-xtensa' into
> staging (2017-06-06 17:00:12 +0100)
>
> are available in the git repository at:
>
> git://githu
The following changes since commit 65dfad62a176f5265f801683be64149c5ad55f7d:
Merge remote-tracking branch 'remotes/xtensa/tags/20170606-xtensa' into
staging (2017-06-06 17:00:12 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to
From: Felipe Franciosi
This commit introduces a vhost-user device for SCSI. This is based
on the existing vhost-scsi implementation, but done over vhost-user
instead. It also uses a chardev to connect to the backend. Unlike
vhost-scsi (today), VMs using vhost-user-scsi can be
On 7 June 2017 at 16:28, Paolo Bonzini wrote:
> From: Felipe Franciosi
>
> This commit introduces a vhost-user device for SCSI. This is based
> on the existing vhost-scsi implementation, but done over vhost-user
> instead. It also uses a chardev to
Am 07.06.2017 um 15:37 hat Max Reitz geschrieben:
> On 2017-06-01 13:11, Denis V. Lunev wrote:
> > On 06/01/2017 12:12 PM, Kevin Wolf wrote:
> >> Am 31.05.2017 um 17:03 hat Eric Blake geschrieben:
> >>> On 05/31/2017 09:43 AM, Pavel Butsykin wrote:
> This patch adds the reduction of the image
The new placement of the TB means that we can use one insn
to load the return value for exit_tb returning the TB pointer.
---
tcg/aarch64/tcg-target.inc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index
Since we're no longer using a direct branch, we have no
limit on the branch distance.
Signed-off-by: Richard Henderson
---
translate-all.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index bb094ad..966747a 100644
--- a/translate-all.c
The new placement of the TB means that we can use one insn
to load the goto_tb destination directly from the TB.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git
The following changes since commit 65dfad62a176f5265f801683be64149c5ad55f7d:
Merge remote-tracking branch 'remotes/xtensa/tags/20170606-xtensa' into
staging (2017-06-06 17:00:12 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to
> On 7 Jun 2017, at 17:21, Paolo Bonzini wrote:
>
>
>
> On 07/06/2017 17:39, Felipe Franciosi wrote:
>>
>>> On 7 Jun 2017, at 16:37, Peter Maydell wrote:
>>>
>>> On 7 June 2017 at 16:28, Paolo Bonzini wrote:
From:
We would like to use a same QObject type to represent numbers, whether
they are int, uint, or floats. Getters will allow some compatibility
between the various types if the number fits other representations.
Add a few more tests while at it.
Signed-off-by: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
tests/test-qobject-input-visitor.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/tests/test-qobject-input-visitor.c
b/tests/test-qobject-input-visitor.c
index
"Dr. David Alan Gilbert" wrote:
> * Halil Pasic (pa...@linux.vnet.ibm.com) wrote:
>> This one has to be fixed up to 's390x: vmstatify config migration for
>> virtio-ccw' provided we want to achieve the same as 's390x/css: catch
>> section mismatch on load' does.
>>
>>
Before the previous commit, parameter promote_int = true made
visit_start_alternate() with an input visitor avoid QTYPE_QINT
variants and create QTYPE_QFLOAT variants instead. This was used
where QTYPE_QINT variants were invalid.
The previous commit fused QTYPE_QINT with QTYPE_QFLOAT, rendering
The property is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
---
include/hw/isa/isa.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index c2fdd70cdc..95593408ef 100644
---
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
---
include/qom/object.h | 23 +++
qom/object.c | 29 +
2 files changed, 52 insertions(+)
diff --git a/include/qom/object.h
Modify the unsigned type for various properties to use QNUM_U64, to
avoid type casts.
There are a few empty lines added to improve code reading/style.
Signed-off-by: Marc-André Lureau
---
include/hw/qdev-core.h | 1 +
include/hw/qdev-properties.h | 29
Can someone please pick this up?
Thanks,
On Fri, Feb 24, 2017 at 12:42 AM, Pranith Kumar wrote:
> In mttcg, calling pause_all_vcpus() during execution from the
> generated TBs causes a deadlock if some vCPU is waiting for exclusive
> execution in start_exclusive(). Fix
This property is an alias for device TYPE_ASPEED_SDMC's property
"ram-size", which is defined with DEFINE_PROP_UINT64().
Signed-off-by: Marc-André Lureau
---
hw/arm/aspeed.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/arm/aspeed.c
On 2017-06-01 19:27, Daniel P. Berrange wrote:
> Historically the qcow & qcow2 image formats supported a property
> "encryption=on" to enable their built-in AES encryption. We'll
> soon be supporting LUKS for qcow2, so need a more general purpose
> way to enable encryption, with a choice of
Now that we have proper locking after MTTCG patches have landed, we
can revert the commit. This reverts commit
a9353fe897ca2687e5b3385ed39e3db3927a90e0.
CC: Peter Maydell
CC: Alex Bennée
Signed-off-by: Pranith Kumar
---
On 7 June 2017 at 14:55, Paolo Bonzini wrote:
> The following changes since commit 65dfad62a176f5265f801683be64149c5ad55f7d:
>
> Merge remote-tracking branch 'remotes/xtensa/tags/20170606-xtensa' into
> staging (2017-06-06 17:00:12 +0100)
>
> are available in the git
On 06/07/2017 08:06 AM, Manos Pitsidianakis wrote:
> This is part of my work for my GSOC project this summer.
>
> I am not sure if the count parameter in bdrv_co_pwrite_zeros and
> bdrv_co_pdiscard refers to sectors or bytes.
Both refer to byte counts. (We're trying to get rid of as many
> On 7 Jun 2017, at 16:37, Peter Maydell wrote:
>
> On 7 June 2017 at 16:28, Paolo Bonzini wrote:
>> From: Felipe Franciosi
>>
>> This commit introduces a vhost-user device for SCSI. This is based
>> on the existing
Peter Maydell writes:
> On 7 June 2017 at 12:12, Lluís Vilanova wrote:
>> My understanding was that adding a public instrumentation interface would add
>> too much code maintenance overhead for a feature that is not in QEMU's core
>> target.
> Well, it depends what you
This series implements the virtio-iommu device. This is a proof
of concept based on the virtio-iommu specification written by
Jean-Philippe Brucker [1]. This was tested with a guest using
the virtio-iommu driver [2] and exposed with a virtio-net-pci
using dma ops.
The device gets instantiated
The specific virtio-mmio node is inconditionally added on
machine init while the binding between this latter and the
PCIe host bridge is done on machine init done notifier, only
if -device virtio-iommu-device was added to the qemu command
line.
Signed-off-by: Eric Auger
Peter Maydell writes:
> If EL3 is not implemented (ie only one security state) then the
> one and only ICC_BPR1 register behaves like the Non-secure
> ICC_BPR1 in an EL3-present configuration. In particular, its
> reset value is GIC_MIN_BPR_NS, not GIC_MIN_BPR.
>
>
The tests aren't really useful, or already covered by other simple tests.
Signed-off-by: Marc-André Lureau
---
tests/check-qdict.c | 9 ++---
tests/check-qlist.c | 23 ++-
tests/check-qnum.c| 18 ++
TYPE_ISA_FDC's property "iobase" is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 5b8c6fbbea..f670ecb7f2 100644
---
Wrap the Property default value (an int64_t) in a union, to prepare
for the next patch adding a uint64_t.
Signed-off-by: Marc-André Lureau
---
include/hw/qdev-core.h | 4 +++-
include/hw/qdev-properties.h | 8
hw/core/qdev-properties.c| 6 +++---
Peter Xu wrote:
> Let the old man "MigrationState" join the object family. Direct benefit
> is that we can start to use all the property features derived from
> current QDev, like: HW_COMPAT_* bits, command line setup for migration
> parameters (so will never need to set them
This is an alias of TYPE_PNV_CORE's property "pir", which is defined
with DEFINE_PROP_UINT32()
Signed-off-by: Marc-André Lureau
---
hw/ppc/pnv_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index
PIIX4: piix4_pm_add_propeties() defines these with
object_property_add_uint*_ptr().
Q35: ich9_lpc_add_properties() and ich9_pm_add_properties() define them
similarly, except for ACPI_PM_PROP_GPE0_BLK(). That one's getter
ich9_pm_get_gpe0_blk() uses visit_type_uint32().
Signed-off-by: Marc-André
On Tue, Jun 06, 2017 at 03:22:27PM +0800, Haozhong Zhang wrote:
> diff --git a/util/osdep.c b/util/osdep.c
> index a2863c8e53..02881f96bc 100644
> --- a/util/osdep.c
> +++ b/util/osdep.c
> @@ -471,3 +471,64 @@ writev(int fd, const struct iovec *iov, int iov_cnt)
> return readv_writev(fd, iov,
On Tue, Jun 06, 2017 at 03:22:28PM +0800, Haozhong Zhang wrote:
> If a vNVDIMM device is not backed by a DAX device and its "restrict"
> option is enabled, bit 3 of state flags in its region mapping
> structure will be set, in order to notify the guest of the lack of
> write persistence guarantee.
On 06/07/2017 08:55 AM, Jeff Cody wrote:
> In external_snapshot_abort(), we try to undo what was done in
> external_snapshot_prepare() calling bdrv_replace_node() to swap the
> nodes back. However, we receive a permissions error as writers are
> blocked on the old node, which is now the new node
From: "Emilio G. Cota"
Add helpers to gather cache info from the host at init-time.
For now, only export the host's I/D cache line sizes, which we
will use to improve cache locality to avoid false sharing.
Suggested-by: Richard Henderson
Suggested-by: Geert
This is a follow-up to Emilio's patch set.
My primary changes to Emilio's patches are to the first patch, in
merging the existing implementations from tcg/ppc/tcg-target.inc.c
into util/cacheinfo.c.
Then I've a few follow-up patches to take advantage of the new TB
placement for arm platforms.
From: "Emilio G. Cota"
Allocating an arbitrarily-sized array of tbs results in either
(a) a lot of memory wasted or (b) unnecessary flushes of the code
cache when we run out of TB structs in the array.
An obvious solution would be to just malloc a TB struct when needed,
and keep
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 5 +
tcg/arm/tcg-target.inc.c | 17 ++---
2 files changed, 3 insertions(+), 19 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 87ae10b..724ec73 100644
---
On Wed, Jun 07, 2017 at 10:40:08AM -0500, Eric Blake wrote:
On 06/07/2017 08:06 AM, Manos Pitsidianakis wrote:
This is part of my work for my GSOC project this summer.
I am not sure if the count parameter in bdrv_co_pwrite_zeros and
bdrv_co_pdiscard refers to sectors or bytes.
Both refer to
This patch adds the actual implementation for the translation routine
and the virtio-iommu commands.
Signed-off-by: Eric Auger
---
v1 -> v2:
- fix compilation issue reported by autobuild system
---
hw/virtio/trace-events | 6 ++
hw/virtio/virtio-iommu.c | 202
This patch initializes the iommu memory regions so that
PCIe end point transactions get translated. The translation function
is not yet implemented at that stage.
Signed-off-by: Eric Auger
---
hw/virtio/trace-events | 1 +
hw/virtio/virtio-iommu.c | 97
The new machine type allows virtio-iommu instantiation.
Signed-off-by: Eric Auger
---
a Veuillez saisir le message de validation pour vos modifications. Les lignes
---
hw/arm/virt.c | 24 ++--
include/hw/arm/virt.h | 1 +
2 files changed, 23
On Wed, Jun 07, 2017 at 05:08:27PM +0300, Alberto Garcia wrote:
Instead of passing a single buffer pointer to do_perform_cow_write(),
pass a QEMUIOVector. This will allow us to merge the write requests
for the COW regions and the actual data into a single one.
Although do_perform_cow_read()
Alternates with both a 'number' and an 'int' branch will become
invalid when the next patch merges of QFloat and QInt into QNum.
More sophisticated alternate code could keep them valid, but since
we have no users outside tests, simply drop the tests.
Signed-off-by: Marc-André Lureau
TYPE_HPET's property HPET_INTCAP is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f6d5717f8b..02f9a8fe91 100644
---
Alex Bennée writes:
> Alex Bennée writes:
>
>> Richard Henderson writes:
>>
>>> From: "Emilio G. Cota"
>>>
>>> Measurements:
>>>
>>> [Baseline performance is that before applying this and the previous
>>>
Hi,
On 07/06/2017 17:00, no-re...@patchew.org wrote:
> Hi,
>
> This series failed automatic build test. Please find the testing commands and
> their output below. If you have docker installed, you can probably reproduce
> it
> locally.
>
> Message-id:
Alex Bennée writes:
> Alex Bennée writes:
>
>> Alex Bennée writes:
>>
>>> Richard Henderson writes:
>>>
From: "Emilio G. Cota"
Measurements:
[Baseline
On 7 June 2017 at 16:45, Lluís Vilanova wrote:
> This speed comes at the cost of exposing TCG operations to the instrumentation
> library (i.e., the library can inject TCG code; AFAIR, calling out into a
> function in the instrumentation library is slower than PIN).
Mmm,
On 07/06/2017 17:39, Felipe Franciosi wrote:
>
>> On 7 Jun 2017, at 16:37, Peter Maydell wrote:
>>
>> On 7 June 2017 at 16:28, Paolo Bonzini wrote:
>>> From: Felipe Franciosi
>>>
>>> This commit introduces a vhost-user device
Remove dependency on qapi qtype, replace a field by a few PropertyInfo
callbacks to set the default value type (introduced in commit 4f2d3d7).
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
---
include/hw/qdev-core.h | 2
Hi,
In previously sent series "[PATCH 00/21] WIP: dump: add kaslr support
(for after 2.9)", I proposed changes to accept uint64 values from
json, by adding a QUint type. During review, it was suggested to
introduce a QNum type to hold various number representations.
This series introduces the
In order to store integer values between INT64_MAX and UINT64_MAX, add
a uint64_t internal representation.
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
---
include/qapi/qmp/qnum.h | 7 ++
qobject/qnum.c | 64
The getter and setter of TYPE_APIC_COMMON property "id" are
apic_common_get_id() and apic_common_set_id().
apic_common_get_id() reads either APICCommonState member uint32_t
initial_apic_id or uint8_t id into an int64_t local variable. It then
passes this variable to visit_type_int().
Switch to use QNum/uint where appropriate to remove i64 limitation.
The input visitor will cast i64 input to u64 for compatibility
reasons (existing json QMP client already use negative i64 for large
u64, and expect an implicit cast in qemu).
Note: before the patch, uint64_t values above
Switch strtoll() usage to qemu_strtoi64() helper while at it.
Add a few tests for large numbers.
Signed-off-by: Marc-André Lureau
---
qobject/json-lexer.c | 4
qobject/json-parser.c | 36
tests/check-qjson.c | 44
TYPE_X86_CPU's property "apic-id" is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f670ecb7f2..f6d5717f8b 100644
---
TYPE_PC_DIMM's property PC_DIMM_ADDR_PROP is defined with
DEFINE_PROP_UINT64().
TYPE_PC_DIMM's property PC_DIMM_NODE_PROP is defined with
DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
---
hw/acpi/memory_hotplug.c | 7 ---
hw/acpi/nvdimm.c | 10
Prepare for the next patch's DEFINE_PROP_UNSIGNED().
Signed-off-by: Marc-André Lureau
---
include/hw/qdev-properties.h | 26 +-
hw/block/fdc.c | 18 +-
hw/net/e1000e.c | 6 +++---
3 files changed,
This is TYPE_MEMORY_REGION's property. Its getter
memory_region_get_addr() uses visit_type_uint64().
Signed-off-by: Marc-André Lureau
---
hw/misc/auxbus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
index
Those are defined with object_property_add_uint16_ptr()
Signed-off-by: Marc-André Lureau
---
hw/i386/acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b2dc3d8580..d1ffce7ce3 100644
On Mon, May 29, 2017 at 12:45:43PM +0400, Marc-André Lureau wrote:
> Move all the fronted struct and methods to a seperate unit. This avoids
> accidentally mixing backend and frontend calls, and helps with readibilty.
>
> Make qemu_chr_replay() a macro shared by both char and char-fe.
>
> Export
On 06/07/2017 06:35 PM, Juan Quintela wrote:
> Halil Pasic wrote:
>> Verbose error reporting for the _EQUAL family. Modify the standard _EQUAL
>> so the hint states the assertion probably failed due to a bug. Introduce
>> _EQUAL_HINT for specifying a context specific
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Message-id: 1496824556-1883-1-git-send-email-eric.au...@redhat.com
Subject: [Qemu-devel] [RFC 0/8] VIRTIO-IOMMU device
Type:
On Wed, Jun 07, 2017 at 04:06:39PM +0800, Haozhong Zhang wrote:
> Per ACPI 6.2, section 5.2.25.6 and JEDEC Annex L Release 3, the
> current region format interface code 0x201 indicates the block
> addressed function interface 1, rather than a byte addressable
> interface. Fix it by using 0x301
On 7 June 2017 at 16:39, Felipe Franciosi wrote:
>
>> On 7 Jun 2017, at 16:37, Peter Maydell wrote:
>>
>> On 7 June 2017 at 16:28, Paolo Bonzini wrote:
>>> From: Felipe Franciosi
>>>
>>> This commit
Paolo Bonzini writes:
> On 07/06/2017 14:07, Peter Maydell wrote:
>>> My understanding was that adding a public instrumentation interface would
>>> add
>>> too much code maintenance overhead for a feature that is not in QEMU's core
>>> target.
>> Well, it depends what you define as our core
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 44 +---
1 file changed, 29 insertions(+), 15 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index fce382f..18708b1 100644
---
This is a partial linux header update against Jean-Philippe's branch:
git://linux-arm.org/linux-jpb.git virtio-iommu/base (unstable)
Signed-off-by: Eric Auger
---
include/standard-headers/linux/virtio_ids.h | 1 +
include/standard-headers/linux/virtio_iommu.h | 142
Update the script to update the virtio_iommu.h header.
Signed-off-by: Eric Auger
---
scripts/update-linux-headers.sh | 3 +++
1 file changed, 3 insertions(+)
diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 2f906c4..03f6712 100755
---
This patch adds the command payload decoding and
introduces the functions that will do the actual
command handling. Those functions are not yet implemented.
Signed-off-by: Eric Auger
---
hw/virtio/trace-events | 7
hw/virtio/virtio-iommu.c | 97
Felipe Franciosi wrote:
> Currently, the throttle_thread_scheduled flag is reset back to 0 before
> sleeping (as part of the throttling logic). Given that throttle_timer
> (well, any timer) may tick with a slight delay, it so happens that under
> heavy throttling (ie. close or
Remove dependency on qapi qtype, replace a field by a few PropertyInfo
callbacks to set the default value type (introduced in commit 4f2d3d7).
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
---
include/hw/qdev-core.h | 2
If the property is not of the requested type, the getters will leak a
QObject.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Reviewed-by: Markus Armbruster
---
qom/object.c | 6 +++---
1 file changed, 3
Hi,
In previously sent series "[PATCH 00/21] WIP: dump: add kaslr support
(for after 2.9)", I proposed changes to accept uint64 values from
json, by adding a QUint type. During review, it was suggested to
introduce a QNum type to hold various number representations.
This series introduces the
TYPE_ISA_PVPANIC_DEVICE's property PVPANIC_IOPORT_PROP is defined with
DEFINE_PROP_UINT16().
Signed-off-by: Marc-André Lureau
---
hw/misc/pvpanic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index
1 - 100 of 445 matches
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