Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/Makefile.objs | 2 +-
hw/pci-bridge/pcie_pci_bridge.c | 152
include/hw/pci/pci.h| 1 +
3 files changed, 154 insertions(+), 1 deletion(-)
create mode 100644
This patch introduces a new device - generic PCI Express to PCI bridge.
Now only x86-specific DMI-to-PCI bridge can be used to enable
usage of legacy PCI devices on Q35 machine. But this bridge isn't
cross-platform
and doesn't support hotplugging.
That's why we need a new generic
Public bug reported:
qemu 2.9.0, adm64, start image with -snapshot param, make some changes
in the image, then:
$telnet localhost 7000
(qemu) commit virtio0
'commit' error for 'virtio0': Permission denied
Nerver met this problem before, commit is ok. I recently compiled
v2.9.0, so is there
This series proposes a generic (target-agnostic) instruction translation
framework.
It basically provides a generic main loop for instruction disassembly, which
calls target-specific functions when necessary. This generalization makes
inserting new code in the main loop easier, and helps in
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
In-Reply-To: <641e1f35-813a-4244-0194-ffce08130...@redhat.com>
On Fri, Jun 23, 2017 at 01:19:35PM +0200, Paolo Bonzini wrote:
>
>
> On 21/06/2017 16:21, Wu Xiang wrote:
> > In do_interrupt64(), when interrupt stack table(ist) is enabled
> > and the the target code segment is conforming(e2 &
Signed-off-by: Lluís Vilanova
---
Makefile.target|1
include/exec/gen-icount.h |2
include/exec/translate-block.h | 125 +++
include/qom/cpu.h | 22 +
translate-block.c | 185
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 48 +++
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate.c | 82 ++--
1 file changed, 44 insertions(+), 38 deletions(-)
diff --git
Lluís Vilanova writes:
> Jayanto Minocha writes:
>> Lluis,
>> My modifications were almost the same as those done by Emilio. There were
>> no memory trace events in the trace file.
> I'll take a look at it after I finish revamping the generic translation loop
> series (hopefully today).
I just
Temporarily redefine DISAS_* values based on DJ_TARGET. They should
disappear as targets get ported to the generic framework.
Signed-off-by: Lluís Vilanova
Acked-by: David Gibson (ppc)
Acked-by: Eduardo Habkost
Reviewed-by:
Lluís Vilanova writes:
> Emilio G Cota writes:
>> There's little point in dynamically allocating the bitmap if we
>> know at compile-time the max number of events we want to support.
>> Thus, make room in the struct for the bitmap, which will make things
>> easier later: this paves the way for
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 121 +++--
target/arm/translate.c | 185
2 files
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 35292c3155..eb2bf9cb1c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 58 ++--
target/arm/translate.c | 90 ++--
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 11 +--
target/arm/translate.c | 36 +---
2 files changed, 30 insertions(+), 17
Alex Bennée writes:
> Peter Maydell writes:
>> On 20 June 2017 at 12:02, Lluís Vilanova wrote:
>>> Jayanto Minocha writes:
But that is only used to instrument the cpu_ld/cpu_st macros, which is only
called in the case of a tlb miss.
>>>
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 51 +++---
target/arm/translate.c | 87
2 files
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 10 +-
target/arm/translate.c | 10 +-
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git
Needed to implement a target-agnostic gen_intermediate_code() in the
future.
Signed-off-by: Lluís Vilanova
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
---
include/exec/exec-all.h |2 +-
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 113 ++--
target/arm/translate.c | 154
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 59 ++-
target/arm/translate.c | 66 +---
2
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 110 ++-
target/arm/translate.c | 112 +++-
target/arm/translate.h |6 +-
3 files changed, 36 insertions(+), 192
Events with the "vcpu" property need to be set globally (i.e., as if they didn't
have that property) while we have not yet created any vCPU.
Signed-off-by: Lluís Vilanova
---
trace/control-target.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 72 +++
1 file changed, 47 insertions(+), 25 deletions(-)
diff --git
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 73 ++
target/arm/translate.c | 144 +---
- Original Message -
> From: "Wu Xiang"
> To: "Paolo Bonzini" , qemu-devel@nongnu.org
> Cc: "Eduardo Habkost" , "RichardHenderson"
>
> Sent: Sunday, June 25, 2017 1:13:24 PM
> Subject: Re:
fsglmul and fsgldiv truncate data to single precision before computing
results.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 22 ++
target/m68k/helper.h | 2 ++
target/m68k/translate.c | 6 ++
3 files changed, 30 insertions(+)
fmovecr moves a floating point constant from the
FPU ROM to a floating point register.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 30 ++
target/m68k/helper.h | 1 +
target/m68k/translate.c | 13 -
3 files
On 06/25/2017 12:21 PM, Laurent Vivier wrote:
+c->g1 = 0;
+c->v2 = tcg_const_i32(0);
+c->g2 = 1;
+/* TODO: Raise BSUN exception. */
fpsr = tcg_temp_new();
gen_load_fcr(s, fpsr, M68K_FPSR);
-l1 = gen_new_label();
-/* TODO: Raise BSUN exception. */
-/*
Hi,
On Fri, 23 Jun 2017 13:25:34 +
Marc-André Lureau wrote:
> Hi
>
> On Fri, Jun 23, 2017 at 3:03 PM Tomáš Golembiovský
> wrote:
>
> > This is just a draft, or a request for comments if you will.
> >
> > This patch sets drafts the support
Lluís Vilanova writes:
> Alex Bennée writes:
>
>> Peter Maydell writes:
>
>>> On 20 June 2017 at 12:02, Lluís Vilanova wrote:
Jayanto Minocha writes:
> But that is only used to instrument the cpu_ld/cpu_st macros,
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 103 +++
target/m68k/helper.h | 1 +
target/m68k/translate.c | 59 +--
3 files changed, 133 insertions(+), 30 deletions(-)
diff --git
files generated using coccinelle tool: 'spatch --use-cache'
Signed-off-by: Philippe Mathieu-Daudé
---
.gitignore | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.gitignore b/.gitignore
index 09c2363acf..cf65316863 100644
--- a/.gitignore
+++ b/.gitignore
@@ -116,6 +116,8
In include/exec/cpu_ldst_useronly_template.h, there’s references to
glue(glue(ld, USUFFIX), _p), which would expand to a call to a function looking
something like uint32_t lduw_p(void *) (for example). Where is this function
defined?
~Theodore
Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove.
The value is converted using the new floatx80_round() function.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 48 +---
target/m68k/helper.h | 8 +++-
Add a function to round a floatx80 to the defined precision
(floatx80_rounding_precision)
Signed-off-by: Laurent Vivier
---
fpu/softfloat.c | 15 +++
include/fpu/softfloat.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/fpu/softfloat.c
Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul,
fsdiv, fddiv.
The precision is managed using set_floatx80_rounding_precision().
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 80
result pushed to my gh repo via ssh deploy key
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.sshkey | Bin 0 -> 1296 bytes
.travis.yml| 26 --
2 files changed, 20 insertions(+), 6 deletions(-)
create mode 100644 .travis.sshkey
diff --git
Signed-off-by: Philippe Mathieu-Daudé
---
scripts/check-cocci-scripts.sh | 47 ++
1 file changed, 47 insertions(+)
create mode 100755 scripts/check-cocci-scripts.sh
diff --git a/scripts/check-cocci-scripts.sh
On 23/06/17 19:50, Eduardo Habkost wrote:
>> Really, please go back to the earlier discussion around fw_cfg_init1()
>> and you'll see my original point (which matches what you just voiced).
>
> Yep. I was just not sure validation on realize was necessary or
> convenient. It looks like we agree
Second part of patches submitted in the v3.
This series adds a subset of single precision and
double precision instructions using
set_floatx80_rounding_precision() to round the result.
For some other instructions, we introduce a new
function, floatx80_round(), to round them manually.
It also
use DisasCompare with FPU conditions in fscc and fbcc.
Signed-off-by: Laurent Vivier
---
target/m68k/translate.c | 213 ++--
1 file changed, 134 insertions(+), 79 deletions(-)
diff --git a/target/m68k/translate.c
, each script is limited to <10min. If any commit were
generated, they are pushed to my gh-repo:
https://github.com/philmd/qemu/compare/travis-cocci_v1...philmd:autogenerated-coccinelle-20170625-126
Build output (Ran for 23 min 7 sec):
https://travis-ci.org/philmd/qemu/builds/246848085
Any i
to speedup further testing
Signed-off-by: Philippe Mathieu-Daudé
---
.travis.yml | 119
1 file changed, 119 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 27a2d9cfb3..4761569183 100644
--- a/.travis.yml
Hi Laurent,
On 06/25/2017 04:21 PM, Laurent Vivier wrote:
fsglmul and fsgldiv truncate data to single precision before computing
results.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 22 ++
target/m68k/helper.h | 2 ++
On 2017-06-23 01:12, David Hildenbrand wrote:
> If we have for example: r3 contains 0x
> ec 33 3f bf 61 55 risbg %r3,%r3,63,191,97
>
> We want to rotate 33 to the left and only keep MSB bit 63 of that. So the
> result is then exactly 1 (we're reading the sign of the 32
Signed-off-by: Lluís Vilanova
---
include/exec/gen-icount.h |6 +++--
target/alpha/translate.c | 14 ++--
target/arm/translate-a64.c| 10 -
target/arm/translate.c| 10 -
target/cris/translate.c |6 +++--
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 164 ++-
1 file changed, 92 insertions(+), 72 deletions(-)
diff --git
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate.c
Hi Theodore,
> In include/exec/cpu_ldst_useronly_template.h, there’s references to
> glue(glue(ld, USUFFIX), _p), which would expand to a call to a function
> looking something like uint32_t lduw_p(void *) (for example). Where is this
> function defined?
You might be looking for the glue
On 06/26/2017 11:18 AM, Jason Wang wrote:
On 2017年06月23日 10:32, Wei Wang wrote:
This patch enables the virtio-net tx queue size to be configurable
between 256 (the default queue size) and 1024 by the user when the
vhost-user backend is used.
Currently, the maximum tx queue size for other
> Patch 4 is the travis job: it calls the previous script. To respect travis
> time
> limit timeout, each script is limited to <10min. If any commit were
> generated, they are pushed to my gh-repo
Initially I wanted to use git format-patch/send-email to send to the
list as a series but it seems
pc.h and sysemu/kvm.h are also included from common code (where
CONFIG_KVM is not available), so the #defines that depend on CONFIG_KVM
should not be declared here to avoid that anybody is using them in a
wrong way. Since we're also going to poison CONFIG_KVM for common code,
let's move them to
CONFIG_SOFTMMU should never be used in common code, so mark
it as poisoned, too.
Reviewed-by: Richard Henderson
Signed-off-by: Thomas Huth
---
include/exec/poison.h | 1 +
include/qom/cpu.h | 8
2 files changed, 9 insertions(+)
diff --git
This series marks some more #defines as poisoned, which are
target-specific (declared in config-target.h) and thus must
not be used in common code.
v4:
- Rebased to master since the v2 versions of the first two patches
have already been merged. The diff between v2 and v3 can now be
found in
Commit 1f5c00cfdb8114c ("qom/cpu: move tlb_flush to cpu_common_reset")
moved the call to tlb_flush() from the target-specific reset handlers
into the common code qom/cpu.c file, and protected the call with
"#ifdef CONFIG_SOFTMMU" to avoid that it is called for linux-user
only targets. But since
Hi James,
I have changed the SEA/SEI injection method according you suggestion, but I
think this patch may also be needed.
Now for the SEI, the virtual ESR value is specified by the userspace. only RAS
extension support to set the virtual ESR value. so user space will check it to
decide
On Fri, Jun 23, 2017 at 7:18 PM, John Snow wrote:
> This patch is fine, I took a stab at fixing the include issues in a
> separate series. Try it all out and let me know.
Thank John, your series does fix my include issues :)
On Fri, Jun 23, 2017 at 7:09 PM, John Snow wrote:
> Complete the split by renaming ahci_public.h --> ahci.h and
> moving the current ahci.h to hw/ide/ahci_internal.h.
>
> Adjust ahci_internal.h to now load ahci.h instead of ahci_public.h.
>
> Finalize the split by switching
On Fri, Jun 23, 2017 at 7:09 PM, John Snow wrote:
> Begin separating the public/private interface by removing the minimum
> set of information used by code outside of hw/ide/ and calling this
> a new ahci_public.h file, which will be renamed to ahci.h in a future
> patch.
>
>
On Fri, Jun 23, 2017 at 7:09 PM, John Snow wrote:
> Instead of reaching into the PCI state, allow the AHCIDevice to
> respond with how many ports it has.
>
> Signed-off-by: John Snow
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe
On Wed, Jun 21, 2017 at 1:37 PM, Richard Henderson wrote:
> On 06/21/2017 09:18 AM, Philippe Mathieu-Daudé wrote:
>> What an awful name... Anyway checking on "qemu/bswap.h" it seems there is
>> some endianess issue with it if your host is little-endian.
>
>
> There is no
CONFIG_KVM is only defined for target-specific code, so nobody should
use it by accident in common code. To avoid such subtle bugs,
CONFIG_KVM is now marked as poisoned in common code. The header
include/sysemu/kvm.h is somewhat special since it is included
all over the place from common code,
The defines of some *-linux-user targets were still missing.
Suggested-by: Richard Henderson
Signed-off-by: Thomas Huth
---
include/exec/poison.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index
There does not seem to be any target specific code in this file, so
we can put it into "common-obj" instead of "obj" to compile it only
once for all targets.
Signed-off-by: Thomas Huth
---
Makefile.objs | 2 +-
Makefile.target | 2 +-
bootdevice.c| 2 +-
3 files changed,
edu.c does not contain any target-specific code, so we can put
it into common-obj-y to compile it only once for all targets.
Signed-off-by: Thomas Huth
---
hw/misc/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/Makefile.objs
On Fri, Jun 23, 2017 at 10:38:14AM -0300, Eduardo Habkost wrote:
> On Wed, Jun 21, 2017 at 01:29:34PM +0800, Boqun Feng (Intel) wrote:
> > Introduce Skylake-Server cpu mode which inherits the features from
> > Skylake-Client and supports some additional features that are: AVX512,
> > CWLB and
On 06/23/2017 05:56 PM, Marcel Apfelbaum wrote:
On 22/06/2017 11:14, Mao Zhongyi wrote:
In order to propagate error message better, convert shpc_init() to
Error also convert the pci_bridge_dev_initfn() to realize.
Cc: m...@redhat.com
Cc: mar...@redhat.com
Cc: arm...@redhat.com
Signed-off-by:
On 06/23/17 10:55 +0100, Stefan Hajnoczi wrote:
> On Fri, Jun 23, 2017 at 08:13:13AM +0800, haozhong.zh...@intel.com wrote:
> > On 06/22/17 15:08 +0100, Stefan Hajnoczi wrote:
> > > I tried live migrating a guest with NVDIMM on qemu.git/master (edf8bc984):
> > >
> > > $ qemu -M
On Fri, Jun 23, 2017 at 06:31:27PM -0300, Eduardo Habkost wrote:
> On Fri, Jun 23, 2017 at 12:46:38PM +0800, Peter Xu wrote:
> > Introduce this new field for the accelerator classes so that each
> > specific accelerator in the future can register its own global
> > properties to be used further by
On Fri, Jun 23, 2017 at 06:35:29PM -0300, Eduardo Habkost wrote:
> On Fri, Jun 23, 2017 at 12:46:39PM +0800, Peter Xu wrote:
> > It's not that clear on how the global properties are registered to
> > global_props (and also its priority relationship). Let's provide a
> > single function to be
On 2017年06月23日 10:32, Wei Wang wrote:
This patch enables the virtio-net tx queue size to be configurable
between 256 (the default queue size) and 1024 by the user when the
vhost-user backend is used.
Currently, the maximum tx queue size for other backends is 512 due
to the following
only the winxp guest image get this error, linux guest do not.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1700380
Title:
commit snapshot image got Permission denied error
Status in QEMU:
New
On Fri, Jun 23, 2017 at 07:18:19PM -0300, Eduardo Habkost wrote:
> On Fri, Jun 23, 2017 at 12:46:40PM +0800, Peter Xu wrote:
> > Let the old man "MigrationState" join the object family. Direct benefit
> > is that we can start to use all the property features derived from
> > current QDev, like:
On 2017年06月24日 06:32, Cong Wang wrote:
On Fri, Jun 23, 2017 at 1:43 AM, Jason Wang wrote:
On 2017年06月23日 02:53, Michael S. Tsirkin wrote:
On Thu, Jun 22, 2017 at 08:15:58AM +0200, jean-philippe menil wrote:
Hi Michael,
from what i see, the race appear when we hit
On Fri, Jun 23, 2017 at 07:19:01PM -0300, Eduardo Habkost wrote:
> On Fri, Jun 23, 2017 at 12:46:41PM +0800, Peter Xu wrote:
> > Put it into MigrationState then we can use the properties to specify
> > whether to enable storing global state.
> >
> > Removing global_state_set_optional() since now
On Fri, Jun 23, 2017 at 06:24:32PM -0300, Eduardo Habkost wrote:
> On Fri, Jun 23, 2017 at 12:46:37PM +0800, Peter Xu wrote:
> > We have HW_COMPAT_*, however that's only bound to machines, not other
> > things (like accelerators). Behind it, it was register_compat_prop()
> > that played the
v2.9.0 must start the image with full path can commit the snapshot
changes, https://bugs.launchpad.net/bugs/1700380
Title:
commit snapshot image got Permission denied error
Status in QEMU:
New
Bug description:
qemu 2.9.0, adm64, start image with -snapshot param, make some changes
in the
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