spapr_cpu_init() and spapr_cpu_destroy() are only called from the spapr
cpu core realize/unrealize paths, and really can only be called from there.
Those are all short functions, so fold the pairs together for simplicity.
While we're there rename some functions and change some parameter types
for
Currently we don't have any unrealize path for pnv cpu cores. We get away
with this because we don't yet support cpu hotplug for pnv.
However, we're going to want it eventually, and in the meantime, it makes
it non-obvious why there are a bunch of allocations on the realize() path
that don't have
Currently, we allocate space for all the cpu objects within a single core
in one big block. This was copied from an older version of the spapr code
and requires some ugly pointer manipulation to extract the individual
objects.
This design was due to a misunderstanding of qemu lifetime conventions
CPUPPCState currently contains a number of fields containing the state of
the VPA. The VPA is a PAPR specific concept covering several guest/host
shared memory areas used to communicate some information with the
hypervisor.
As a PAPR concept this is really machine specific information, although i
PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
controller. Or more precisely to the "presentation" component of the
interrupt controller relevant to this cpu.
Really, this field is machine specific. The machines which use it can
point it to different types of object d
On 06/13/2018 02:47 AM, David Gibson wrote:
> On Tue, Jun 12, 2018 at 08:13:49AM +0200, Cédric Le Goater wrote:
>> On 06/12/2018 07:58 AM, David Gibson wrote:
>>> On Wed, Jun 06, 2018 at 09:04:10AM +0200, Cédric Le Goater wrote:
On 06/06/2018 08:39 AM, David Gibson wrote:
> On Wed, May 30,
On Tue, 12 Jun 2018 12:47:29 -0600
Alex Williamson wrote:
> On Tue, 12 Jun 2018 20:12:02 +0200
> Thomas Huth wrote:
>
> > On 12.06.2018 19:30, Richard Henderson wrote:
> > > On 06/11/2018 04:17 AM, Peter Maydell wrote:
> > >> The codebase has a bit of a mix of different multiline
> > >> c
Still only looking at QAPI-related aspects.
Fam Zheng writes:
> This makes VMDK support x-blockdev-create. The implementation reuses the
> image creation code in vmdk_co_create_opts which now acceptes a callback
> pointer to "retrieve" BlockBackend pointers from the caller. This way we
> separat
On 06/13/2018 06:22 AM, David Gibson wrote:
> On Tue, Jun 05, 2018 at 08:41:13AM +0200, Cédric Le Goater wrote:
>> On 06/05/2018 05:34 AM, David Gibson wrote:
>>> On Mon, May 28, 2018 at 09:06:12AM +0200, Cédric Le Goater wrote:
On 05/28/2018 08:17 AM, Thomas Huth wrote:
> On 25.05.2018 16
On Wed, 13 Jun 2018 09:31:40 +1000
David Gibson wrote:
> On Tue, Jun 12, 2018 at 08:46:03PM +0200, Greg Kurz wrote:
> > On Tue, 12 Jun 2018 16:55:08 +0100
> > Peter Maydell wrote:
> >
> > > On 12 June 2018 at 16:52, Greg Kurz wrote:
> > > > On Tue, 12 Jun 2018 15:34:22 +0100
> > > > Peter
On 06/13/2018 06:27 AM, David Gibson wrote:
> On Tue, Jun 05, 2018 at 08:31:49AM +0200, Cédric Le Goater wrote:
>> On 06/05/2018 05:44 AM, David Gibson wrote:
>>> On Sat, May 26, 2018 at 11:40:23AM +0200, Greg Kurz wrote:
On Fri, 18 May 2018 18:44:03 +0200
Cédric Le Goater wrote:
>>
On Wed, 13 Jun 2018 07:42:57 +0200
Markus Armbruster wrote:
> Keno Fischer writes:
>
> > strchrnul is a GNU extension and thus unavailable on a number of targets.
> > In the review for a commit removing strchrnul from 9p, I was asked to
> > create a qemu_strchrnul helper to factor out this func
On 06/13/2018 07:00 AM, David Gibson wrote:
> On Fri, May 18, 2018 at 06:44:04PM +0200, Cédric Le Goater wrote:
>> This proposal moves all the related IRQ routines of the sPAPR machine
>> behind a class interface to prepare for future changes in the IRQ
>> controller model. First of which is a reor
It is wrong to leave this field as 1, as nvme_close() called in the
error handling code in nvme_file_open() will use it and try to free
s->queues again.
Clear the fields to avoid double-free.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Fam Zheng
---
block/nvme.c | 2 ++
1 file changed, 2 insertio
Similar to the host_device's implementation, we check the requested
length against the namespace size.
Truncation is necessary to make qcow2 creation work.
Signed-off-by: Fam Zheng
---
block/nvme.c | 72
1 file changed, 72 insertions(+)
diff
Cornelia Huck writes:
> On Wed, 30 May 2018 11:30:45 +0800
> Peter Xu wrote:
>
>> On Tue, May 29, 2018 at 11:30:00AM +0200, Cornelia Huck wrote:
>> > On Thu, 24 May 2018 12:44:53 +0800
>> > Peter Xu wrote:
>> >
>> > > There are many error_report()s that can be used in frequently called
>> >
Cornelia Huck writes:
> On Wed, 30 May 2018 14:39:55 +0800
> Peter Xu wrote:
>
>> On Wed, May 30, 2018 at 07:47:32AM +0300, Michael S. Tsirkin wrote:
>> > On Thu, May 24, 2018 at 12:44:53PM +0800, Peter Xu wrote:
>> > > There are many error_report()s that can be used in frequently called
>> >
Peter Xu writes:
> There are many error_report()s that can be used in frequently called
> functions, especially on IO paths. That can be unideal in that
> malicious guest can try to trigger the error tons of time which might
> use up the log space on the host (e.g., libvirt can capture the stder
Peter Xu writes:
> Replace existing trace_vtd_err() with error_report_once() then stderr
> will capture something if any of the error happens, meanwhile we don't
> suffer from any DDOS. Then remove the trace point. Since at it,
> provide more information where proper (now we can pass parameters
Am 13.06.2018 um 09:46 hat Fam Zheng geschrieben:
> Similar to the host_device's implementation, we check the requested
> length against the namespace size.
>
> Truncation is necessary to make qcow2 creation work.
>
> Signed-off-by: Fam Zheng
> +static int coroutine_fn nvme_co_create_opts(const
On 06/13/2018 08:57 AM, David Gibson wrote:
> spapr_cpu_init() and spapr_cpu_destroy() are only called from the spapr
> cpu core realize/unrealize paths, and really can only be called from there.
>
> Those are all short functions, so fold the pairs together for simplicity.
> While we're there rena
On 06/13/2018 08:57 AM, David Gibson wrote:
> In pnv_core_realize() we call two functions with an Error * parameter in
> succession, which means if they both cause errors we'll lose the first one.
> Add an extra test/escape to fix this.
I tend now to pass just NULL or &error_abort to object_proper
Am 13.06.2018 um 09:45 hat Fam Zheng geschrieben:
> It is wrong to leave this field as 1, as nvme_close() called in the
> error handling code in nvme_file_open() will use it and try to free
> s->queues again.
>
> Clear the fields to avoid double-free.
>
> Cc: qemu-sta...@nongnu.org
> Signed-off-b
On 06/13/2018 08:57 AM, David Gibson wrote:
> Currently, we allocate space for all the cpu objects within a single core
> in one big block. This was copied from an older version of the spapr code
> and requires some ugly pointer manipulation to extract the individual
> objects.
>
> This design wa
introduce the new z14 Model ZR1 cpu model. Mostly identical to z14, only
the cpu type differs (3906 vs. 3907)
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_models.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index e10035a
On 06/13/2018 08:57 AM, David Gibson wrote:
> pnv_cpu_init() is only called from the the pnv cpu core realize path, and
> really only can be called from there. So fold it into its caller, which
> we also rename for brevity.
>
> Signed-off-by: David Gibson
I think we should set the default CPU s
The qemu_memfd_alloc_check() routine allocates the fd variable on stack.
This variable is initialized inside the qemu_memfd_alloc() function.
There are several cases when *fd will be left unintialized which can
lead to the unexpected close() in the qemu_memfd_free() call.
Set file descriptor to -1
On 06/13/2018 08:57 AM, David Gibson wrote:
> Currently we don't have any unrealize path for pnv cpu cores. We get away
> with this because we don't yet support cpu hotplug for pnv.
>
> However, we're going to want it eventually, and in the meantime, it makes
> it non-obvious why there are a bunc
On Wed, 13 Jun 2018 10:45:06 +1000
David Gibson wrote:
> On Tue, Jun 12, 2018 at 07:04:15PM +0200, Greg Kurz wrote:
> > Bits set in the PCR disable features of the processor. TCG currently
> > doesn't implement that, ie, we always act like if PCR is all zeros.
> >
> > But it is still possible fo
In the memory_region_do_invalidate_mmio_ptr() routine the section
variable is intialized by the memory_region_find() call. The section.mr
field can be set to NULL.
Add the check for NULL before trying to drop a section.
Signed-off-by: Dima Stepanov
---
memory.c | 2 +-
1 file changed, 1 inserti
On Tue, 12 Jun 2018 14:59:33 +0200
Christian Borntraeger wrote:
> Right now the IPL device always starts from address 0x1 (the usual
> Linux entry point). To run other guests (e.g. test programs) it is
> useful to use the IPL PSW from address 0. We can use the Linux magic
> at 0x10008 to deci
During the development process we used scan-build as static analyzer to
check the changes. There are some issues found. The patch set below is
to resolve issues found.
Changes v2:
- remove one patch, since it was resolved by: 7eb24009
Dima Stepanov (2):
memfd: fix possible usage of the uniniti
Michael S. Tsirkin 于2018年6月12日周二 下午9:43写道：
>
> On Tue, Jun 12, 2018 at 05:13:22PM +0800, Zihan Yang wrote:
> > The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
> > add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe
> >
> > Signed-off-by: Zihan Yang
>
>
In the case where we have an interrupt generated externally from inputs to
bits 1 and 2 of port A and/or port B, it is necessary to expose
mos6522_update_irq() so it can be called by the interrupt source.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 1 +
include/hw/misc/mos652
Whilst testing a conversion of Laurent's q800 patchset over to use mos6522
I discovered some issues which prevented IRQs being generated from inputs to
external port pins.
This is a requirement for the q800 patchset which uses external clocks to
generate periodic interrupts.
Signed-off-by: Mark C
The datasheet indicates that the interrupt is generated by ANDing the
interrupt flags register (IFR) with the interrupt enable register (IER)
but currently there is an extra filter for the SR and timer interrupts.
Remove this extra filter to allow interrupts to be generated by external
inputs on b
According to the 6522 datasheet the shift register (SR) interrupt flag is
cleared upon write with no mention of any other interrupt flags.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522
On Wed, 13 Jun 2018 16:57:01 +1000
David Gibson wrote:
> spapr_cpu_init() and spapr_cpu_destroy() are only called from the spapr
> cpu core realize/unrealize paths, and really can only be called from there.
>
> Those are all short functions, so fold the pairs together for simplicity.
> While we'
The boot framebuffer is expected to be configured by the firmware, so it
uses fw_cfg as interface. Initialization goes as follows:
(1) Check whenever etc/ramfb is present.
(2) Allocate framebuffer from RAM.
(3) Fill struct RAMFBCfg, write it to etc/ramfb.
Done. You can write stuff to the
Signed-off-by: Gerd Hoffmann
---
include/hw/display/ramfb.h| 3 +++
hw/arm/sysbus-fdt.c | 7 +
hw/arm/virt.c | 2 ++
hw/display/ramfb-standalone.c | 62 +++
hw/i386/pc_piix.c | 2 ++
hw/i386/pc_q35.c
So we have a boot display when using a vgpu as primary display.
Use vfio-pci-ramfb instead of vfio-pci to enable it.
Signed-off-by: Gerd Hoffmann
---
include/hw/vfio/vfio-common.h | 2 ++
hw/vfio/display.c | 10 ++
hw/vfio/pci.c | 15 +++
3 files
Hi,
So, the first ramfb bits should be ready for merge. This series
includes the ramfb core support bits, the ramfb standalone device
and vfio-pci-ramfb device for vgpu boot display support.
If you want play with it I recommend getting the bits from
https://www.kraxel.org/cgit/qemu/lo
On Tue, Jun 12, 2018 at 11:50:30PM -0400, Emilio G. Cota wrote:
> On Tue, Jun 12, 2018 at 23:15:49 -0400, Yaowei Bai wrote:
> > Signed-off-by: Yaowei Bai
> > ---
> > docs/devel/tracing.txt | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/docs/devel/tracing.txt b/doc
On 06/13/2018 08:57 AM, David Gibson wrote:
> PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
> controller. Or more precisely to the "presentation" component of the
> interrupt controller relevant to this cpu.
yes and that made sense in terms of modeling because you actu
On Tue, 12 Jun 2018 17:19:23 -0500
Michael Roth wrote:
> Also add a few more details regarding normal master->stable patch
> flow.
>
> Cc: Cornelia Huck
> Signed-off-by: Michael Roth
> ---
> docs/devel/stable-process.rst | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git
This series increases the number of vcpus usable in accelerated mode
along with GICv3 and allows up to 256 PCIe busses.
It is a combination of 2 series:
[1] [RFC v3 0/8] KVM/ARM: Relax the max 123 vcpus limitation along
with KVM GICv3
[2] [PATCH 0/2] ARM virt: Support up to 256 PCIe buses
Bot
This patch defines a new ECAM region located after the 256GB limit.
The virt machine state is augmented with a new highmem_ecam field
which guards the usage of this new ECAM region instead of the legacy
16MB one. With the highmem ECAM region, up to 256 PCIe buses can be
used.
Signed-off-by: Eric
Let's check if KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION is supported.
If not, we check the number of redist region is equal to 1 and use the
legacy KVM_VGIC_V3_ADDR_TYPE_REDIST attribute. Otherwise we use
the new attribute and allow to register multiple regions to the
KVM device.
Signed-off-by: Eric Au
for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute, the attribute
data pointed to by kvm_device_attr.addr is a OR of the
redistributor region address and other fields such as the index
of the redistributor region and the number of redistributors the
region can contain.
The existing machine init don
commit b357bf6023a948cf6a9472f07a1b0caac0e4f8e8
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Signed-off-by: Eric Auger
---
include/standard-headers/linux/pci_regs.h| 8
include/standard-headers/linux/virtio_gpu.h | 1 +
include/standard-heade
Depending on the number of smp_cpus we now register one or two
GICR structures.
Signed-off-by: Eric Auger
---
hw/arm/virt-acpi-build.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 74f5744..eefd1d4 100644
--- a/hw/arm/virt-
To prepare for multiple redistributor regions, we introduce
an array of uint32_t properties that stores the redistributor
count of each redistributor region.
Non accelerated VGICv3 only supports a single redistributor region.
The capacity of all redist regions is checked against the number of
vcpu
This patch allows the creation of a GICv3 node with 1 or 2
redistributor regions depending on the number of smu_cpus.
The second redistributor region is located just after the
existing RAM region, at 256GB and contains up to up to 512 vcpus.
Please refer to kernel documentation for further node de
On Tue, 12 Jun 2018 11:49:22 -0300
Eduardo Habkost wrote:
> On Tue, Jun 12, 2018 at 03:58:03PM +0200, Igor Mammedov wrote:
> [...]
> > > > > +if (xcc->host_cpuid_required && enable_cpu_pm) {
> > > > > +host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
> > > > > + &c
With a VGICv3 KVM device, if the number of vcpus exceeds the
capacity of the legacy redistributor region (123 redistributors),
we now attempt to register a second redistributor region. Up to
512 redistributors can fit in this latter on top of the 123 allowed
by the legacy redistributor region.
Reg
On Wed, 13 Jun 2018, David Gibson wrote:
On Wed, Jun 06, 2018 at 07:35:28PM +0200, BALATON Zoltan wrote:
On Wed, 6 Jun 2018, Philippe Mathieu-Daudé wrote:
On 06/06/2018 10:31 AM, BALATON Zoltan wrote:
Basic emulation of the M41T80 serial (I2C) RTC chip. Only getting time
of day is implemented.
On Wed, 13 Jun 2018, David Gibson wrote:
On Fri, Jun 08, 2018 at 11:20:50AM +0200, BALATON Zoltan wrote:
On Fri, 8 Jun 2018, David Gibson wrote:
On Wed, Jun 06, 2018 at 03:31:48PM +0200, BALATON Zoltan wrote:
Signed-off-by: BALATON Zoltan
It's not clear to me why this is preferable to havin
This machine type supports two new features:
- highmem 256MB ECAM (default). This feature is disabled for
earlier machine types and if highmem is off.
- max_cpus set to 512 vcpus (255 before)
The high 256MB ECAM region is chosen instead of the legacy
16MB one if the machine type allows it, if hi
On Wed, 13 Jun 2018, David Gibson wrote:
On Wed, Jun 06, 2018 at 03:31:48PM +0200, BALATON Zoltan wrote:
Signed-off-by: BALATON Zoltan
---
default-configs/ppc-softmmu.mak| 1 +
default-configs/ppcemb-softmmu.mak | 1 +
hw/i2c/ppc4xx_i2c.c| 14 +-
3 files chang
On 13.06.2018 10:18, Christian Borntraeger wrote:
> introduce the new z14 Model ZR1 cpu model. Mostly identical to z14, only
> the cpu type differs (3906 vs. 3907)
>
> Signed-off-by: Christian Borntraeger
> ---
> target/s390x/cpu_models.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a
On Wed, 13 Jun 2018 10:11:45 +0200
Cédric Le Goater wrote:
> On 06/13/2018 08:57 AM, David Gibson wrote:
> > spapr_cpu_init() and spapr_cpu_destroy() are only called from the spapr
> > cpu core realize/unrealize paths, and really can only be called from there.
> >
> > Those are all short functio
On Wed, Jun 13, 2018 at 10:01:22AM +0200, Markus Armbruster wrote:
> Peter Xu writes:
>
> > There are many error_report()s that can be used in frequently called
> > functions, especially on IO paths. That can be unideal in that
> > malicious guest can try to trigger the error tons of time which
On Wed, 13 Jun 2018 16:57:02 +1000
David Gibson wrote:
> In pnv_core_realize() we call two functions with an Error * parameter in
> succession, which means if they both cause errors we'll lose the first one.
Not exactly. The error code doesn't allow that and QEMU will abort.
static void error_s
On Wed, 13 Jun 2018 16:57:03 +1000
David Gibson wrote:
> Currently, we allocate space for all the cpu objects within a single core
> in one big block. This was copied from an older version of the spapr code
> and requires some ugly pointer manipulation to extract the individual
> objects.
>
> T
>> index 13ad7d9e04..efb68226bb 100644
>> --- a/hw/ppc/pnv_core.c
>> +++ b/hw/ppc/pnv_core.c
>> @@ -173,6 +173,9 @@ static void pnv_core_realize(DeviceState *dev, Error
>> **errp)
>>
>> snprintf(name, sizeof(name), "thread[%d]", i);
>> object_property_add_child(OBJECT(pc), name
On Wed, 13 Jun 2018 16:57:04 +1000
David Gibson wrote:
> pnv_cpu_init() is only called from the the pnv cpu core realize path, and
> really only can be called from there. So fold it into its caller, which
> we also rename for brevity.
>
> Signed-off-by: David Gibson
> ---
Reviewed-by: Greg Ku
On Wed, 06/13 10:06, Kevin Wolf wrote:
> Am 13.06.2018 um 09:46 hat Fam Zheng geschrieben:
> > Similar to the host_device's implementation, we check the requested
> > length against the namespace size.
> >
> > Truncation is necessary to make qcow2 creation work.
> >
> > Signed-off-by: Fam Zheng
On Wed, 13 Jun 2018 16:57:05 +1000
David Gibson wrote:
> Currently we don't have any unrealize path for pnv cpu cores. We get away
> with this because we don't yet support cpu hotplug for pnv.
>
> However, we're going to want it eventually, and in the meantime, it makes
> it non-obvious why the
On Mon, 11 Jun 2018 14:16:45 +0200
David Hildenbrand wrote:
> Not needed anymore, let's drop it.
>
> Signed-off-by: David Hildenbrand
Reviewed-by: Igor Mammedov
> ---
> hw/mem/pc-dimm.c | 5 -
> 1 file changed, 5 deletions(-)
>
> diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c
> index
On Wed, Jun 13, 2018 at 12:02:59PM +0800, Peter Xu wrote:
> On Tue, Jun 12, 2018 at 09:52:45AM +0100, Peter Maydell wrote:
> > On 12 June 2018 at 07:24, Peter Xu wrote:
> > > For example, I wanted to compile QEMU once and install it on multiple
> > > systems. What would be the suggested way to do
On Wed, Jun 13, 2018 at 10:11:45AM +0200, Cédric Le Goater wrote:
> On 06/13/2018 08:57 AM, David Gibson wrote:
> > spapr_cpu_init() and spapr_cpu_destroy() are only called from the spapr
> > cpu core realize/unrealize paths, and really can only be called from there.
> >
> > Those are all short fu
On Wed, Jun 13, 2018 at 10:20:43AM +0200, Cédric Le Goater wrote:
> On 06/13/2018 08:57 AM, David Gibson wrote:
> > pnv_cpu_init() is only called from the the pnv cpu core realize path, and
> > really only can be called from there. So fold it into its caller, which
> > we also rename for brevity.
On Wed, Jun 13, 2018 at 10:15:09AM +0200, Cédric Le Goater wrote:
> On 06/13/2018 08:57 AM, David Gibson wrote:
> > In pnv_core_realize() we call two functions with an Error * parameter in
> > succession, which means if they both cause errors we'll lose the first one.
> > Add an extra test/escape t
On Wed, Jun 13, 2018 at 09:30:12AM +0100, Mark Cave-Ayland wrote:
> Whilst testing a conversion of Laurent's q800 patchset over to use mos6522
> I discovered some issues which prevented IRQs being generated from inputs to
> external port pins.
>
> This is a requirement for the q800 patchset which
Hi,
On 06/13/2018 10:05 AM, Markus Armbruster wrote:
> Peter Xu writes:
>
>> Replace existing trace_vtd_err() with error_report_once() then stderr
>> will capture something if any of the error happens, meanwhile we don't
>> suffer from any DDOS. Then remove the trace point. Since at it,
>> prov
On Tue, Jun 12, 2018 at 03:48:34PM -0400, Farhan Ali wrote:
> The virtio-crypto driver currently propagates to the guest
> all the cipher algorithms that the backend cryptodev can
> support. But in certain cases where the guest has more
> performant mechanism to handle some algorithms, it would be
On Mon, 11 Jun 2018 14:16:46 +0200
David Hildenbrand wrote:
> Our parent class (PC_DIMM) provides exactly the same function.
>
> Signed-off-by: David Hildenbrand
Reviewed-by: Igor Mammedov
> ---
> hw/mem/nvdimm.c | 6 --
> 1 file changed, 6 deletions(-)
>
> diff --git a/hw/mem/nvdimm.c
On 06/13/2018 11:00 AM, David Hildenbrand wrote:
> On 13.06.2018 10:18, Christian Borntraeger wrote:
>> introduce the new z14 Model ZR1 cpu model. Mostly identical to z14, only
>> the cpu type differs (3906 vs. 3907)
>>
>> Signed-off-by: Christian Borntraeger
>> ---
>> target/s390x/cpu_models.
On Wed, Jun 13, 2018 at 11:46:57AM +0530, P J P wrote:
> From: Prasad J Pandit
>
> While reading file content via 'guest-file-read' command,
> 'qmp_guest_file_read' routine allocates buffer of count+1
> bytes. It could overflow for large values of 'count'.
> Add check to avoid it.
No objection t
On Wed, 13 Jun 2018 11:14:57 +0200
Cédric Le Goater wrote:
> >> index 13ad7d9e04..efb68226bb 100644
> >> --- a/hw/ppc/pnv_core.c
> >> +++ b/hw/ppc/pnv_core.c
> >> @@ -173,6 +173,9 @@ static void pnv_core_realize(DeviceState *dev, Error
> >> **errp)
> >>
> >> snprintf(name, sizeof(name
On Wed, Jun 13, 2018 at 10:46:02AM +0200, Cédric Le Goater wrote:
> On 06/13/2018 08:57 AM, David Gibson wrote:
> > PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
> > controller. Or more precisely to the "presentation" component of the
> > interrupt controller relevant t
On Wed, Jun 13, 2018 at 11:14:57AM +0200, Cédric Le Goater wrote:
> >> index 13ad7d9e04..efb68226bb 100644
> >> --- a/hw/ppc/pnv_core.c
> >> +++ b/hw/ppc/pnv_core.c
> >> @@ -173,6 +173,9 @@ static void pnv_core_realize(DeviceState *dev, Error
> >> **errp)
> >>
> >> snprintf(name, sizeof
MIPS jazz is the last user of the legacy esp_init() function so move creation
of the ESP device over to use qdev.
Note that the esp_reset and dma_enable qemu_irqs are currently unused and so
we do not wire these up and instead remove the variables to prevent the
compiler emitting unused variable w
Something else that came out of reviewing Laurent's q800 patchset: after my
SPARC cleanups last year, MIPS Jazz is the last remaining user of the legacy
esp_init() function.
Patch 1 switches mips_jazz_init() over to create the ESP device directly
via qdev. Please note that I do not have any MIPS j
Remove the legacy esp_init() function now that there are no more remaining
users.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 30 --
include/hw/scsi/esp.h | 5 -
2 files changed, 35 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 9e
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180613084149.14523-1-kra...@redhat.com
Subject: [Qemu-devel] [PATCH v4 0/3] ramfb: simple boot framebuffer
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git
On 12/06/2018 21:05, Eric Auger wrote:
> When an IOMMUMemoryRegion is in front of a virtio device,
> address_space_cache_init does not set cache->ptr as the memory
> region is not RAM. However when the device performs an access,
> we end up in glue() which performs the translation and then uses
> M
On 06/13/2018 11:00 AM, David Hildenbrand wrote:
> On 13.06.2018 10:18, Christian Borntraeger wrote:
>> introduce the new z14 Model ZR1 cpu model. Mostly identical to z14, only
>> the cpu type differs (3906 vs. 3907)
>>
>> Signed-off-by: Christian Borntraeger
>> ---
>> target/s390x/cpu_models.
On Wed, Jun 13, 2018 at 11:42:07AM +0200, Greg Kurz wrote:
> On Wed, 13 Jun 2018 11:14:57 +0200
> Cédric Le Goater wrote:
>
> > >> index 13ad7d9e04..efb68226bb 100644
> > >> --- a/hw/ppc/pnv_core.c
> > >> +++ b/hw/ppc/pnv_core.c
> > >> @@ -173,6 +173,9 @@ static void pnv_core_realize(DeviceState
On Wed, Jun 13, 2018 at 10:19 AM, Dima Stepanov wrote:
> The qemu_memfd_alloc_check() routine allocates the fd variable on stack.
> This variable is initialized inside the qemu_memfd_alloc() function.
> There are several cases when *fd will be left unintialized which can
> lead to the unexpected c
On Wed, Jun 13, 2018 at 10:54:22AM +0200, BALATON Zoltan wrote:
> On Wed, 13 Jun 2018, David Gibson wrote:
> > On Wed, Jun 06, 2018 at 03:31:48PM +0200, BALATON Zoltan wrote:
> > > Signed-off-by: BALATON Zoltan
> > > ---
> > > default-configs/ppc-softmmu.mak| 1 +
> > > default-configs/ppcem
On Wed, Jun 13, 2018 at 10:50:59AM +0200, BALATON Zoltan wrote:
> On Wed, 13 Jun 2018, David Gibson wrote:
> > On Wed, Jun 06, 2018 at 07:35:28PM +0200, BALATON Zoltan wrote:
> > > On Wed, 6 Jun 2018, Philippe Mathieu-Daudé wrote:
> > > > On 06/06/2018 10:31 AM, BALATON Zoltan wrote:
> > > > > Basi
On Wed, Jun 13, 2018 at 10:56:59AM +0200, BALATON Zoltan wrote:
> On Wed, 13 Jun 2018, David Gibson wrote:
> > On Fri, Jun 08, 2018 at 11:20:50AM +0200, BALATON Zoltan wrote:
> > > On Fri, 8 Jun 2018, David Gibson wrote:
> > > > On Wed, Jun 06, 2018 at 03:31:48PM +0200, BALATON Zoltan wrote:
> > >
On 13/06/2018 11:47, Mark Cave-Ayland wrote:
> +dev = qdev_create(NULL, TYPE_ESP);
> +sysbus_esp = ESP_STATE(dev);
> +esp = &sysbus_esp->esp;
> +esp->dma_memory_read = rc4030_dma_read;
> +esp->dma_memory_write = rc4030_dma_write;
> +esp->dma_opaque = dmas[0];
Poking at the
On Mon, 11 Jun 2018 14:16:47 +0200
David Hildenbrand wrote:
> We can perform these checks before the device is actually realized.
>
> Signed-off-by: David Hildenbrand
Reviewed-by: Igor Mammedov
> ---
> hw/i386/pc.c | 44 ++--
> 1 file changed, 26 inse
On Wed, 13 Jun 2018 16:57:06 +1000
David Gibson wrote:
> PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
> controller. Or more precisely to the "presentation" component of the
> interrupt controller relevant to this cpu.
>
> Really, this field is machine specific. Th
On Mon, 11 Jun 2018 14:16:48 +0200
David Hildenbrand wrote:
> Unused, so let's remove it.
>
> Signed-off-by: David Hildenbrand
Reviewed-by: Igor Mammedov
> ---
> backends/hostmem.c | 3 +--
> hw/mem/nvdimm.c | 4 ++--
> hw/mem/pc-dimm.c | 4 ++--
> hw/misc/ivshmem.c
On Wed, Jun 13, 2018 at 12:11:12PM +0200, Greg Kurz wrote:
> On Wed, 13 Jun 2018 16:57:06 +1000
> David Gibson wrote:
>
> > PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
> > controller. Or more precisely to the "presentation" component of the
> > interrupt controller
On Wed, 13 Jun 2018 16:57:07 +1000
David Gibson wrote:
> CPUPPCState currently contains a number of fields containing the state of
> the VPA. The VPA is a PAPR specific concept covering several guest/host
> shared memory areas used to communicate some information with the
> hypervisor.
>
> As a
On Mon, Jun 04, 2018 at 04:22:05PM -0400, Konrad Rzeszutek Wilk wrote:
> On Mon, Jun 04, 2018 at 05:07:01PM -0300, Eduardo Habkost wrote:
> > On Fri, Jun 01, 2018 at 11:38:08AM -0400, Konrad Rzeszutek Wilk wrote:
> > > AMD future CPUs expose _two_ ways to utilize the Intel equivalant
> > > of the S
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