On Tue, 2 Jul 2019 19:18:16 +0200
Eric Auger wrote:
> Report an error in case we fail to set a trigger action
> on any VFIO_PCI_MSIX_IRQ_INDEX subindex. This might be
> useful in debugging a device that is not working properly.
>
> Signed-off-by: Eric Auger
> ---
> hw/vfio/pci.c | 7 +--
From: Nathaniel Graff
Writes to the SiFive PRCI registers are preserved while leaving the
ready bits set for the HFX/HFR oscillators and the lock bit set for the
PLL.
Signed-off-by: Nathaniel Graff
Reviewed-by: Michael Clark
Signed-off-by: Palmer Dabbelt
---
hw/riscv/sifive_prci.c |
From: Alistair Francis
This patch allows us to enable/disable the RISC-V ISA extensions from
the QEMU command line. This works with the rv32 and rv64 machines. The
idea is that in the future we can now add extensions and leave them
disabled by default until enabled by the user.
Signed-off-by:
merged tag 'mips-queue-jun-21-2019'
The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-21-2019'
into staging (2019-06-21 15:40:50 +0100)
are available in the Git repository at:
From: Hesham Almatary
The current implementation unnecessarily checks for PMP even if MMU translation
failed. This may trigger a wrong PMP access exception instead of
a page exception.
For example, the very first instruction fetched after the first satp write in
S-Mode will trigger a PMP access
From: Li Qiang
While loading virtio-gpu, the data can be malicious, we
should check if the resource already exists.
Signed-off-by: Li Qiang
Reviewed-by: Marc-André Lureau
Message-id: 20190628161358.10400-1-liq...@163.com
Signed-off-by: Gerd Hoffmann
---
hw/display/virtio-gpu.c | 5 +
1
From: Alistair Francis
Set the priv spec version 1.11.0 as the default and allow selecting it
via the command line.
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
The various CSR instructions have been split out of the base ISA as part
of the ratification process. This patch adds a Zicsr argument, which
disables all the CSR instructions.
Signed-off-by: Palmer Dabbelt
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 1 +
From: Bin Meng
At present the cpu, plic and ethclk nodes' phandles are hard-coded
to 1/2/3 in DT. If we configure more than 1 cpu for the machine,
all cpu nodes' phandles conflict with each other as they are all 1.
Fix it by removing the hardcode.
Signed-off-by: Bin Meng
Reviewed-by: Alistair
From: Joel Sing
This prevents a load reservation from being placed in one context/process,
then being used in another, resulting in an SC succeeding incorrectly and
breaking atomics.
Signed-off-by: Joel Sing
Reviewed-by: Palmer Dabbelt
Reviewed-by: Richard Henderson
Signed-off-by: Palmer
On Wednesday 03 July 2019 08:50 AM, David Gibson wrote:
> On Tue, Jul 02, 2019 at 04:10:08PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Tuesday 02 July 2019 09:41 AM, David Gibson wrote:
>>> On Wed, Jun 12, 2019 at 02:51:38PM +0530, Aravinda Prasad wrote:
This patch adds support in QEMU to
On Wed, Jul 03, 2019 at 11:04:38AM +0200, Auger Eric wrote:
> Hi Peter,
Hi, Eric,
>
> On 7/3/19 7:41 AM, Peter Xu wrote:
> > On Mon, Jul 01, 2019 at 11:30:31AM +0200, Eric Auger wrote:
> >> In nested mode, the stage 1 translation tables are owned by
> >> the guest and there is no caching on
> are available in the Git repository at:
>
> g...@github.com:aik/qemu.git tags/qemu-slof-20190703
>
> for you to fetch changes up to cb20f6ca4faf79895ebbe279d1176344e0638b37:
>
> pseries: Update SLOF firmware image (2019-0
The following changes since commit 474f3938d79ab36b9231c9ad3b5a9314c2aeacde:
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-21-2019'
into staging (2019-06-21 15:40:50 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/audio-20190703-pull
From: Martin Schrodt
Several people have reported to have bag microphone lag with the PA
backend. While I cannot reproduce the problem here, it seems that their
PA somehow decides to buffer the microphone input for way too long,
causing this delay. This patch sets an upper limit to the amount of
On Wednesday 03 July 2019 08:37 AM, David Gibson wrote:
> On Tue, Jul 02, 2019 at 03:19:24PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Tuesday 02 July 2019 09:33 AM, David Gibson wrote:
>>> On Wed, Jun 12, 2019 at 02:51:21PM +0530, Aravinda Prasad wrote:
Upon a machine check exception
Hi
On 7/2/19 9:41 PM, Alex Williamson wrote:
> Coverity doesn't like that most callers of vfio_set_irq_signaling() check
> the return value and doesn't understand the equivalence of testing the
> error pointer instead. Test the return value consistently.
>
> Reported-by: Coverity (CID 1402783)
From: Jim Wilson
32-bit RISC-V uses _llseek instead of lseek as syscall number 62.
Update syscall list from open-embedded build, primarily because
32-bit RISC-V requires statx support.
Tested with cross gcc testsuite runs for rv32 and rv64, with the
pending statx patch also applied.
From: Alistair Francis
Remove the user version information. This was never used and never
publically exposed in a release of QEMU, so let's just remove it. In
future to manage versions we can extend the extension properties to
specify version.
Signed-off-by: Alistair Francis
Reviewed-by:
On Wednesday 03 July 2019 08:33 AM, David Gibson wrote:
> On Tue, Jul 02, 2019 at 11:54:26AM +0530, Aravinda Prasad wrote:
>>
>>
>> On Tuesday 02 July 2019 09:21 AM, David Gibson wrote:
>>> On Wed, Jun 12, 2019 at 02:51:04PM +0530, Aravinda Prasad wrote:
Introduce the KVM capability
On Tue, Jul 02, 2019 at 02:11:02PM +0200, Sergio Lopez wrote:
> Microvm is a machine type inspired by both NEMU and Firecracker, and
> constructed after the machine model implemented by the latter.
>
> It's main purpose is providing users a KVM-only machine type with fast
> boot times, minimal
On Tue, 2 Jul 2019 18:57:26 -0300
Eduardo Habkost wrote:
> This will help us avoid spurious warnings during "make check".
>
> Note that this will silence the warnings generated by
> tests/numa-test, but not the ones generated by
> tests/bios-tables-test. We still need to change
>
Peter Maydell writes:
> On Tue, 2 Jul 2019 at 11:25, Alex Bennée wrote:
>>
>> The following changes since commit 7d0e02405fc02a181319b1ab8681d2f72246b7c6:
>>
>> Merge remote-tracking branch
>> 'remotes/vivier2/tags/trivial-patches-pull-request' into staging (2019-07-01
>> 17:40:32 +0100)
Fixes: 0cca7e7bfd6c81cc3c29ec2b3a0a98954c4ba71a
Reported-by: Bruce Rogers
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Gerd Hoffmann
Message-id: 20190703045212.31039-1-kra...@redhat.com
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
On 7/3/19 3:12 AM, Wei Yang wrote:
> Commit 6b6712efccd3 ('ram: Split dirty bitmap by RAMBlock') changes the
> parameter of postcopy_send_discard_bm_ram(), while left the document
> part untouched.
>
> This patch correct the document and fix one typo by hand.
>
> Signed-off-by: Wei Yang
> ---
>
From: Atish Patra
Currently, there is no cpu topology defined in RISC-V.
Define a device tree node that clearly describes the
entire topology. This saves the trouble of scanning individual
cache to figure out the topology.
Here is the linux kernel patch series that enables topology
for RISC-V.
From: Michael Clark
Due to the design of the disassembler, the immediate is not
known during decoding of the opcode; so to handle compressed
encodings with reserved immediate values (non-zero), we need
to add an additional check during decompression to match
reserved encodings with zero
On Mon, Jul 01, 2019 at 12:16:44PM +0200, Philippe Mathieu-Daudé wrote:
> On 7/1/19 10:37 AM, Stefan Hajnoczi wrote:
> > On Fri, Jun 28, 2019 at 02:45:29PM +0200, Damien Hedde wrote:
> >> This series adds a python framework aiming to provide some ways to do fault
> >> injection in a running vm. In
On Tue, Jul 02, 2019 at 07:01:31PM +, Julio Montes wrote:
> How to reproduce it?
> ===
>
> ```
> $ ./configure --disable-spice --disable-vte --disable-vnc \
> --disable-vnc-jpeg --disable-vnc-png --disable-vnc-sasl
> $ make
> ...
> monitor/hmp-cmds.c: In function ‘hmp_change’:
>
From: Michael Clark
This patch adds support for the riscv_cpu_unassigned_access call
and will raise a load or store access fault.
Signed-off-by: Michael Clark
[Changes by AF:
- Squash two patches and rewrite commit message
- Set baddr to the access address
]
Signed-off-by: Alistair Francis
From: Alistair Francis
Deprecate the RISC-V privledge spec version 1.09.1 in favour of the new
1.10.0 and the ratified 1.11.0.
Signed-off-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
qemu-deprecated.texi | 8
1 file changed, 8 insertions(+)
diff --git
On 7/3/19 3:38 AM, Zhang Chen wrote:
> From: Zhang Chen
>
> Address Peter's comments in patch "COLO-compare:Add colo-compare
> remote notify support".
This comment is not useful in the git history (no reference).
You might reword him, use full coment, or simply:
Reported-by: Coverity (CID
Hi Peter,
On 7/3/19 7:41 AM, Peter Xu wrote:
> On Mon, Jul 01, 2019 at 11:30:31AM +0200, Eric Auger wrote:
>> In nested mode, the stage 1 translation tables are owned by
>> the guest and there is no caching on host side. So there is
>> no need to replay the mappings.
>>
>> As of today, the SMMUv3
Hi Peter,
On 7/3/19 7:42 AM, Peter Xu wrote:
> On Mon, Jul 01, 2019 at 11:30:30AM +0200, Eric Auger wrote:
>> We introduce a new IOMMU Memory Region attribute,
>> IOMMU_ATTR_VFIO_NESTED that tells whether the virtual IOMMU
>> requires physical nested stages for VFIO integration.
>>
>> Current
On 7/2/19 8:05 PM, Laurent Vivier wrote:
> Le 02/07/2019 à 19:05, no-re...@patchew.org a écrit :
>> Patchew URL:
>> https://patchew.org/QEMU/20190702123713.14396-1-laur...@vivier.eu/
> ...
>> PASS 2 qmp-test /x86_64/qmp/oob
>> PASS 3 qmp-test /x86_64/qmp/preconfig
>> PASS 4 qmp-test
On Sun, Jun 30, 2019 at 06:08:54PM +0300, Maxim Levitsky wrote:
> It looks like Linux block devices, even in O_DIRECT mode don't have any user
> visible
> limit on transfer size / number of segments, which underlying block device
> can have.
> The block layer takes care of enforcing these limits
On Tue, Jul 02, 2019 at 10:08:54PM +, Raphael Norwitz wrote:
> For background I am trying to work around a ram slot limit imposed by the
> vhost-user protocol. We are having trouble reconciling the comment here:
> https://github.com/qemu/qemu/blob/master/hw/virtio/vhost-user.c#L333 that
>
Patchew URL:
https://patchew.org/QEMU/20190703013805.2722-1-chen.zh...@intel.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
On 7/3/19 9:36 AM, Markus Armbruster wrote:
> Did this fall through the cracks?
>
> Denis Plotnikov writes:
>
>> Right now QMP and HMP monitors read 1 byte at a time from the socket, which
>> is very inefficient. With 100+ VMs on the host this easily reasults in
>> a lot of unnecessary system
On Tue, Jul 02, 2019 at 11:09:14AM -0400, Jason Dillaman wrote:
> On Fri, Jun 28, 2019 at 4:59 AM Stefano Garzarella
> wrote:
> >
> > On Thu, Jun 27, 2019 at 03:43:04PM -0400, Jason Dillaman wrote:
> > > On Thu, Jun 27, 2019 at 1:24 PM John Snow wrote:
> > > > On 6/27/19 4:48 AM, Stefano
Patchew URL: https://patchew.org/QEMU/20190703045212.31039-1-kra...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make
Thank you!
С уважением,
Наталья
-Original Message-
From: Markus Armbruster [mailto:arm...@redhat.com]
Sent: Tuesday, July 02, 2019 6:26 PM
To: Natalia Fursova
Cc: 'Paolo Bonzini'; 'Andreas Färber'; 'Паша'; qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] qgraph
"Natalia Fursova"
Hi guys,
We found a qemu core in our testing environment, the assertion
'assert(bus->irq_count[i] == 0)' in pcibus_reset() was triggered and
the bus->irq_count[i] is '-1'.
Through analysis, it was happened after VM migration and we think
it was caused by the following sequence:
*Migration
From: Hesham Almatary
The PMP should be checked when doing a page table walk, and report access
fault exception if the to-be-read PTE failed the PMP check.
Suggested-by: Jonathan Behrens
Signed-off-by: Hesham Almatary
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
---
From: Bin Meng
At present the PLIC is instantiated to support only one hart, while
the machine allows at most 4 harts to be created. When more than 1
hart is configured, PLIC needs to instantiated to support multicore,
otherwise an SMP OS does not work.
Signed-off-by: Bin Meng
Reviewed-by:
We land here in case not everything we've asked for could be mapped.
So unmap only the bytes which have actually been mapped.
Also we didn't access anything, so acces_len can be 0.
Reported-by: Laszlo Ersek
Signed-off-by: Gerd Hoffmann
Reviewed-by: Laszlo Ersek
Reviewed-by: Li Qiang
Did this fall through the cracks?
Denis Plotnikov writes:
> Right now QMP and HMP monitors read 1 byte at a time from the socket, which
> is very inefficient. With 100+ VMs on the host this easily reasults in
> a lot of unnecessary system calls and CPU usage in the system.
Yes, reading one
Patchew URL:
https://patchew.org/QEMU/1562068213-11307-1-git-send-email-aleksandar.marko...@rt-rk.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
Patchew URL: https://patchew.org/QEMU/20190703065600.13535-1-kra...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make
On Fri, Jun 28, 2019 at 8:53 PM Li Qiang wrote:
>
> While loading virtio-gpu, the data can be malicious, we
> should check if the resource already exists.
>
> Signed-off-by: Li Qiang
Reviewed-by: Marc-André Lureau
> ---
> hw/display/virtio-gpu.c | 5 +
> 1 file changed, 5 insertions(+)
>
From: Alistair Francis
1.11 defines mcountinhibit, which has the same numeric CSR value as
mucounteren from 1.09.1 but has different semantics. This patch enables
the CSR for 1.11-based targets, which is trivial to implement because
the counters in QEMU never tick (legal according to the spec).
From: Peter Maydell
Currently the bitbang_i2c_init() function allocates a
bitbang_i2c_interface struct which it returns. This is unfortunate
because it means that if the function is used from a DeviceState
init method then the memory will be leaked by an "init then delete"
cycle, as used by the
On 7/2/19 9:41 PM, Alex Williamson wrote:
> Coverity doesn't like that most callers of vfio_set_irq_signaling() check
> the return value and doesn't understand the equivalence of testing the
> error pointer instead. Test the return value consistently.
>
> Reported-by: Coverity (CID 1402783)
>
On Tue, 02 Jul 2019 13:41:34 -0600
Alex Williamson wrote:
> Coverity doesn't like that most callers of vfio_set_irq_signaling() check
> the return value and doesn't understand the equivalence of testing the
> error pointer instead. Test the return value consistently.
>
> Reported-by: Coverity
On 7/3/19 6:52 AM, Gerd Hoffmann wrote:
> Fixes: 0cca7e7bfd6c81cc3c29ec2b3a0a98954c4ba71a
> Reported-by: Bruce Rogers
> Signed-off-by: Gerd Hoffmann
> ---
> Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Makefile b/Makefile
> index cfb18f152544..452f63dc8429
Patchew URL: https://patchew.org/QEMU/20190702150545.1872-1-laur...@vivier.eu/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make
Patchew URL:
https://patchew.org/QEMU/1562085328-5126-1-git-send-email-aleksandar.marko...@rt-rk.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
From: Dayeol Lee
A wrong address is passed to `pmp_is_in_range` while checking if a
memory access is within a PMP range.
Since the ending address of the pmp range (i.e., pmp_state.addr[i].ea)
is set to the last address in the range (i.e., pmp base + pmp size - 1),
memory accesses containg the
From: Hesham Almatary
The current PMP check function checks for env->priv which is not the effective
memory privilege mode.
For example, mstatus.MPRV could be set while executing in M-Mode, and in that
case the privilege mode for the PMP check should be S-Mode rather than M-Mode
(in env->priv)
From: Hesham Almatary
The PMP check should be of the memory access size rather
than TARGET_PAGE_SIZE.
Signed-off-by: Hesham Almatary
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu_helper.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
Coverity pointed out a memory leak in riscv_sifive_e_soc_realize(),
where a pair of recently added MemoryRegion instances would not be freed
if there were errors elsewhere in the function. The fix here is to
simply not use dynamic allocation for these instances: there's always
one of each in
From: Alistair Francis
Add support for the ratified RISC-V privledge spec.
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu.h | 1 +
target/riscv/insn_trans/trans_privileged.inc.c | 2 +-
2 files
From: Alistair Francis
Add support for disabling/enabling the "Counters" extension.
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 1 +
target/riscv/csr.c | 17 -
3 files changed,
From: Alistair Francis
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ba1325f43533..1689ffecf85f 100644
---
Patchew URL:
https://patchew.org/QEMU/1562085328-5126-1-git-send-email-aleksandar.marko...@rt-rk.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
Paolo Bonzini writes:
> On 03/07/19 07:05, Markus Armbruster wrote:
>> static const TypeInfo iommu_memory_region_info = {
>> .parent = TYPE_MEMORY_REGION,
>> .name = TYPE_IOMMU_MEMORY_REGION,
>> .class_size =
Patchew URL:
https://patchew.org/QEMU/156209642116.14915.9598593247782519613.st...@gimli.home/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
On Tue, Jul 02, 2019 at 03:19:24PM +0530, Aravinda Prasad wrote:
>
>
> On Tuesday 02 July 2019 09:33 AM, David Gibson wrote:
> > On Wed, Jun 12, 2019 at 02:51:21PM +0530, Aravinda Prasad wrote:
> >> Upon a machine check exception (MCE) in a guest address space,
> >> KVM causes a guest exit to
On Tue, Jul 02, 2019 at 04:10:08PM +0530, Aravinda Prasad wrote:
>
>
> On Tuesday 02 July 2019 09:41 AM, David Gibson wrote:
> > On Wed, Jun 12, 2019 at 02:51:38PM +0530, Aravinda Prasad wrote:
> >> This patch adds support in QEMU to handle "ibm,nmi-register"
> >> and "ibm,nmi-interlock" RTAS
On Mon, Jul 01, 2019 at 04:19:46PM +1000, Suraj Jitindar Singh wrote:
> The ibm,get_system_parameter rtas call is used by the guest to retrieve
> data relating to certain parameters of the system. The SPLPAR
> characteristics option (token 20) is used to determin characteristics of
> the
On Tue, Jul 02, 2019 at 11:54:26AM +0530, Aravinda Prasad wrote:
>
>
> On Tuesday 02 July 2019 09:21 AM, David Gibson wrote:
> > On Wed, Jun 12, 2019 at 02:51:04PM +0530, Aravinda Prasad wrote:
> >> Introduce the KVM capability KVM_CAP_PPC_FWNMI so that
> >> the KVM causes guest exit with NMI as
From: Alistair Francis
Restructure the deprecated CPUs to make it clear in the code that these
are depreated. They are already marked as deprecated in
qemu-deprecated.texi. There are no functional changes.
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer
On 7/2/19 6:38 PM, Peter Maydell wrote:
> Currently the bitbang_i2c_init() function allocates a
> bitbang_i2c_interface struct which it returns. This is unfortunate
> because it means that if the function is used from a DeviceState
> init method then the memory will be leaked by an "init then
Patchew URL:
https://patchew.org/QEMU/20190702171816.11939-1-eric.au...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
From: Alistair Francis
Extend the RISC-V kernel loader to support Image and uImage files.
A Linux kernel can now be booted with:
qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel Image
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Tested-by: Bin Meng
Signed-off-by:
The following changes since commit 506179e42112be77bfd071f050b15762d3b2cd43:
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190702' into
staging (2019-07-02 18:56:44 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/vga-20190703-pull-request
Hi Peter,
On 7/3/19 12:21 PM, Peter Xu wrote:
> On Wed, Jul 03, 2019 at 11:04:38AM +0200, Auger Eric wrote:
>> Hi Peter,
>
> Hi, Eric,
>
>>
>> On 7/3/19 7:41 AM, Peter Xu wrote:
>>> On Mon, Jul 01, 2019 at 11:30:31AM +0200, Eric Auger wrote:
In nested mode, the stage 1 translation tables
I apologize for replying so late.
Stefan Hajnoczi writes:
> On Tue, Jun 11, 2019 at 03:36:53PM +0800, Fam Zheng wrote:
>> On Mon, 06/10 19:18, Aarushi Mehta wrote:
>> > Option only enumerates for hosts that support it.
>> >
>> > Signed-off-by: Aarushi Mehta
>> > Reviewed-by: Stefan Hajnoczi
From: Bin Meng
The largest pci bus number should be calculated from ECAM size,
instead of its base address.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Hesham Almatary
Section 3.6 in RISC-V v1.10 privilege specification states that PMP violations
report "access exceptions." The current PMP implementation has
a bug which wrongly reports "page exceptions" on PMP violations.
This patch fixes this bug by reporting the correct PMP access
From: Hesham Almatary
The current implementation returns 1 (PMP check success) if the address is in
range even if the PMP entry is off. This is a bug.
For example, if there is a PMP check in S-Mode which is in range, but its PMP
entry is off, this will succeed, which it should not.
The patch
fence.i has been split out of the base ISA as part of the ratification
process. This patch adds a Zifencei argument, which disables the
fence.i instruction.
Signed-off-by: Palmer Dabbelt
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c | 1 +
target/riscv/cpu.h
On 01/07/2019 14:59, Peter Maydell wrote:
> On Tue, 18 Jun 2019 at 17:54, Cédric Le Goater wrote:
>>
>> From: Andrew Jeffery
>>
>> First up: This is not the way the hardware behaves.
>>
>> However, it helps resolve real-world problems with short periods being
>> used under Linux. Commit
From: "Wladimir J. van der Laan"
The constraint for `rdinstreth` was comparing the csr number to 0xc80,
which is `cycleh` instead. Fix this.
Signed-off-by: Wladimir J. van der Laan
Signed-off-by: Michael Clark
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer
From: Alistair Francis
Add support for loading a firmware file for the virt machine and the
SiFive U. This can be run with the following command:
qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel vmlinux
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Tested-by: Bin Meng
On Fri, Jun 21, 2019 at 10:40:01AM +0100, Stefan Hajnoczi wrote:
> Sebastien Boeuf pointed out that libvhost-user
> doesn't advertise VHOST_USER_PROTOCOL_F_MQ. Today this prevents
> vhost-user-net
> multiqueue from working.
>
> In virtio-fs we also want to support multiqueue so I'm sending
From: Alistair Francis
Split the common RISC-V boot functions into a seperate file. This allows
us to share the common code.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Tested-by: Bin Meng
Signed-off-by: Palmer Dabbelt
---
hw/riscv/Makefile.objs | 1 +
hw/riscv/boot.c |
On 7/2/19 11:52 PM, BALATON Zoltan wrote:
> On Tue, 2 Jul 2019, Peter Maydell wrote:
>> Currently the bitbang_i2c_init() function allocates a
>> bitbang_i2c_interface struct which it returns. This is unfortunate
>> because it means that if the function is used from a DeviceState
>> init method
@pmaydell I just tested the latest commit in git master and still got
the same error.
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You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1818122
Title:
QEMU 3.1 makes libxslt to crash on ppc64
Status
@laurent-vivier I just tested the binary built from git master and the
error went away. Thanks.
** Changed in: qemu
Status: New => Fix Committed
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You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
Patchew URL:
https://patchew.org/QEMU/20190703013805.2722-1-chen.zh...@intel.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
On Wed, 3 Jul 2019 at 06:18, Markus Armbruster wrote:
>
> Peter Maydell writes:
> > This seems to break the incremental builds (most hosts):
> >
> > make: Entering directory '/home/petmay01/qemu-for-merges/build/w64'
> > make: *** No rule to make target 'subdir-slirp', needed by
> >
On Wed, 3 Jul 2019 at 02:42, Zhang Chen wrote:
>
> From: Zhang Chen
>
> Address Peter's comments in patch "COLO-compare:Add colo-compare
> remote notify support".
>
> Signed-off-by: Zhang Chen
> ---
> net/colo-compare.c | 13 ++---
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
>
The patch adds some preparation parts for incompatible compression type
feature to QCOW2 header that indicates that *all* compressed clusters
must be (de)compressed using a certain compression type.
It is implied that the compression type is set on the image creation and
can be changed only later
The patch allow to process image compression type defined
in the image header and choose an appropriate method for
image clusters (de)compression.
Signed-off-by: Denis Plotnikov
---
block/qcow2.c | 93 ---
1 file changed, 73 insertions(+), 20
On Tue, 2 Jul 2019 at 12:47, Markus Armbruster wrote:
>
> The following changes since commit 7d0e02405fc02a181319b1ab8681d2f72246b7c6:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/trivial-patches-pull-request' into staging (2019-07-01
> 17:40:32 +0100)
>
> are available in the Git
Patchew URL: https://patchew.org/QEMU/20190703045212.31039-1-kra...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make
The QID path should uniquely identify a file. However, the
inode of a file is currently used as the QID path, which
on its own only uniquely identifies files within a device.
Here we track the device hosting the 9pfs share, in order
to prevent security issues with QID path collisions from
other
Patchew URL: https://patchew.org/QEMU/cover.1562151410.git.bala...@eik.bme.hu/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make
The pixman library only supports blts with left to right, top to
bottom order but the ATI VGA engine can also do different directions.
Fix support for these via a temporary buffer for now. This fixes
rendering issues related to such blts (such as moving windows) but
some other glitches still
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