Re: [PULL 00/45] ppc-for-5.0 queue 20200317

2020-03-17 Thread Paolo Bonzini
On 17/03/20 11:03, David Gibson wrote: > pseries: Update SLOF firmware image > ppc/spapr: Move GPRs setup to one place > pseries: Update SLOF firmware image > spapr/rtas: Reserve space for RTAS blob and log > pseries: Update SLOF firmware image Oh, no fake-OF

Re: [PATCH] cpu: Use DeviceClass reset instead of a special CPUClass reset

2020-03-17 Thread Peter Maydell
On Tue, 17 Mar 2020 at 11:01, Philippe Mathieu-Daudé wrote: > > ping Eduardo said he'd queued it -- I've been assuming he'll send a pullreq for it. (The followup work I was planning to base on this turned out to have complications I hadn't expected, so I've put it on the shelf for the moment.

[PULL 02/11] hw/arm/fsl-imx6ul: Fix USB interrupt numbers

2020-03-17 Thread Peter Maydell
From: Guenter Roeck USB1 and USB2 interrupt numbers were swapped. USB_PHY2 interrupt number is 45. That didn't really matter up to now since the interrupts were not used, but it needs to be fixed to be able to wire up the USB controllers. Fixes: 31cbf933f0e ("i.MX6UL: Add i.MX6UL SOC")

[PULL 08/11] m25p80: Improve command handling for Jedec commands

2020-03-17 Thread Peter Maydell
From: Guenter Roeck When requesting JEDEC data using the JEDEC_READ command, the Linux kernel always requests 6 bytes. The current implementation only returns three bytes, and interprets the remaining three bytes as new commands. While this does not matter most of the time, it is at the very

[PULL 04/11] hw/arm/fsl-imx6ul: Wire up USB controllers

2020-03-17 Thread Peter Maydell
From: Guenter Roeck IMX6UL USB controllers are quite similar to IMX7 USB controllers. Wire them up the same way. The only real difference is that wiring up phy devices is necessary to avoid phy reset timeouts in the Linux kernel. Signed-off-by: Guenter Roeck Message-id:

[PATCH v4 02/34] qapi: Belatedly update doc comment for @wait deprecation

2020-03-17 Thread Markus Armbruster
Commit a9b305ba29 "socket: allow wait=false for client socket" deprecated use of @wait for client socket chardevs, but neglected to update char.json's doc comment. Make up for that. Signed-off-by: Markus Armbruster Reviewed-by: Marc-André Lureau Reviewed-by: Eric Blake --- qapi/char.json | 1

[PATCH v4 09/34] tests/test-qmp-event: Use qobject_is_equal()

2020-03-17 Thread Markus Armbruster
Locally defined helper qdict_cmp_simple() implements just enough of a comparison to serve here. Replace it by qobject_is_equal(), which implements all of it. Signed-off-by: Markus Armbruster Reviewed-by: Marc-André Lureau --- tests/test-qmp-event.c | 66

[PATCH v4 28/34] qapi: Implement deprecated-output=hide for QMP command results

2020-03-17 Thread Markus Armbruster
This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command results. Example: when QEMU is run with -compat deprecated-output=hide, then {"execute": "query-cpus-fast"} yields {"return": [{"thread-id": 9805, "props": {"core-id":

Re: [PATCH] vl.c/memdev: Error on bad memory backend

2020-03-17 Thread Dr. David Alan Gilbert
* Igor Mammedov (imamm...@redhat.com) wrote: > On Tue, 17 Mar 2020 12:07:59 + > "Dr. David Alan Gilbert (git)" wrote: > > > From: "Dr. David Alan Gilbert" > > > > If memory-backend is a non-existent object, qemu crashes. > > Check that the backend actually resolves. > > > > e.g.

Re: [PATCH v2 2/7] hw/ide: Get rid of piix4_init function

2020-03-17 Thread BALATON Zoltan
On Tue, 17 Mar 2020, John Snow wrote: On 3/17/20 6:49 AM, Philippe Mathieu-Daudé wrote: On 3/17/20 11:41 AM, Philippe Mathieu-Daudé wrote: On 3/17/20 10:39 AM, BALATON Zoltan wrote: This removes pci_piix4_ide_init() function similar to clean up done to other ide devices. Signed-off-by:

Re: [PATCH v2 6/7] hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h

2020-03-17 Thread BALATON Zoltan
On Tue, 17 Mar 2020, John Snow wrote: On 3/17/20 5:39 AM, BALATON Zoltan wrote: We can move this define now that less files use it to internal.h to further reduce dependency on hw/ide.h. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Markus Armbruster ---

Re: [PATCH 0/5] QEMU Gating CI

2020-03-17 Thread Peter Maydell
On Tue, 17 Mar 2020 at 14:13, Cleber Rosa wrote: > > On Tue, Mar 17, 2020 at 09:29:32AM +, Peter Maydell wrote: > > Ah, I see. My assumption was that this was all stuff that you were > > working on, so that I would then be able to test that it worked correctly, > > not that I would need to do

[Bug 1867786] [NEW] Qemu PPC64 freezes with multi-core CPU

2020-03-17 Thread carlosedp
Public bug reported: I installed Debian 10 on a Qemu PPC64 VM running with the following flags: qemu-system-ppc64 \ -nographic -nodefaults -monitor pty -serial stdio \ -M pseries -cpu POWER9 -smp cores=4,threads=1 -m 4G \ -drive

Re: [PULL 00/10] Bitmaps patches

2020-03-17 Thread Peter Maydell
On Tue, 17 Mar 2020 at 14:57, Daniel P. Berrangé wrote: > I don't feel like -Wno-unused-function looses anything significant, as > the GCC builds will still be reporting unused functions which will > catch majority of cases. The most interesting difference is that clang will catch unused static

Re: [PATCH v3 1/4] scripts/simplebench: add simplebench.py

2020-03-17 Thread Vladimir Sementsov-Ogievskiy
17.03.2020 17:40, Aleksandar Markovic wrote: On Mon, Mar 2, 2020 at 10:05 PM Aleksandar Markovic wrote: + + +def ascii_one(result): +"""Return ASCII representation of bench_one() returned dict.""" +if 'average' in result: +s = '{:.2f} +- {:.2f}'.format(result['average'],

Re: [PULL 00/10] Bitmaps patches

2020-03-17 Thread Peter Maydell
On Tue, 17 Mar 2020 at 15:05, Daniel P. Berrangé wrote: > > On Tue, Mar 17, 2020 at 03:00:48PM +, Peter Maydell wrote: > > On Tue, 17 Mar 2020 at 14:57, Daniel P. Berrangé > > wrote: > > > I don't feel like -Wno-unused-function looses anything significant, as > > > the GCC builds will still

[PATCH v3 7/8] hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h

2020-03-17 Thread BALATON Zoltan
We can move this define now that less files use it to internal.h to further reduce dependency on hw/ide.h. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Markus Armbruster --- hw/mips/mips_r4k.c| 1 + include/hw/ide.h | 2 --

[PATCH v3 4/8] hw/ide: Remove now unneded #include "hw/pci/pci.h" from hw/ide.h

2020-03-17 Thread BALATON Zoltan
After previous patches we don't need hw/pci/pci.h any more in hw/ide.h. Some files depended on implicit inclusion by this header which are also fixed up here. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Markus Armbruster ---

[PATCH v3 2/8] hw/isa/piix4.c: Introduce variable to store devfn

2020-03-17 Thread BALATON Zoltan
To avoid any problem with reassigning pci variable store devfn in a variable instead of acessing it from the PCIDevice. Signed-off-by: BALATON Zoltan --- hw/isa/piix4.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index

[PATCH v10 2/9] scripts: Coccinelle script to use ERRP_AUTO_PROPAGATE()

2020-03-17 Thread Vladimir Sementsov-Ogievskiy
Script adds ERRP_AUTO_PROPAGATE macro invocation where appropriate and does corresponding changes in code (look for details in include/qapi/error.h) Usage example: spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \ --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff \

[PULL 1/1] block/io: fix bdrv_co_do_copy_on_readv

2020-03-17 Thread Stefan Hajnoczi
From: Vladimir Sementsov-Ogievskiy Prior to 1143ec5ebf4 it was OK to qemu_iovec_from_buf() from aligned-up buffer to original qiov, as qemu_iovec_from_buf() will stop at qiov end anyway. But after 1143ec5ebf4 we assume that bdrv_co_do_copy_on_readv works on part of original qiov, defined by

[PATCH v6 18/61] target/riscv: vector single-width integer multiply instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 33 + target/riscv/insn32.decode | 8 ++ target/riscv/insn_trans/trans_rvv.inc.c | 10 ++ target/riscv/vector_helper.c| 156 4 files changed, 207 insertions(+) diff

[PULL v2 08/37] linux-user: fix socket() strace

2020-03-17 Thread Laurent Vivier
print_socket_type() doesn't manage flags and the correct type cannot be displayed Signed-off-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200312165530.53450-1-laur...@vivier.eu> Signed-off-by: Laurent Vivier --- linux-user/strace.c | 8 +++- 1 file changed, 7

[PATCH v6 22/61] target/riscv: vector widening integer multiply-add instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 22 target/riscv/insn32.decode | 7 target/riscv/insn_trans/trans_rvv.inc.c | 9 + target/riscv/vector_helper.c| 45 +

Re: [PATCH v10 4/3] hw/sd/ssi-sd: fix error handling in ssi_sd_realize

2020-03-17 Thread Markus Armbruster
Vladimir Sementsov-Ogievskiy writes: > It's wrong to use same err object as errp parameter for several > function calls without intermediate checking for error: we'll crash if > try to set err object twice. Fix that. > > Signed-off-by: Vladimir Sementsov-Ogievskiy > --- > > Forgive me for

Re: [PULL 00/10] Bitmaps patches

2020-03-17 Thread Eric Blake
On 3/17/20 10:11 AM, Daniel P. Berrangé wrote: On Tue, Mar 17, 2020 at 03:07:34PM +, Peter Maydell wrote: On Tue, 17 Mar 2020 at 15:05, Daniel P. Berrangé wrote: On Tue, Mar 17, 2020 at 03:00:48PM +, Peter Maydell wrote: On Tue, 17 Mar 2020 at 14:57, Daniel P. Berrangé wrote: I

[PULL v2 04/37] linux-user: Add x86_64 vsyscall page to /proc/self/maps

2020-03-17 Thread Laurent Vivier
From: Richard Henderson The page isn't (necessarily) present in the host /proc/self/maps, and even if it might be it isn't present in page_flags, and even if it was it might not have the same set of page permissions. The easiest thing to do, particularly when it comes to the "[vsyscall]" note

[PULL v2 26/37] linux-user, i386: add syscall table generation support

2020-03-17 Thread Laurent Vivier
Copy syscall_32.tbl and syscallhdr.sh from linux/arch/x86/kernel/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Signed-off-by: Laurent Vivier Reviewed-by: Taylor Simpson Message-Id: <20200310103403.3284090-15-laur...@vivier.eu> Signed-off-by: Laurent Vivier --- configure

[PATCH v6 27/61] target/riscv: vector widening saturating scaled multiply-add

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 22 +++ target/riscv/insn32.decode | 7 + target/riscv/insn_trans/trans_rvv.inc.c | 9 ++ target/riscv/vector_helper.c| 205 4 files changed, 243 insertions(+) diff

[PULL v2 30/37] linux-user, scripts: add a script to update syscall.tbl

2020-03-17 Thread Laurent Vivier
scripts/update-syscalltbl.sh has the list of syscall.tbl to update and can copy them from the linux source directory Signed-off-by: Laurent Vivier Reviewed-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <20200310103403.3284090-19-laur...@vivier.eu> Signed-off-by: Laurent Vivier

[PULL v2 29/37] linux-user, mips64: add syscall table generation support

2020-03-17 Thread Laurent Vivier
Copy syscall_n32.tbl, syscall_n64.tbl and syscallhdr.sh from linux/arch/parisc/kernel/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Move the offsets (6000 for n32 and 5000 for n64) from the file to the Makefile.objs to be passed to syscallhdr.sh Signed-off-by: Laurent Vivier

[PATCH v6 33/61] target/riscv: vector widening floating-point multiply

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 5 + target/riscv/insn32.decode | 2 ++ target/riscv/insn_trans/trans_rvv.inc.c | 4 target/riscv/vector_helper.c| 22 ++ 4 files

Re: [PATCH v4 10/11] 9pfs: T_readdir latency optimization

2020-03-17 Thread Christian Schoenebeck
On Dienstag, 17. März 2020 15:14:23 CET Greg Kurz wrote: > > > > I think the cause of disagreements we have are solely our use cases of > > > > 9pfs: your personal use case does not seem to require any performance > > > > considerations or multi-user aspects, whereas my use case requires at > > >

[PATCH v6 29/61] target/riscv: vector narrowing fixed-point clip instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 13 +++ target/riscv/insn32.decode | 6 ++ target/riscv/insn_trans/trans_rvv.inc.c | 8 ++ target/riscv/vector_helper.c| 137 4 files changed, 164 insertions(+) diff

[PULL 09/13] target/rx: Use prt_ldmi for XCHG_mr disassembly

2020-03-17 Thread Philippe Mathieu-Daudé
From: Richard Henderson Note that the ld == 3 case handled by prt_ldmi is decoded as XCHG_rr and cannot appear here. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-Id:

[PULL 06/13] target/rx: RX disassembler

2020-03-17 Thread Philippe Mathieu-Daudé
From: Yoshinori Sato Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daudé Signed-off-by: Yoshinori Sato Signed-off-by: Richard Henderson Message-Id: <20200224141923.82118-8-ys...@users.sourceforge.jp> Acked-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé ---

[PATCH v6 44/61] target/riscv: narrowing floating-point/integer type-convert instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 11 +++ target/riscv/insn32.decode | 5 +++ target/riscv/insn_trans/trans_rvv.inc.c | 42 + target/riscv/vector_helper.c| 39

[PULL 08/13] target/rx: Replace operand with prt_ldmi in disassembler

2020-03-17 Thread Philippe Mathieu-Daudé
From: Richard Henderson This has consistency with prt_ri(). It loads all data before beginning output. It uses exactly one call to prt() to emit the full instruction. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard

[PATCH v6 49/61] target/riscv: vector mask-register logical instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 9 ++ target/riscv/insn32.decode | 8 + target/riscv/insn_trans/trans_rvv.inc.c | 28 + target/riscv/vector_helper.c| 41

[PULL 13/13] Add rx-softmmu

2020-03-17 Thread Philippe Mathieu-Daudé
From: Yoshinori Sato Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Yoshinori Sato Signed-off-by: Richard Henderson [PMD: Squashed patches from Richard Henderson modifying qapi/common.json and tests/machine-none-test.c] Message-Id:

Re: [PATCH 4/5] ppc/spapr: Don't kill the guest if a recovered FWNMI machine check delivery fails

2020-03-17 Thread Greg Kurz
On Tue, 17 Mar 2020 15:02:14 +1000 Nicholas Piggin wrote: > Try to be tolerant of errors if the machine check had been recovered > by the host. > > Signed-off-by: Nicholas Piggin > --- Same comment as previous patch on multi-line error strings and warn_report() in the !recovered case. >

Re: [PULL 00/10] Bitmaps patches

2020-03-17 Thread Daniel P . Berrangé
On Tue, Mar 17, 2020 at 03:00:48PM +, Peter Maydell wrote: > On Tue, 17 Mar 2020 at 14:57, Daniel P. Berrangé wrote: > > I don't feel like -Wno-unused-function looses anything significant, as > > the GCC builds will still be reporting unused functions which will > > catch majority of cases. >

[PATCH v6 03/61] target/riscv: support vector extension csr

2020-03-17 Thread LIU Zhiwei
The v0.7.1 specification does not define vector status within mstatus. A future revision will define the privileged portion of the vector status. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/cpu_bits.h | 15 +

Re: [PULL 00/10] Bitmaps patches

2020-03-17 Thread Daniel P . Berrangé
On Tue, Mar 17, 2020 at 03:07:34PM +, Peter Maydell wrote: > On Tue, 17 Mar 2020 at 15:05, Daniel P. Berrangé wrote: > > > > On Tue, Mar 17, 2020 at 03:00:48PM +, Peter Maydell wrote: > > > On Tue, 17 Mar 2020 at 14:57, Daniel P. Berrangé > > > wrote: > > > > I don't feel like

[PATCH v3 0/8] Misc hw/ide legacy clean up

2020-03-17 Thread BALATON Zoltan
Avoid problems from reassigning variable in piix4_create and fix compilation problem with mips_r4k BALATON Zoltan (8): hw/ide: Get rid of piix3_init functions hw/isa/piix4.c: Introduce variable to store devfn hw/ide: Get rid of piix4_init function hw/ide: Remove now unneded #include

Re: [PATCH v10 4/3] hw/sd/ssi-sd: fix error handling in ssi_sd_realize

2020-03-17 Thread Markus Armbruster
Vladimir Sementsov-Ogievskiy writes: > It's wrong to use same err object as errp parameter for several > function calls without intermediate checking for error: we'll crash if > try to set err object twice. Fix that. > > Signed-off-by: Vladimir Sementsov-Ogievskiy > --- > > Forgive me for

[PATCH v10 0/9] error: auto propagated local_err part I

2020-03-17 Thread Vladimir Sementsov-Ogievskiy
v10: (based-on "[PATCH 0/3] Minor error handling cleanups" including my 4/3 in it) 02: Change some comments. Do not chain check1 and check2 rules to rule1 to cover move unusual cases to warn about. Add positions to check1 rule. Move check1 and check2 above rule1, otherwise our ___

[PATCH v10 6/9] virtio-9p: introduce ERRP_AUTO_PROPAGATE

2020-03-17 Thread Vladimir Sementsov-Ogievskiy
If we want to add some info to errp (by error_prepend() or error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro. Otherwise, this info will not be added when errp == _fatal (the program will exit prior to the error_append_hint() or error_prepend() call). Fix such cases. If we want to

[PULL v3 36/62] lockable: add lock guards

2020-03-17 Thread Paolo Bonzini
From: Stefan Hajnoczi This patch introduces two lock guard macros that automatically unlock a lock object (QemuMutex and others): void f(void) { QEMU_LOCK_GUARD(); if (!may_fail()) { return; /* automatically unlocks mutex */ } ... } and:

[PATCH v6 07/61] target/riscv: add vector index load and store instructions

2020-03-17 Thread LIU Zhiwei
Vector indexed operations add the contents of each element of the vector offset operand specified by vs2 to the base effective address to give the effective address of each element. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson ---

[PATCH v6 17/61] target/riscv: vector integer min/max instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 33 target/riscv/insn32.decode | 8 +++ target/riscv/insn_trans/trans_rvv.inc.c | 10 target/riscv/vector_helper.c| 71 + 4

[PATCH v6 14/61] target/riscv: vector single-width bit shift instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 25 target/riscv/insn32.decode | 9 +++ target/riscv/insn_trans/trans_rvv.inc.c | 54 target/riscv/vector_helper.c| 85

[PULL v2 20/37] linux-user, arm: add syscall table generation support

2020-03-17 Thread Laurent Vivier
Copy syscall.tbl and syscallhdr.sh from linux/arch/arm/tools/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Update syscall.c to manage TARGET_NR_arm_sync_file_range as it has replaced TARGET_NR_sync_file_range2 Move existing stuff from linux-user/Makefile.objs to

[PULL v2 18/37] linux-user, sh4: add syscall table generation support

2020-03-17 Thread Laurent Vivier
Copy syscall.tbl and syscallhdr.sh from linux/arch/sh/kernel/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Signed-off-by: Laurent Vivier Reviewed-by: Taylor Simpson Message-Id: <20200310103403.3284090-7-laur...@vivier.eu> Signed-off-by: Laurent Vivier --- configure

[PATCH v6 24/61] target/riscv: vector single-width saturating add and subtract

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 33 ++ target/riscv/insn32.decode | 10 + target/riscv/insn_trans/trans_rvv.inc.c | 16 + target/riscv/vector_helper.c| 389 4 files changed, 448 insertions(+) diff --git

[PULL v2 34/37] scripts: add a script to generate syscall_nr.h

2020-03-17 Thread Laurent Vivier
This script is needed for targets based on asm-generic syscall numbers generation Signed-off-by: Laurent Vivier Reviewed-by: Alistair Francis Reviewed-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <20200316085620.309769-2-laur...@vivier.eu> [lv: added file in MAINTAINERS] ---

[PULL v2 27/37] linux-user, x86_64: add syscall table generation support

2020-03-17 Thread Laurent Vivier
Copy syscall_64.tbl and syscallhdr.sh from linux/arch/x86/kernel/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Signed-off-by: Laurent Vivier Reviewed-by: Taylor Simpson Message-Id: <20200310103403.3284090-16-laur...@vivier.eu> Signed-off-by: Laurent Vivier --- configure

[PATCH v6 23/61] target/riscv: vector integer merge and move instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 17 target/riscv/insn32.decode | 7 ++ target/riscv/insn_trans/trans_rvv.inc.c | 121 target/riscv/vector_helper.c| 100 4 files changed, 245

[PATCH v6 31/61] target/riscv: vector widening floating-point add/subtract instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 17 +++ target/riscv/insn32.decode | 8 ++ target/riscv/insn_trans/trans_rvv.inc.c | 131 target/riscv/vector_helper.c| 77 ++

Re: [PATCH] ppc/spapr: Set the effective address provided flag in mc error log.

2020-03-17 Thread Greg Kurz
On Tue, 17 Mar 2020 08:51:50 -0700 (PDT) no-re...@patchew.org wrote: > Patchew URL: > https://patchew.org/QEMU/158444819283.31599.12155058652686614304.stgit@jupiter/ > > > > Hi, > > This series seems to have some coding style problems. See output below for > more information: > > Subject:

[PATCH v6 32/61] target/riscv: vector single-width floating-point multiply/divide instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 16 + target/riscv/insn32.decode | 5 +++ target/riscv/insn_trans/trans_rvv.inc.c | 7 target/riscv/vector_helper.c| 48 + 4

[PULL 1/4] Use _abort instead of separate assert()

2020-03-17 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Message-Id: <20200313170517.22480-2-arm...@redhat.com> Reviewed-by: Peter Maydell Acked-by: Alexander Bulekov Reviewed-by: Eric Blake Reviewed-by: Vladimir Sementsov-Ogievskiy [Unused Error *variable deleted] --- block/monitor/block-hmp-cmds.c | 4 +---

[PULL 12/13] target/rx: Dump bytes for each insn during disassembly

2020-03-17 Thread Philippe Mathieu-Daudé
From: Richard Henderson There are so many different forms of each RX instruction that it will be very useful to be able to look at the bytes to see on which path a bug may lie. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Tested-by: Philippe Mathieu-Daudé Signed-off-by:

Re: [PULL 0/4] Usb 20200317 patches

2020-03-17 Thread Peter Maydell
are available in the Git repository at: > > git://git.kraxel.org/qemu tags/usb-20200317-pull-request > > for you to fetch changes up to 647ee9877272d4359659e2595262db0e062c8ffc: > > usb-serial: Fix timeout clo

[PATCH v3 3/8] hw/ide: Get rid of piix4_init function

2020-03-17 Thread BALATON Zoltan
This removes pci_piix4_ide_init() function similar to clean up done to other ide devices. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Markus Armbruster --- hw/ide/piix.c| 12 +--- hw/isa/piix4.c | 4 +++- include/hw/ide.h | 1 - 3 files changed, 4

[PATCH v3 1/8] hw/ide: Get rid of piix3_init functions

2020-03-17 Thread BALATON Zoltan
This removes pci_piix3_ide_init() and pci_piix3_xen_ide_init() functions similar to clean up done to other ide devices. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Markus Armbruster --- hw/i386/pc_piix.c | 10 +-

[PATCH v6 04/61] target/riscv: add vector configure instruction

2020-03-17 Thread LIU Zhiwei
vsetvl and vsetvli are two configure instructions for vl, vtype. TB flags should update after configure instructions. The (ill, lmul, sew ) of vtype and the bit of (VSTART == 0 && VL == VLMAX) will be placed within tb_flags. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by:

[PATCH v6 06/61] target/riscv: add vector stride load and store instructions

2020-03-17 Thread LIU Zhiwei
Vector strided operations access the first memory element at the base address, and then access subsequent elements at address increments given by the byte offset contained in the x register specified by rs2. Vector unit-stride operations access elements stored contiguously in memory starting from

[PULL v3 35/62] lockable: add QEMU_MAKE_LOCKABLE_NONNULL

2020-03-17 Thread Paolo Bonzini
This will be needed for lock guards, because if the lock is NULL the dummy for loop of the lock guard never runs. This can cause confusion and dummy warnings in the compiler, but even if it did not, aborting with a NULL pointer dereference is a less surprising behavior. Signed-off-by: Paolo

[PATCH v6 10/61] target/riscv: vector single-width integer add and subtract

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 21 ++ target/riscv/insn32.decode | 10 + target/riscv/insn_trans/trans_rvv.inc.c | 251 target/riscv/vector_helper.c| 149 ++ 4 files changed, 431

[PATCH v6 05/61] target/riscv: add an internals.h header

2020-03-17 Thread LIU Zhiwei
The internals.h keeps things that are not relevant to the actual architecture, only to the implementation, separate. Signed-off-by: LIU Zhiwei --- target/riscv/internals.h | 24 1 file changed, 24 insertions(+) create mode 100644 target/riscv/internals.h diff --git

[PATCH v6 11/61] target/riscv: vector widening integer add and subtract

2020-03-17 Thread LIU Zhiwei
Reviewed-by: Richard Henderson Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 49 +++ target/riscv/insn32.decode | 16 +++ target/riscv/insn_trans/trans_rvv.inc.c | 178 target/riscv/vector_helper.c| 111

[PULL v3 37/62] lockable: add QemuRecMutex support

2020-03-17 Thread Paolo Bonzini
From: Stefan Hajnoczi The polymorphic locking macros don't support QemuRecMutex yet. Add it so that lock guards can be used with QemuRecMutex. Convert TCG plugins functions that benefit from these macros. Manual qemu_rec_mutex_lock/unlock() callers are left unmodified in cases where clarity

[PATCH v6 12/61] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 33 ++ target/riscv/insn32.decode | 11 ++ target/riscv/insn_trans/trans_rvv.inc.c | 78 + target/riscv/vector_helper.c| 148 4 files changed, 270

Re: [PATCH] softmmu: fix crash with invalid -M memory-backend=

2020-03-17 Thread Paolo Bonzini
On 17/03/20 16:13, Igor Mammedov wrote: > On Mon, 9 Mar 2020 15:51:55 +0100 > Marc-André Lureau wrote: > >> Fixes: fe64d06afc1c5d895f220c268cfe4d5f1e65d44e ("vl.c: ensure that >> ram_size matches size of machine.memory-backend") >> Signed-off-by: Marc-André Lureau > > Paolo, > > Can you pick

[PULL v2 09/37] linux-user: Update TASK_UNMAPPED_BASE for aarch64

2020-03-17 Thread Laurent Vivier
From: Lirong Yuan This change updates TASK_UNMAPPED_BASE (the base address for guest programs) for aarch64. It is needed to allow qemu to work with Thread Sanitizer (TSan), which has specific boundary definitions for memory mappings on different platforms:

[PULL v2 10/37] linux-user: Protect more syscalls

2020-03-17 Thread Laurent Vivier
From: Alistair Francis New y2038 safe 32-bit architectures (like RISC-V) don't support old syscalls with a 32-bit time_t. The kernel defines new *_time64 versions of these syscalls. Add some more #ifdefs to syscall.c in linux-user to allow us to compile without these old syscalls.

[PULL v2 01/37] target/i386: Renumber EXCP_SYSCALL

2020-03-17 Thread Laurent Vivier
From: Richard Henderson We are not short of numbers for EXCP_*. There is no need to confuse things by having EXCP_VMEXIT and EXCP_SYSCALL overlap, even though the former is only used for system mode and the latter is only used for user mode. Reviewed-by: Paolo Bonzini Reviewed-by: Alex Bennée

[PULL v2 19/37] linux-user, microblaze: add syscall table generation support

2020-03-17 Thread Laurent Vivier
Copy syscall.tbl and syscallhdr.sh from linux/arch/microblaze/kernel/syscalls v5.5 Update syscallhdr.sh to generate QEMU syscall_nr.h Signed-off-by: Laurent Vivier Reviewed-by: Taylor Simpson Message-Id: <20200310103403.3284090-8-laur...@vivier.eu> Signed-off-by: Laurent Vivier --- configure

[PULL v2 25/37] linux-user, x86_64, i386: cleanup TARGET_NR_arch_prctl

2020-03-17 Thread Laurent Vivier
Define do_arch_prctl() for i386 and x86_64, but return -TARGET_ENOSYS for i386. Signed-off-by: Laurent Vivier Reviewed-by: Taylor Simpson Message-Id: <20200310103403.3284090-14-laur...@vivier.eu> Signed-off-by: Laurent Vivier --- linux-user/i386/target_cpu.h | 4 ++-- linux-user/syscall.c

[PULL v2 11/37] linux-user/syscall: Add support for clock_gettime64/clock_settime64

2020-03-17 Thread Laurent Vivier
From: Alistair Francis Add support for the clock_gettime64/clock_settime64 syscalls. If your host is 64-bit or is 32-bit with the *_time64 syscall then the timespec will correctly be a 64-bit time_t. Otherwise the host will return a 32-bit time_t which will be rounded to 64-bits. This will be

[PULL v2 36/37] linux-user, nios2: sync syscall numbers with kernel v5.5

2020-03-17 Thread Laurent Vivier
Use helper script scripts/gensyscalls.sh to generate the file. This adds TARGET_NR_llseek that was missing and remove syscalls 1024 to 1079. Add new syscalls from 288 (pkey_mprotect) to 434 (pidfd_open) Signed-off-by: Laurent Vivier Reviewed-by: Alistair Francis Message-Id:

[PULL v2 37/37] linux-user, openrisc: sync syscall numbers with kernel v5.5

2020-03-17 Thread Laurent Vivier
Use helper script scripts/gensyscalls.sh to generate the file. Add TARGET_NR_or1k_atomic Remove useless comments and blank lines. Define diretly the __NR_XXX64 syscalls rather than using the intermediate __NR3264 definition. Remove wrong cut'n'paste (like "#ifdef __ARCH_WANT_SYNC_FILE_RANGE2")

[PULL v2 13/37] linux-user: introduce parameters to generate syscall_nr.h

2020-03-17 Thread Laurent Vivier
This will be used when we'll import syscall.tbl from the kernel Add a script to remove all the dependencies to syscall_nr.h that point to source directory and not to the build directory. The list of arch will be update while the generated files are added. Signed-off-by: Laurent Vivier

Re: [PULL 00/11] target-arm queue

2020-03-17 Thread Peter Maydell
o staging (2020-03-16 > 14:55:59 +) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20200317 > > for you to fetch changes up to e88d3671e3bbd59d385838a4101ea19cdcf47309: > > hw/arm/pxa2x

[PULL 0/4] Error reporting patches for 2020-03-17

2020-03-17 Thread Markus Armbruster
The following changes since commit 40c67636f67c2a89745f2e698522fe917326a952: Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200317-pull-request' into staging (2020-03-17 14:00:56 +) are available in the Git repository at: git://repo.or.cz/qemu/armbru.git tags/pull-error-2020

[PATCH v6 37/61] target/riscv: vector floating-point min/max instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 13 target/riscv/insn32.decode | 4 target/riscv/insn_trans/trans_rvv.inc.c | 6 ++ target/riscv/vector_helper.c| 27 +

[PULL 00/13] target: Add the Renesas RX architecture

2020-03-17 Thread Philippe Mathieu-Daudé
-request' into staging (2020-03-16 14:55:59 +) are available in the Git repository at: https://gitlab.com/philmd/qemu.git tags/target_renesas_rx-20200317 for you to fetch changes up to d9ecf331340137dc091bdcf3d3ef60087deac9ac: Add rx-softmmu (2020-03-17 16:01:58 +0100

[PULL 4/4] hw/sd/ssi-sd: fix error handling in ssi_sd_realize

2020-03-17 Thread Markus Armbruster
From: Vladimir Sementsov-Ogievskiy It's wrong to use same err object as errp parameter for several function calls without intermediate checking for error: we'll crash if try to set err object twice. Fix that. Signed-off-by: Vladimir Sementsov-Ogievskiy Message-Id:

Re: [PATCH 0/3] Minor error handling cleanups

2020-03-17 Thread Markus Armbruster
Queued, including Vladimir's PATCH 4/3. Thanks!

Re: [PATCH for-5.0] vl.c: fix migration failure for 3.1 and older machine types

2020-03-17 Thread Igor Mammedov
On Wed, 4 Mar 2020 12:27:48 -0500 Igor Mammedov wrote: > Migration from QEMU(v4.0) fails when using 3.1 or older machine > type. For example if one attempts to migrate > QEMU-2.12 started as > qemu-system-ppc64 -nodefaults -M pseries-2.12 -m 4096 -mem-path /tmp/ > to current master, it will

[PULL 05/13] target/rx: CPU definitions

2020-03-17 Thread Philippe Mathieu-Daudé
From: Yoshinori Sato Reviewed-by: Richard Henderson Signed-off-by: Yoshinori Sato Signed-off-by: Richard Henderson [PMD: Use newer QOM style, split cpu-qom.h, restrict access to extable array, use rx_cpu_tlb_fill() extracted from patch of Yoshinori Sato 'Convert to CPUClass::tlb_fill', call

[PATCH v6 50/61] target/riscv: vector mask population count vmpopc

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 2 ++ target/riscv/insn32.decode | 1 + target/riscv/insn_trans/trans_rvv.inc.c | 32 + target/riscv/vector_helper.c| 20 4

[PATCH v6 45/61] target/riscv: vector single-width integer reduction instructions

2020-03-17 Thread LIU Zhiwei
Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 33 +++ target/riscv/insn32.decode | 8 +++ target/riscv/insn_trans/trans_rvv.inc.c | 17 ++ target/riscv/vector_helper.c| 77 + 4

Re: [PATCH v9 13/15] s390x: protvirt: Handle SIGP store status correctly

2020-03-17 Thread Cornelia Huck
On Thu, 12 Mar 2020 17:13:10 +0100 Janosch Frank wrote: > On 3/12/20 4:51 PM, Christian Borntraeger wrote: > > On 11.03.20 14:21, Janosch Frank wrote: > >> For protected VMs status storing is not done by QEMU anymore. > >> > >> Signed-off-by: Janosch Frank > >> Reviewed-by: Thomas Huth > >>

Re: [PATCH V2] vhost: correctly turn on VIRTIO_F_IOMMU_PLATFORM

2020-03-17 Thread Michael S. Tsirkin
On Tue, Mar 17, 2020 at 10:39:04AM -0400, Peter Xu wrote: > On Tue, Mar 17, 2020 at 02:28:42AM -0400, Michael S. Tsirkin wrote: > > On Mon, Mar 16, 2020 at 02:14:05PM -0400, Peter Xu wrote: > > > On Mon, Mar 16, 2020 at 01:19:54PM -0400, Michael S. Tsirkin wrote: > > > > On Fri, Mar 13, 2020 at

Re: [PATCH v5 56/60] target/riscv: floating-point scalar move instructions

2020-03-17 Thread Richard Henderson
On 3/16/20 11:01 PM, LIU Zhiwei wrote: > Two questions here. I don't find the answer in the specification. > > 1. Should  I check RVF if the instruction uses float register,  such as all > float point instructions and some other instructions? I would think so, but even the 0.8 spec isn't clear.

[PATCH v10 4/9] pflash: introduce ERRP_AUTO_PROPAGATE

2020-03-17 Thread Vladimir Sementsov-Ogievskiy
If we want to add some info to errp (by error_prepend() or error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro. Otherwise, this info will not be added when errp == _fatal (the program will exit prior to the error_append_hint() or error_prepend() call). Fix such cases. If we want to

[PATCH v3 6/8] hw/ide: Do ide_drive_get() within pci_ide_create_devs()

2020-03-17 Thread BALATON Zoltan
The pci_ide_create_devs() function takes a hd_table parameter but all callers just pass what ide_drive_get() returns so we can do it locally simplifying callers and removing hd_table parameter. Signed-off-by: BALATON Zoltan Reviewed-by: Mark Cave-Ayland Reviewed-by: Markus Armbruster ---

[PULL 0/1] Block patches

2020-03-17 Thread Stefan Hajnoczi
The following changes since commit 61c265f0660ee476985808c8aa7915617c44fd53: Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20200313a' into staging (2020-03-13 10:33:04 +) are available in the Git repository at: https://github.com/stefanha/qemu.git

  1   2   3   4   5   6   7   >