Updates the firmware config with the next boot cpus information and also
registers the reset callback to be called when guest reboots to reset the cpu.
Co-developed-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/boot.c | 2 +-
hw/arm/virt.c | 18 ++
Patchew URL:
https://patchew.org/QEMU/20200613213629.21984-1-salil.me...@huawei.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200613213629.21984-1-salil.me...@huawei.com
Subject: [PATCH RFC 00/22] Support of Virtual CPU
Patchew URL:
https://patchew.org/QEMU/20200613213629.21984-1-salil.me...@huawei.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
Use travis_retry() when cloning SLOF (see 31c8cc4f94e) in the
s390x container job, to avoid build failures:
$ ( cd ${SRC_DIR} ; git submodule update --init roms/SLOF )
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path
'roms/SLOF'
Cloning into
You have been subscribed to a public bug:
QEMU emulator version 4.1.50 (commit 50d69ee0d)
floppy image from:
https://winworldpc.com/download/417d71c2-ae18-c39a-11c3-a4e284a2c3a5
$ qemu-system-i386 -M isapc -fda Windows\ 98\ Second\ Edition\ Boot.img
SeaBIOS (version rel-1.12.1-0...)
Booting
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 79
target/mips/translate.c | 19 --
3 files changed, 92 insertions(+), 12 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 79
target/mips/translate.c | 19 --
3 files changed, 93 insertions(+), 11 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 4 ++-
target/mips/msa_helper.c | 67
target/mips/translate.c | 12 ++-
3 files changed, 68 insertions(+), 15 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 4 ++-
target/mips/msa_helper.c | 65
target/mips/translate.c | 12 +++-
3 files changed, 67 insertions(+), 14 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 4 ++-
target/mips/msa_helper.c | 67
target/mips/translate.c | 12 ++-
3 files changed, 68 insertions(+), 15 deletions(-)
This series contains some patches that split heprers in msa_helper.c.
It will make easier for debugging tools to display involved source
code, and also introduces some modest performance improvements gains
for all involved MSA instructions.
v7->v8:
- added six new demacroing patches
v6->v7:
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 82
target/mips/translate.c | 15 +++-
3 files changed, 93 insertions(+), 10 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 102 ---
target/mips/translate.c | 15 +-
3 files changed, 103 insertions(+), 20 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 5 ++-
target/mips/msa_helper.c | 66
target/mips/translate.c | 12 +++-
3 files changed, 69 insertions(+), 14 deletions(-)
The ticket should be closed as soon as SeaBIOS gets updated in QEMU. A patch
has been posted to SeaBIOS mailing list:
https://mail.coreboot.org/hyperkitty/list/seab...@seabios.org/thread/XPKQNLVWZX55TSLSXZVY5S5DMFYS4CNO/
** Changed in: seabios
Assignee: (unassigned) => Roman Bolshakov
The G3 beige machine has a 4MB firmware ROM. Fix the size of the rom
region and allow loading a binary image with -bios. This makes it
possible to test emulation with a ROM image from real hardware.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_oldworld.c | 24 +++-
1 file
Signed-off-by: BALATON Zoltan
---
hw/pci-host/grackle.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 4b3af0c704..48d11f13ab 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -130,7 +130,7 @@ static void
The LBR feature would be enabled on the guest if:
- the KVM is enabled and the PMU is enabled and,
- the msr-based-feature IA32_PERF_CAPABILITIES is supporterd and,
- the supported returned value for lbr_fmt from this msr is not zero.
The LBR feature would be disabled on the guest if:
- the
The Perfmon and Debug Capability MSR named IA32_PERF_CAPABILITIES is
a feature-enumerating MSR, which only enumerates the feature full-width
write (via bit 13) by now which indicates the processor supports IA32_A_PMCx
interface for updating bits 32 and above of IA32_PMCx.
The existence of MSR
I think we should fix this anyway, even if it can only be triggered when
trace functions are enabled
** Description changed:
- close!
+
+ In function megasas_handle_scsi(hw/scsi/megasas.c):
+
+ ```c
+ static int megasas_handle_scsi(MegasasState *s, MegasasCmd *cmd,
+
There's a fallback to PIT if TSC is not present but it doesn't work
properly. It prevents boot from floppy on isapc and 486 cpu [1][2].
SeaBIOS configures PIT in Mode 2. PIT counter is decremented in the mode
but timer_adjust_bits() thinks that the counter overflows and increases
32-bit tick
This function resets a CPU not the whole machine so reflect that in
its name.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_oldworld.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 4dd872c1a3..9138752ccb 100644
---
Add a reset function that maps macio to the address expected by the
firmware of the board at startup.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac.h | 12
hw/ppc/mac_oldworld.c | 17 +++--
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git
The G3 beige machine has a machine ID register that is accessed by the
firmware to deternine the board config. Add basic emulation of it.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_oldworld.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/hw/ppc/mac_oldworld.c
Version 2 with some more tweaks this now starts but drops in a Serial
Test Manager (see below) presumably because some POST step is failing,
I let others who know more about this machine figure out what's
missing from here.
Regards,
BALATON Zoltan
1 :pci_update_mappings_add
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 4 +-
target/mips/msa_helper.c | 90
target/mips/translate.c | 12 +-
3 files changed, 78 insertions(+), 28 deletions(-)
diff
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 102 ---
target/mips/translate.c | 15 +-
3 files changed, 103 insertions(+), 20 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 4 ++-
target/mips/msa_helper.c | 67
target/mips/translate.c | 12 ++-
3 files changed, 68 insertions(+), 15 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 81 +++-
target/mips/translate.c | 15 +++-
3 files changed, 91 insertions(+), 11 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 90 ++--
target/mips/translate.c | 15 ++-
3 files changed, 97 insertions(+), 14 deletions(-)
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 79
target/mips/translate.c | 15 +++-
3 files changed, 91 insertions(+), 9 deletions(-)
On Sat, Jun 13, 2020 at 3:08 AM Alex Bennée wrote:
>
> We do this on our other platforms to make it easier to see what has
> broken.
>
> Signed-off-by: Alex Bennée
Reviewed-by: Li-Wen Hsu
> ---
> .cirrus.yml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git
On Thu, Jun 11, 2020 at 03:40:33PM +0200, Greg Kurz wrote:
> Nested KVM-HV only works on POWER9.
>
> Signed-off-by: Greg Kurz
> Reviewed-by: Laurent Vivier
Hrm. I have mixed feelings about this. It does bring forward an
error that we'd otherwise only discover when we try to load the kvm
On Thu, Jun 11, 2020 at 03:40:18PM +0200, Greg Kurz wrote:
> From: Vladimir Sementsov-Ogievskiy
>
> Introduce a new ERRP_AUTO_PROPAGATE macro, to be used at start of
> functions with an errp OUT parameter.
>
> It has three goals:
>
> 1. Fix issue with error_fatal and
Josh Kunz writes:
> This patch series implements extended support for the `clone` system
> call. As best I can tell, any option combination including `CLONE_VM`
> should be supported with the addition of this patch series. The
> implementation is described in greater detail in the patches
On Tue, Oct 8, 2019 at 2:41 PM Peter Maydell wrote:
>
> On Tue, 8 Oct 2019 at 13:37, Thomas Huth wrote:
> >
> > On 08/10/2019 14.18, Aleksandar Markovic wrote:
> > > If I remember well, QAPI-related c files are generated while doing
> > > 'make'. If that is true, these files should be deleted by
Punching holes on block device uses blkdev_issue_zeroout() with
BLKDEV_ZERO_NOFALLBACK but there is no guarantee that this is fast
enough for pre-zeroing an entire device.
Zeroing block device can be slow as writing zeroes or 100 times faster,
depending on the storage. There is no way to tell if
On Sat, 13 Jun 2020, Philippe Mathieu-Daudé wrote:
On 6/13/20 3:36 PM, BALATON Zoltan wrote:
Add a reset function that maps macio to the address expected by the
firmware of the board at startup.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac.h | 12
hw/ppc/mac_oldworld.c
On Fri, 12 Jun 2020 at 17:11, Paolo Bonzini wrote:
>
> The following changes since commit 31d321c2b3574dcc74e9f6411af06bca6b5d10f4:
>
> Merge remote-tracking branch
> 'remotes/philmd-gitlab/tags/sparc-next-20200609' into staging (2020-06-09
> 17:29:47 +0100)
>
> are available in the Git
The G3 beige machine has a machine ID register that is accessed by the
firmware to deternine the board config. Add basic emulation of it.
Signed-off-by: BALATON Zoltan
---
v3: add empty write function in case anything tries to write reg
hw/ppc/mac_oldworld.c | 21 +
1 file
On Sat, 13 Jun 2020, BALATON Zoltan wrote:
Version 2 with some more tweaks this now starts but drops in a Serial
Test Manager (see below) presumably because some POST step is failing,
I let others who know more about this machine figure out what's
missing from here.
Regards,
BALATON Zoltan
On 6/13/20 3:36 PM, BALATON Zoltan wrote:
> This function resets a CPU not the whole machine so reflect that in
> its name.
>
> Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/ppc/mac_oldworld.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>
On 6/13/20 3:36 PM, BALATON Zoltan wrote:
> Add a reset function that maps macio to the address expected by the
> firmware of the board at startup.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/ppc/mac.h | 12
> hw/ppc/mac_oldworld.c | 17 +++--
> 2 files
On Sat, 13 Jun 2020, BALATON Zoltan wrote:
On Sat, 13 Jun 2020, BALATON Zoltan wrote:
Version 2 with some more tweaks this now starts but drops in a Serial
Test Manager (see below) presumably because some POST step is failing,
I let others who know more about this machine figure out what's
In ARMv8 architecture, GIC needs all the vcpus to be created and present when
it is initialized. This is because:
1. GICC and MPIDR association must be fixed at the VM initialization time.
This is represented by register GIC_TYPER(mp_afffinity, proc_num)
2. GICC(cpu interfaces),
GIC needs to be pre-sized with possible vcpus at the initialization time. This
is necessary because Memory regions and resources associated with GICC/GICR
etc cannot be changed (add/del/modified) after VM has inited. Also, GIC_TYPER
needs to be initialized with mp_affinity and cpu interface number
OSPM evaluates _EVT method to map the event. The cpu hotplug event eventually
results in start of the cpu scan. Scan figures out the cpu and the kind of
event(plug/unplug) and notifies it back to the guest.
The change in this patch updates the GED AML _EVT method with the call to
\\_SB.CPUS.CSCN
For now, vcpu hotplug is only supported with single socket single thread,
single die. NUMA is not supported either and everthing falls into single
node. Work to properly support these could be taken later once community
agrees with the base framework changes being presented to support ARM vcpu
Adds various utility functions which might be required to fetch or check the
state of the possible vcpus. This also introduces concept of *disabled* vcpus,
which are part of the *possible* vcpus but are not part of the *present* vcpu.
This state shall be used during machine init time to check the
VCPU register info needs to be re-initialized each time vcpu is hot-plugged.
This has to be done both for emulation/TCG and KVM case. This is done in
context to the GIC update notification for any vcpu hot-(un)plug events. This
change adds that support and re-factors existing to maximize the code
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
PCI and is IO port based and hence existing cpus AML code assumes _CRS objects
would evaluate to a system resource which describes IO Port address. But on ARM
arch CPUs control device(\\_SB.PRES) register interface is
ACPI is required to interface QEMU with the guest. Roughly falls into below
cases,
1. Convey the possible vcpus config at the machine init time to the guest
using various DSDT tables like MADT etc.
2. Convey vcpu hotplug events to guest(using GED)
3. Assist in evaluation of various ACPI
PMU for all possible vcpus must be initialized at the virt machine
initialization time. This patch refactors existing code to accomodate possible
vcpus. This also assumes that all processor being used are identical at least
for now but does not affect the normal scanarios where they might not be
Adds the new cpu hot-unplug hooks and updates the existing hotplug hooks with
sanity checks.
Note, Functional contents of the hooks(now left with TODO comment) shall be
gradually filled in the subsequent patches in an incremental approach to patch
and logic building which would be roughly as
During machvirt_init(), ARMCPU objects are pre-created along with the
corresponding KVM vcpus in the host. Disabled possible KVM vcpus are then
parked at the per-virt-machine list "kvm_parked_vcpus".
Prime purpose to pre-create ARMCPU objects for the disabled vcpus is to
facilitate the GIC
Refactors the existing gic create code to extract common code to wire the
vcpu<->gic interrupts. This function could be used with cold-plug case and also
used when vcpu is hot-plugged. It also introduces a new function to unwire the
vcpu>->gic interrupts for the vcpu hot-unplug cases.
On Tue, May 26, 2020 at 9:14 PM Alexander Duyck
wrote:
>
> From: Alexander Duyck
>
> In an upcoming patch a feature named Free Page Reporting is about to be
> added. In order to avoid any confusion we should drop the use of the word
> 'report' when referring to Free Page Hinting. So what this
From: Qiushi Wu
kobject_init_and_add() takes reference even when it fails.
If this function returns an error, kobject_put() must be called to
properly clean up the memory associated with the object.
Callback function fw_cfg_sysfs_release_entry() in kobject_put()
can handle the pointer "entry"
This patch-set introduces the virtual cpu hotplug support for ARMv8
architecture in QEMU. Idea is to be able to hotplug and hot-unplug the vcpus
while guest VM is running and no reboot is required. This does *not* makes any
assumption of the physical cpu hotplug availability within the host system
ACPI GED(as described in the ACPI 6.2 spec) can be used to generate ACPI events
when OSPM/guest receives an interrupt listed in the _CRS object of GED. OSPM
then maps or demultiplexes the event by evaluating _EVT method.
This change adds the support of cpu hotplug event initialization in the
This shall be used to store user specified core index and shall be directly
used as slot-index during hot{plug|unplug} of vcpu.
For now, we are not taking into account of other topology info like thread-id,
socket-id to derive mp-affinity. Host KVM uses vcpu-id to derive the mpidr for
the vcpu of
Changes required during building of MADT Table by QEMU to accomodate disabled
possible vcpus. This info shall be used by the guest kernel to size up its
resources during boot time. This pre-sizing of the guest kernel done on
possible vcpus will facilitate hotplug of the disabled vcpus.
This refactors (+) introduces the common logic required during the
initialization of both cold and hot plugged vcpus. This also initializes the
*disabled* state of the vcpus which shall be used further during init phases
of various other components like GIC, PMU, ACPI etc as part of the virt
Adds a function which builds the ACPI _MAT entry for processor objects. This
shall be called from the cpus AML for all possible vcpus.
The entry is passed to the guest kernel with ACPI_MADT_GICC_ENABLED flag when
it evaluates _MAT object. OSPM evaluates _MAT object in context to the cpu
hotplug
During any vcpu hot-(un)plug, running guest VM needs to be intimated about the
new vcpu being added or request the deletion of the vcpu which is already part
of the guest VM. This is done using the ACPI GED event which eventually gets
demultiplexed to a CPU hotplug event and further to specific
ACPI GED shall be used to convey to the guest kernel about any cpu hot-(un)plug
events. Therefore, existing ACPI GED framework inside QEMU needs to be enhanced
to support CPU hotplug state and events.
Co-developed-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/acpi/generic_event_device.c |
During vcpu hot-unplug ARM cpu unrealization shall happen which should do away
with all the vcpu thread creations, allocations, registrations which happened
as part of the realization process of the ARM cpu. This change introduces the
ARM cpu unrealize function taking care of exactly that.
Note,
Adds the notification support about vcpu hot-(un)plug required to update the
GIC so that it can update its vcpu to GIC cpu interface association.
NOTE: This is using 'struct VirtMachineState' inside the notifier function.
Question: Not sure if it is right to use machine related data
Signed-off-by: Geoffrey McRae
---
audio/jackaudio.c | 4
1 file changed, 4 deletions(-)
diff --git a/audio/jackaudio.c b/audio/jackaudio.c
index d0b6f748f2..fb8efd7af7 100644
--- a/audio/jackaudio.c
+++ b/audio/jackaudio.c
@@ -38,7 +38,6 @@ struct QJack;
typedef enum QJackState {
This patch set addresses several issues that cause inconsistent
behaviour in the guest when the sound device is stopped and started or
the JACK server stops responding on the host.
Geoffrey McRae (6):
audio/jack: fix invalid minimum buffer size check
audio/jack: remove unused stopped state
Public bug reported:
Hi,
Fedora 32, x64
qemu-5.0.0-2.fc32.x86_64
https://www.microsoft.com/en-us/software-download/windows10ISO
Win10_2004_English_x64.iso
Windows 10 is excruciatingly slow since upgrading to 5.0.0-2.fc32.
Disabling your repo and downgrading to 2:4.2.0-7.fc32 and corrects the
Patchew URL:
https://patchew.org/QEMU/20200613040518.38172-1-ge...@hostfission.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200613040518.38172-1-ge...@hostfission.com
Subject: [PATCH 0/6] audio/jack: fixes to overall jack
** Description changed:
Hi,
Fedora 32, x64
qemu-5.0.0-2.fc32.x86_64
https://www.microsoft.com/en-us/software-download/windows10ISO
Win10_2004_English_x64.iso
Windows 10 is excruciatingly slow since upgrading to 5.0.0-2.fc32.
Disabling your repo and downgrading to
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's nolonger true.
So we refined this piece of code to handle any target page size.
Also added Big Page support defined by MIPS64 Release2.
Patchew URL:
https://patchew.org/QEMU/20200614034729.3004-1-jiaxun.y...@flygoat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
When the guest closes the audio device we must start dropping input
samples from JACK and zeroing the output buffer samples. Failure to do
so causes sound artifacts during operations such as guest OS reboot, and
causes a hang of the input pipeline breaking it until QEMU is restated.
Closing and
JACK does not provide us with the configured buffer size until after
activiation which was overriding this minimum value. JACK itself doesn't
have this minimum limitation, but the QEMU virtual hardware and as such
it must be enforced, failure to do so results in audio discontinuities.
Instead of checking for the audodev state in each code path, centralize
the check into the initialize function itself to make it safe to call it
at any time.
Signed-off-by: Geoffrey McRae
---
audio/jackaudio.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git
This fixes a hang when there is a communications issue with the JACK
server. Simply closing the connection is enough to completely clean up
and as such we do not need to remove the ports first. As JACK uses a
socket based protocol that relies on the `select` call, if there is a
communication
Initial code for JACK did not support audio input and as such this
boolean was set to let QEMU know, however JACK ended up including input
support making this invalid. Further investigation shows it was invalid
to set it in the first instance anyway due to a failure on my part
understand properly
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