Re: [PATCH 00/23] TCI fixes and cleanups

Richard Henderson writes: > The first patch I believe is queued by Paolo, but is not yet > upstream; copied here for convenience. Then, fill in all of > the TODO blanks in TCI. > > The tci_write_reg* functions are redundant with tcg_write_reg. > Just pass in the properly truncated result to

Re: [PATCH v4 00/12] Support disabling TCG on ARM (part 2)

Philippe Mathieu-Daudé writes: > Hi Alex, > > On 1/28/21 1:41 AM, Alex Bennée wrote: >> Philippe Mathieu-Daudé writes: >> >>> Cover from Samuel Ortiz from (part 1) [1]: >>> >>> This patchset allows for building and running ARM targets with TCG >>> disabled. [...] >>> >>> The rationale

Re: [PATCH 3/3] spapr_numa.c: fix ibm,max-associativity-domains calculation

On Thu, 28 Jan 2021 12:17:31 -0300 Daniel Henrique Barboza wrote: > The current logic for calculating 'maxdomain' making it a sum of > numa_state->num_nodes with spapr->gpu_numa_id. spapr->gpu_numa_id is > used as a index to determine the next available NUMA id that a > given NVGPU can use. > >

Re: [PATCH 14/23] tcg/tci: Merge INDEX_op_ld16s_{i32,i64}

Richard Henderson writes: > Eliminating a TODO for ld16s_i64. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée

Re: [PATCH v6 00/11] hvf: Implement Apple Silicon Support

Am 20.01.21 um 23:44 schrieb Alexander Graf: Now that Apple Silicon is widely available, people are obviously excited to try and run virtualized workloads on them, such as Linux and Windows. This patch set implements a fully functional version to get the ball going on that. With this applied,

Re: [PATCH 0/3] spapr, spapr_numa: fix max-associativity-domains

On 1/28/21 1:03 PM, Greg Kurz wrote: On Thu, 28 Jan 2021 12:17:28 -0300 Daniel Henrique Barboza wrote: Hi, Patches 02 and 03 contain fixes for a problem Cedric found out when booting TCG guests with multiple NUMA nodes. See patch 03 commit message for more info. This paragraph mentions

Re: [PATCH 0/3] spapr, spapr_numa: fix max-associativity-domains

On 1/28/21 6:13 PM, Cédric Le Goater wrote: > On 1/28/21 6:05 PM, Daniel Henrique Barboza wrote: >> >> >> On 1/28/21 1:03 PM, Greg Kurz wrote: >>> On Thu, 28 Jan 2021 12:17:28 -0300 >>> Daniel Henrique Barboza wrote: >>> Hi, Patches 02 and 03 contain fixes for a problem Cedric

Re: [PATCH] tests: Fix runtime error in test-authz-pam

On Thu, Jan 28, 2021 at 06:11:27PM +0100, Stefan Weil wrote: > A test with sanitizers on macOS shows this error: > > authz/pamacct.c:50:25: runtime error: null pointer passed as argument 1, > which is declared to never be null > >

[PATCH] target/rx: Fix compiler errors for build with sanitizers

gcc (Debian 10.2.1-6) 10.2.1 20210110 aborts builds with enabled sanitizers: ../../../target/rx/op_helper.c: In function ‘helper_scmpu’: ../../../target/rx/op_helper.c:213:24: error: ‘tmp1’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 213 | env->psw_c = (tmp0 >=

Re: [PATCH] target/rx: Fix compiler errors for build with sanitizers

On 1/28/21 6:21 PM, Stefan Weil wrote: > gcc (Debian 10.2.1-6) 10.2.1 20210110 aborts builds with enabled sanitizers: > > ../../../target/rx/op_helper.c: In function ‘helper_scmpu’: > ../../../target/rx/op_helper.c:213:24: error: ‘tmp1’ may be used > uninitialized in this function

[PATCH v2 1/3] spapr: move spapr_machine_using_legacy_numa() to spapr_numa.c

This function is used only in spapr_numa.c. Tested-by: Cédric Le Goater Reviewed-by: Greg Kurz Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr.c | 9 - hw/ppc/spapr_numa.c| 9 + include/hw/ppc/spapr.h | 1 - 3 files changed, 9 insertions(+), 10 deletions(-)

Re: [PATCH v14 02/22] target/riscv: remove CONFIG_TCG, as it is always TCG

Claudio Fontana writes: > for now only TCG is allowed as an accelerator for riscv, > so remove the CONFIG_TCG use. > > Signed-off-by: Claudio Fontana > Reviewed-by: Alistair Francis Reviewed-by: Alex Bennée -- Alex Bennée

[PATCH] iotests/297: pylint: ignore too many statements

Ignore two complains, which now lead to 297 failure on testenv.py and testrunner.py. Fixes: 2e5a2f57db481f18fcf70be2a36b1417370b8476 Fixes: d74c754c924ca34e90b7c96ce2f5609d82c0e628 Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/297 | 4 +++- 1 file changed, 3 insertions(+),

[PATCH 3/3] nbd: make nbd_read* return -EIO on error

NBD reconnect logic considers the error code from the functions that read NBD messages to tell if reconnect should be attempted or not: it is attempted on -EIO, otherwise the client transitions to NBD_CLIENT_QUIT state (see nbd_channel_error). This error code is propagated from the primitives

Re: vnc clipboard support

Hi On Thu, Jan 28, 2021 at 9:14 PM Gerd Hoffmann wrote: > Hi folks, > > I'm looking for a good way to implement cut+paste support for vnc. > > The vnc core protocol has support for text/plain cut+paste, and there > is an extension adding support for other formats. That'll cover one > part of

Re: [PATCH] hw/arm/smmuv3: Fix addr_mask for range-based invalidation

Hi Zenghui, On 1/28/21 9:25 AM, Auger Eric wrote: > Hi Zenghui, > > On 12/25/20 10:50 AM, Zenghui Yu wrote: >> When performing range-based IOTLB invalidation, we should decode the TG >> field into the corresponding translation granule size so that we can pass >> the correct invalidation range to

[PATCH v4 13/23] target/arm: Improve gen_top_byte_ignore

Use simple arithmetic instead of a conditional move when tbi0 != tbi1. Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 25 ++--- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index

[PATCH v4 05/23] exec: Improve types for guest_addr_valid

Return bool not int; pass abi_ulong not 'unsigned long'. All callers use abi_ulong already, so the change in type has no effect. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h

[PATCH v4 22/23] target/arm: Enable MTE for user-only

Signed-off-by: Richard Henderson --- target/arm/cpu.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index db81a12418..43933550c3 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -204,6 +204,21 @@ static void

Re: [PATCH v14 04/22] cpu: Move synchronize_from_tb() to tcg_ops

On 1/28/21 8:58 AM, Alex Bennée wrote: > Looking at the function here I wonder if we should be worried about the > thumb state? Peter? > > static void arm_cpu_set_pc(CPUState *cs, vaddr value) > { > ARMCPU *cpu = ARM_CPU(cs); > CPUARMState *env = >env; > > if (is_a64(env)) { >

Re: [PATCH v6 07/11] hvf: Add Apple Silicon support

On Wed, 20 Jan 2021 at 22:44, Alexander Graf wrote: > > With Apple Silicon available to the masses, it's a good time to add support > for driving its virtualization extensions from QEMU. > > This patch adds all necessary architecture specific code to get basic VMs > working. It's still pretty

Re: [PATCH v6 11/11] hvf: arm: Implement -cpu host

On Wed, 20 Jan 2021 at 22:44, Alexander Graf wrote: > > Now that we have working system register sync, we push more target CPU > properties into the virtual machine. That might be useful in some > situations, but is not the typical case that users want. > > So let's add a -cpu host option that

Re: [PATCH v6] Add support for pvpanic pci device

On Wed, 27 Jan 2021 at 15:46, Mihai Carabas wrote: > > This patchset adds support for pvpanic pci device. > Applied to target-arm.next, thanks. -- PMM

Re: vnc clipboard support

On Thu, Jan 28, 2021 at 06:12:24PM +0100, Gerd Hoffmann wrote: > Hi folks, > > I'm looking for a good way to implement cut+paste support for vnc. > > The vnc core protocol has support for text/plain cut+paste, and there > is an extension adding support for other formats. That'll cover one >

[Bug 1913619] Re: qemu-system-x86_64 -cdrom -nographic gives no output

The vga-to-serial redirection activated by -nographics works only for vgabios calls, not for direct vga hardware access. grub2 uses the vgabios, the linux kernel doesn't. You can edit the menu entry in grub and add "console=ttyS0" to the linux command line. ** Changed in: qemu Status:

Re: [PATCH] migration/qemu-file: Fix maybe uninitialized on qemu_get_buffer_in_place()

On 1/28/21 6:16 PM, Dr. David Alan Gilbert wrote: > * Wainer dos Santos Moschetta (waine...@redhat.com) wrote: >> Fixed error when compiling migration/qemu-file.c with >> -Werror=maybe-uninitialized >> as shown here: >> >> ../migration/qemu-file.c: In function 'qemu_get_buffer_in_place': >>

Re: [PATCH] migration/qemu-file: Fix maybe uninitialized on qemu_get_buffer_in_place()

* Philippe Mathieu-Daudé (phi...@redhat.com) wrote: > On 1/28/21 6:16 PM, Dr. David Alan Gilbert wrote: > > * Wainer dos Santos Moschetta (waine...@redhat.com) wrote: > >> Fixed error when compiling migration/qemu-file.c with > >> -Werror=maybe-uninitialized > >> as shown here: > >> > >>

[PATCH] docs/system: document an example vexpress-a15 invocation

The wiki and the web are curiously absent of the right runes to boot a vexpress model so I had to work from first principles to work it out. Use the more modern -drive notation so alternative backends can be used (unlike the hardwired -sd mode). Signed-off-by: Alex Bennée Cc: Anders Roxell ---

Re: [PATCH v14 12/22] physmem: make watchpoint checking code TCG-only

Claudio Fontana writes: > cpu_check_watchpoint, watchpoint_address_matches are TCG-only. > > Signed-off-by: Claudio Fontana Reviewed-by: Alex Bennée -- Alex Bennée

Re: [PATCH v6 34/72] target/riscv: rvv-1.0: register gather instructions

On Tue, Jan 12, 2021 at 2:10 AM wrote: > > From: Frank Chang > > * Add vrgatherei16.vv instruction. > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 4 > target/riscv/insn32.decode | 1 + >

Re: [PATCH] gdbstub: Fix handle_query_xfer_auxv

Richard Henderson writes: > The main problem was that we were treating a guest address > as a host address with a mere cast. > > Use the correct interface for accessing guest memory. Do not > allow offset == auxv_len, which would result in an empty packet. > > Fixes: 51c623b0de1 ("gdbstub:

Re: [PATCH 0/1] tests/acceptance/boot_linux: Switch to Fedora 32

On 1/28/2021 3:19 PM, Wainer dos Santos Moschetta wrote: Hi, On 1/26/21 10:09 PM, Daniele Buono wrote: Local acceptance tests run with "make check-acceptance" are now showing some cases canceled like the following: (01/39) tests/acceptance/boot_linux.py:BootLinuxX8664.test_pc_i440fx_tcg:

[PATCH v4 14/23] target/arm: Use the proper TBI settings for linux-user

We were fudging TBI1 enabled to speed up the generated code. Now that we've improved the code generation, remove this. Also, tidy the comment to reflect the current code. The pauth test was testing a kernel address (-1) and making incorrect assumptions about TBI1; stick to userland addresses.

[PATCH v4 11/23] exec: Add support for TARGET_TAGGED_ADDRESSES

The AArch64 Linux ABI has always enabled TBI, but has historically required that pointer tags be removed before a syscall. This has changed in the lead-up to ARMv8.5-MTE, in a way that affects the ABI generically and not specifically to MTE. This patch allows the target to indicate that (1)

Re: [PATCH] vfio/migrate: Move switch of dirty tracking into vfio_memory_listener

* Paolo Bonzini (pbonz...@redhat.com) wrote: > On 11/01/21 08:34, Keqian Zhu wrote: > > +static void vfio_listener_log_start(MemoryListener *listener, > > +MemoryRegionSection *section, > > +int old, int new) > > +{ > > +

[PATCH 1/3] block/nbd: only detach existing iochannel from aio_context

When the reconnect in NBD client is in progress, the iochannel used for NBD connection doesn't exist. Therefore an attempt to detach it from the aio_context of the parent BlockDriverState results in a NULL pointer dereference. The problem is triggerable, in particular, when an outgoing migration

[PATCH] gdbstub: Fix handle_query_xfer_auxv

The main problem was that we were treating a guest address as a host address with a mere cast. Use the correct interface for accessing guest memory. Do not allow offset == auxv_len, which would result in an empty packet. Fixes: 51c623b0de1 ("gdbstub: add support to Xfer:auxv:read: packet")

Re: [PATCH 0/1] tests/acceptance/boot_linux: Switch to Fedora 32

Hi, On 1/26/21 10:09 PM, Daniele Buono wrote: Local acceptance tests run with "make check-acceptance" are now showing some cases canceled like the following: (01/39) tests/acceptance/boot_linux.py:BootLinuxX8664.test_pc_i440fx_tcg: CANCEL: Failed to download/prepare boot image (0.25 s) Turns

Re: [PATCH v6 67/72] target/riscv: rvv-1.0: set mstatus.SD bit when writing vector CSRs

On Tue, Jan 12, 2021 at 2:30 AM wrote: > > From: Frank Chang > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/csr.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target/riscv/csr.c b/target/riscv/csr.c > index

[PATCH 0/2] utils/fifo8: minor updates

This patchset contains a couple of minor updates to QEMU's Fifo8 implementation conceived whilst working on the next revision of the ESP series. Patch 1 has already been reviewed on-list whilst patch 2 adds a new VMSTATE_FIFO8_TEST macro which is required to allow the updated ESP series to handle

[PATCH 1/2] utils/fifo8: change fatal errors from abort() to assert()

Developer errors are better represented with assert() rather than abort(). Also improve the strictness of the checks by using range checks within the assert() rather than converting the existing equality checks to inequality checks. Signed-off-by: Mark Cave-Ayland Reviewed-by: Claudio Fontana

[PATCH 2/2] utils/fifo8: add VMSTATE_FIFO8_TEST macro

Rewrite the existing VMSTATE_FIFO8 macro to use VMSTATE_FIFO8_TEST as per the standard pattern in include/migration/vmstate.h. Signed-off-by: Mark Cave-Ayland --- include/qemu/fifo8.h | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/include/qemu/fifo8.h

Re: [PATCH 2/2] utils/fifo8: add VMSTATE_FIFO8_TEST macro

On Thu, 28 Jan 2021 at 22:17, Mark Cave-Ayland wrote: > > Rewrite the existing VMSTATE_FIFO8 macro to use VMSTATE_FIFO8_TEST as per the > standard pattern in include/migration/vmstate.h. > > Signed-off-by: Mark Cave-Ayland > --- > include/qemu/fifo8.h | 16 ++-- > 1 file changed, 10

[PATCH v4 23/23] tests/tcg/aarch64: Add mte smoke tests

Signed-off-by: Richard Henderson --- tests/tcg/aarch64/mte.h | 60 +++ tests/tcg/aarch64/mte-1.c | 28 +++ tests/tcg/aarch64/mte-2.c | 45 +++ tests/tcg/aarch64/mte-3.c | 51 ++

Re: [PATCH] iotests/297: pylint: ignore too many statements

28.01.2021 23:04, Vladimir Sementsov-Ogievskiy wrote: Ignore two complains, which now lead to 297 failure on testenv.py and testrunner.py. Fixes: 2e5a2f57db481f18fcf70be2a36b1417370b8476 Fixes: d74c754c924ca34e90b7c96ce2f5609d82c0e628 Signed-off-by: Vladimir Sementsov-Ogievskiy --- Forget to

Re: [PATCH v6 14/72] target/riscv: rvv-1.0: update check functions

On Tue, Jan 12, 2021 at 1:54 AM wrote: > > From: Frank Chang > > Update check functions with RVV 1.0 rules. > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/insn_trans/trans_rvv.c.inc | 732 > 1 file changed, 499

Re: [PATCH v6 36/72] target/riscv: rvv-1.0: floating-point move instruction

On Tue, Jan 12, 2021 at 2:16 AM wrote: > > From: Frank Chang > > NaN-boxed the scalar floating-point register based on RVV 1.0's rules. > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/insn_trans/trans_rvv.c.inc | 16 ++-- > 1 file

Re: [PATCH] Add support for building on ARM Macs

On Thu, 28 Jan 2021 at 21:14, John Arbuckle wrote: > > Adds support for building QEMU on ARM-based Macintoshes. > This patch has been tested on an M1 Mac running Mac OS 11.1 > and on a 64-bit x86 Mac running Mac OS 10.12. > > Signed-off-by: John Arbuckle There are already patches on-list

[PATCH v4 01/23] tcg: Introduce target-specific page data for user-only

This data can be allocated by page_alloc_target_data() and released by page_set_flags(start, end, prot | PAGE_RESET). This data will be used to hold tag memory for AArch64 MTE. Signed-off-by: Richard Henderson --- v3: Add doc comments; tweak alloc so that the !PAGE_VALID case is clear. ---

[PATCH v4 00/23] target-arm: Implement ARMv8.5-MemTag, user mode

The kernel abi was finally merged into 5.10. Changes for v4: * Revamp "Add support for TARGET_TAGGED_ADDRESSES". There are now two sets of functions in include/exec/, one for tagged and one for untagged addresses. The former takes a CPUState, and does not assume current_cpu is a

[PATCH v4 10/23] linux-user: Fix guest_addr_valid vs reserved_va

We must always use GUEST_ADDR_MAX, because even 32-bit hosts can use -R to restrict the memory address of the guest. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/exec/cpu_ldst.h

[PATCH v4 02/23] linux-user: Introduce PAGE_ANON

Record whether the backing page is anonymous, or if it has file backing. This will allow us to get close to the Linux AArch64 ABI for MTE, which allows tag memory only on ram-backed VMAs. The real ABI allows tag memory on files, when those files are on ram-backed filesystems, such as tmpfs. We

[PATCH v4 17/23] target/arm: Split out syndrome.h from internals.h

Move everything related to syndromes to a new file, which can be shared with linux-user. Signed-off-by: Richard Henderson --- target/arm/internals.h | 245 +--- target/arm/syndrome.h | 273 + 2 files changed, 274

[PATCH v4 06/23] linux-user: Check for overflow in access_ok

Verify that addr + size - 1 does not wrap around. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 17aa992165..441ba6a78b 100644

Re: [PATCH v4 00/23] target-arm: Implement ARMv8.5-MemTag, user mode

Patchew URL: https://patchew.org/QEMU/20210128224141.638790-1-richard.hender...@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210128224141.638790-1-richard.hender...@linaro.org Subject: [PATCH v4 00/23]

Re: [PATCH] tests/acceptance: Re-enable the microblaze test

Hi, On 1/28/21 12:28 PM, Thomas Huth wrote: The microblaze kernel sometimes gets stuck during boot (ca. 1 out of 200 times), so we disabled the corresponding acceptance tests some months ago. However, it's likely better to check that the kernel is still starting than to not testing it at all

Re: [PULL 0/8] Block layer patches

28.01.2021 21:19, Peter Maydell wrote: On Wed, 27 Jan 2021 at 19:58, Kevin Wolf wrote: The following changes since commit bf159f0bdc7b8e7aa8342dedb3829ca744c1b612: Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2021-01-27.for-upstream' into staging (2021-01-27

[PATCH 2/3] block/nbd: only enter connection coroutine if it's present

When an NBD block driver state is moved from one aio_context to another (e.g. when doing a drain in a migration thread), nbd_client_attach_aio_context_bh is executed that enters the connection coroutine. However, the assumption that ->connection_co is always present here appears incorrect: the

[PATCH 0/3] block/nbd: fix crashers in reconnect while migrating

During the final phase of migration the NBD reconnection logic may encounter situations it doesn't expect during regular operation. This series addresses some of them that make qemu crash. They are reproducible when a vm with a secondary drive attached via nbd with non-zero "reconnect-delay"

Re: [PATCH v9 04/11] slirp: feature detection for smbd

On Mon, Jan 25, 2021 at 11:30 PM Philippe Mathieu-Daudé wrote: > > On 1/26/21 2:24 AM, Joelle van Dyne wrote: > > Replace Windows specific macro with a more generic feature detection > > macro. Allows slirp smb feature to be disabled manually as well. > > > > Signed-off-by: Joelle van Dyne > >

Re: [PATCH v3 1/9] hw/block: m25p80: Add ISSI SPI flash support

On Mon, Jan 25, 2021 at 10:01 PM Bin Meng wrote: > > From: Bin Meng > > This adds the ISSI SPI flash support. The number of dummy cycles in > fast read, fast read dual output and fast read quad output commands > is currently using the default 8. Likewise, the same default value > is used for

[PATCH v4 21/23] target/arm: Add allocation tag storage for user mode

Use the now-saved PAGE_ANON and PAGE_MTE bits, and the per-page saved data. Signed-off-by: Richard Henderson --- target/arm/mte_helper.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index

[PATCH v4 08/23] bsd-user: Tidy VERIFY_READ/VERIFY_WRITE

These constants are only ever used with access_ok, and friends. Rather than translating them to PAGE_* bits, let them equal the PAGE_* bits to begin. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- bsd-user/qemu.h | 9 - 1 file changed, 4 insertions(+), 5 deletions(-)

[PATCH v4 07/23] linux-user: Tidy VERIFY_READ/VERIFY_WRITE

These constants are only ever used with access_ok, and friends. Rather than translating them to PAGE_* bits, let them equal the PAGE_* bits to begin. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-)

[PATCH v4 12/23] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE

This is the prctl bit that controls whether syscalls accept tagged addresses. See Documentation/arm64/tagged-address-abi.rst in the linux kernel. Signed-off-by: Richard Henderson --- linux-user/aarch64/target_syscall.h | 4 target/arm/cpu-param.h | 3 +++ target/arm/cpu.h

[PATCH v4 19/23] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault

Signed-off-by: Richard Henderson --- linux-user/aarch64/target_signal.h | 2 ++ linux-user/aarch64/cpu_loop.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/linux-user/aarch64/target_signal.h b/linux-user/aarch64/target_signal.h index ddd73169f0..777fb667fe 100644 ---

[PATCH v4 18/23] linux-user/aarch64: Pass syndrome to EXC_*_ABORT

A proper syndrome is required to fill in the proper si_code. Use page_get_flags to determine permission vs translation for user-only. Signed-off-by: Richard Henderson --- v3: Use syndrome.h, arm_deliver_fault. --- linux-user/aarch64/cpu_loop.c | 24 +---

Re: vnc clipboard support

On Fri, 29 Jan 2021, Marc-André Lureau wrote: I also had recently some thoughts about how to implement clipboard sharing in a more general way for QEMU. I admit I like Christophe's suggestion ("it's somebody else problem"), but it falls short to me as I don't know of a common open-source

[PATCH] Add support for building on ARM Macs

Adds support for building QEMU on ARM-based Macintoshes. This patch has been tested on an M1 Mac running Mac OS 11.1 and on a 64-bit x86 Mac running Mac OS 10.12. Signed-off-by: John Arbuckle --- configure | 49 +++-- 1 file changed, 39

[PATCH v4 09/23] linux-user: Do not use guest_addr_valid for h2g_valid

This is the only use of guest_addr_valid that does not begin with a guest address, but a host address being transformed to a guest address. We will shortly adjust guest_addr_valid to handle guest memory tags, and the host address should not be subjected to that. Move h2g_valid adjacent to the

[PATCH v4 03/23] exec: Use uintptr_t for guest_base

This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 2 +- bsd-user/main.c| 4 ++-- linux-user/elfload.c | 4 ++-- linux-user/main.c | 4 ++-- 4 files changed,

[PATCH v4 16/23] linux-user/aarch64: Implement PROT_MTE

Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2. Otherwise this does not yet have effect. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v3: Do not overlap PAGE_TARGET_2 with PAGE_RESERVED. --- include/exec/cpu-all.h| 1 + linux-user/syscall_defs.h | 1 +

[PATCH v4 04/23] exec: Use uintptr_t in cpu_ldst.h

This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h

[PATCH v4 15/23] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG

These prctl fields are required for the function of MTE. Signed-off-by: Richard Henderson --- linux-user/aarch64/target_syscall.h | 9 ++ linux-user/syscall.c| 43 + 2 files changed, 52 insertions(+) diff --git

[PATCH v4 20/23] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error

The real kernel collects _TIF_MTE_ASYNC_FAULT into the current thread's state on any kernel entry (interrupt, exception etc), and then delivers the signal in advance of resuming the thread. This means that while the signal won't be delivered immediately, it will not be delayed forever -- at

Re: [PATCH] fuzz: fix wrong index in clear_bits

On 28/01/21 04:59, Qiuhao Li wrote: Signed-off-by: Qiuhao Li --- scripts/oss-fuzz/minimize_qtest_trace.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/oss-fuzz/minimize_qtest_trace.py b/scripts/oss-fuzz/minimize_qtest_trace.py index 4cba96dee2..20825768c2

[PATCH 09/23] tcg/tci: Inline tci_write_reg32 into all callers

For a 64-bit TCI, the upper bits of a 32-bit operation are undefined (much like a native ppc64 32-bit operation). It simplifies everything if we don't force-extend the result. Signed-off-by: Richard Henderson --- tcg/tci.c | 66 +-- 1 file

[PATCH 06/23] tcg/tci: Inline tci_write_reg32s into the only caller

Signed-off-by: Richard Henderson --- tcg/tci.c | 10 +- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 0e1b8e8383..438d712ea8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,14 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index,

[PATCH 12/23] tcg/tci: Merge INDEX_op_ld8s_{i32,i64}

Eliminating a TODO for ld8s_i32. Signed-off-by: Richard Henderson --- tcg/tci.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 019035d52f..7d11982eb2 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -578,7 +578,11 @@ uintptr_t

[PATCH 18/23] tcg/tci: Move stack bounds check to compile-time

The existing check was incomplete: (1) Only applied to two of the 7 stores, and not to the loads at all. (2) Only checked the upper, but not the lower bound of the stack. Doing this at compile time means that we don't need to do it at runtime as well. Signed-off-by: Richard Henderson ---

[PATCH 11/23] tcg/tci: Merge INDEX_op_ld8u_{i32,i64}

Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 864771d91b..019035d52f 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -571,6 +571,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,

[PATCH 08/23] tcg/tci: Inline tci_write_reg16 into the only caller

Signed-off-by: Richard Henderson --- tcg/tci.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 7797558b2a..0b27f26cfb 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,12 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index,

[PATCH 13/23] tcg/tci: Merge INDEX_op_ld16u_{i32,i64}

Eliminating a TODO for ld16u_i32. Signed-off-by: Richard Henderson --- tcg/tci.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 7d11982eb2..d197803dca 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -585,7 +585,11 @@ uintptr_t

[PATCH 23/23] tcg/tci: Remove TODO as unused

Signed-off-by: Richard Henderson --- tcg/tci.c | 8 1 file changed, 8 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 0065c854a4..efc0ca20a6 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -33,14 +33,6 @@ #include "tcg/tcg-op.h" #include "qemu/compiler.h" -/* Marker for missing

[PATCH 20/23] tcg/tci: Use g_assert_not_reached

Three TODO instances are never happen cases. Other uses of tcg_abort are also indicating unreachable cases. Signed-off-by: Richard Henderson --- tcg/tci.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 66b90f8489..2ce67a8fd3

Re: [PATCH v3 18/21] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error

On 1/22/21 3:59 AM, Peter Maydell wrote: > On Fri, 15 Jan 2021 at 22:47, Richard Henderson > wrote: >> >> Signed-off-by: Richard Henderson > > So when does the real kernel report async MTE exceptions to userspace? > The commit message would be a good place to briefly describe the > kernel's

[PATCH 01/23] configure: Fix --enable-tcg-interpreter

The configure option was backward, and we failed to pass the value on to meson. Fixes: 23a77b2d18b Signed-off-by: Richard Henderson --- configure | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/configure b/configure index dcc5ea7d63..ad35e26168 100755 --- a/configure

[PATCH 21/23] tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_*

We do not simultaneously support div and div2 -- it's one or the other. TCI is already using div, so remove div2. Signed-off-by: Richard Henderson --- tcg/tci.c| 12 tcg/tci/tcg-target.c.inc | 16 2 files changed, 28 deletions(-) diff --git

Re: [PATCH] hw/arm/smmuv3: Fix addr_mask for range-based invalidation

Hi Zenghui, On 12/25/20 10:50 AM, Zenghui Yu wrote: > When performing range-based IOTLB invalidation, we should decode the TG > field into the corresponding translation granule size so that we can pass > the correct invalidation range to backend. Set @granule to (tg * 2 + 10) to > properly

[PATCH 05/23] tcg/tci: Implement INDEX_op_ld8s_i64

From: Stefan Weil That TCG opcode is used by debian-buster (arm64) running ffmpeg: qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm Reported-by: Alex Bennée Signed-off-by: Stefan Weil Message-Id: <20210128020425.2055454-1...@weilnetz.de> Signed-off-by: Richard Henderson ---

[PATCH 04/23] tcg/tci: Implement INDEX_op_ld16s_i32

From: Stefan Weil That TCG opcode is used by debian-buster (arm64) running ffmpeg: qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm Reported-by: Alex Bennée Signed-off-by: Stefan Weil Message-Id: <20210128024814.2056958-1...@weilnetz.de> Signed-off-by: Richard Henderson ---

[PATCH 16/23] tcg/tci: Merge INDEX_op_st8_{i32,i64}

Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 233fc0604e..0978a5c554 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -606,6 +606,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,

[PATCH 19/23] tcg/tci: Merge INDEX_op_{st_i32,st32_i64}

Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index c4c303f874..66b90f8489 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -620,6 +620,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,

[PATCH 14/23] tcg/tci: Merge INDEX_op_ld16s_{i32,i64}

Eliminating a TODO for ld16s_i64. Signed-off-by: Richard Henderson --- tcg/tci.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index d197803dca..95625701bb 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -592,6 +592,7 @@ uintptr_t QEMU_DISABLE_CFI

Re: [PATCH] target/i386: Fix decoding of certain BMI instructions

On 27/01/21 23:54, David Greenaway wrote: On 14 Jan 2021, David Greenaway wrote: This patch fixes a translation bug for a subset of x86 BMI instructions such as the following: [...] Gentle ping. The patch is up at:

[PATCH 15/23] tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64}

Signed-off-by: Richard Henderson --- tcg/tci.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 95625701bb..233fc0604e 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -599,6 +599,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,

Re: qemu user mode fails to run programs with large VM / built with address sanitizer (was: Re: [PATCH v4 4/4] meson: Warn when TCI is selected but TCG backend is available)

On 1/27/21 8:51 PM, Stefan Weil wrote: > The problem occurred with a locally built tesseract, but I now found that it > is > more general. > > Any program which was compiled with address sanitizer uses huge virtual memory > (TB) right at the start. QEMU user mode tries to allocate that memory

[PATCH 00/23] TCI fixes and cleanups

The first patch I believe is queued by Paolo, but is not yet upstream; copied here for convenience. Then, fill in all of the TODO blanks in TCI. The tci_write_reg* functions are redundant with tcg_write_reg. Just pass in the properly truncated result to begin. In the cases of the loads, we've

[PATCH 03/23] exec: Make tci_tb_ptr thread-local

Each thread must have its own pc, even under TCI. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 2 +- tcg/tcg-common.c| 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 125000bcf7..f933c74c44

[PATCH 07/23] tcg/tci: Inline tci_write_reg8 into its callers

Signed-off-by: Richard Henderson --- tcg/tci.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 438d712ea8..7797558b2a 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -115,11 +115,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index,

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