To ease reviewing code using the I2C bus API, introduce the
i2c_start_recv() and i2c_start_send() helpers which don't
take the confusing 'is_recv' boolean argument.
Use these new helpers in the SMBus / AUX bus models.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Instead of using the confuse i2c_send_recv(), replace
i2c_send_recv(send = true) by i2c_send() and
i2c_send_recv(send = false) by i2c_recv().
During the replacement we also change a while() statement by for().
The resulting code is easier to review.
Reviewed-by: Richard Henderson
Acked-by:
Implement the MVE VABS functions (both integer and floating point).
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/helper-mve.h| 6 ++
target/arm/mve.decode | 3 +++
target/arm/mve_helper.c| 13 +
target/arm/translate-mve.c | 15
Implement the MVE VABD insn.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/helper-mve.h| 7 +++
target/arm/mve.decode | 3 +++
target/arm/mve_helper.c| 5 +
target/arm/translate-mve.c | 2 ++
4 files changed, 17 insertions(+)
diff --git
Implement the scalar form of the MVE VADD insn. This takes the
scalar operand from a general purpose register.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/helper-mve.h| 4
target/arm/mve.decode | 7 ++
target/arm/mve_helper.c| 22
Implement the scalar variants of the MVE VHADD and VHSUB insns.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/helper-mve.h| 16
target/arm/mve.decode | 4
target/arm/mve_helper.c| 8
target/arm/translate-mve.c | 4
Implement the MVE VRHADD insn, which performs a rounded halving
addition.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/helper-mve.h| 8
target/arm/mve.decode | 3 +++
target/arm/mve_helper.c| 6 ++
target/arm/translate-mve.c | 2 ++
4
Avoid accessing QCryptoTLSCreds internals by using
the qcrypto_tls_creds_check_endpoint() helper.
Signed-off-by: Philippe Mathieu-Daudé
---
ui/vnc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/ui/vnc.c b/ui/vnc.c
index b3d4d7b9a5f..f7d63a16dd5 100644
---
From: Volker Rümelin
Move the code to generate the pa_context_new() application name
argument to a function in audio/audio.c. The new function
audio_application_name() will also be used in the jackaudio
backend.
Signed-off-by: Volker Rümelin
Message-Id:
This post introduces the new TCG plugin `cache` that's used for cache
modelling. This plugin is a part of my GSoC 2021 participation.
Signed-off-by: Mahmoud Mandour
---
v1 -> v2:
Elaborated some more in the introduction and broken up some
sentences.
Changed the example of blocked
From: Hyman Huang(黄勇)
since main thread may "query dirty rate" at any time, it's better
to move init step into main thead so that synchronization overhead
between "main" and "get_dirtyrate" can be reduced.
Signed-off-by: Hyman Huang(黄勇)
---
migration/dirtyrate.c | 23 +++
From: Volker Rümelin
Currently with jackaudio client name and qemu guest name unset,
the JACK client names are out-(NULL) and in-(NULL). These names
are user visible in the patch bay. Replace the function call to
qemu_get_vm_name() with a call to audio_application_name() which
replaces NULL with
On Thu, Jun 17, 2021 at 01:58:09PM +0200, Claudio Fontana wrote:
> On 6/17/21 9:49 AM, Valeriy Vdovin wrote:
> > On Thu, Jun 17, 2021 at 07:22:36AM +0200, Markus Armbruster wrote:
> >> Valeriy Vdovin writes:
> >>
> >>> Introducing new qapi method 'query-kvm-cpuid'. This method can be used to
> >>
* Greg Kurz (gr...@kaod.org) wrote:
> A well behaved FUSE client uses FUSE_CREATE to create files. It isn't
> supposed to pass O_CREAT along a FUSE_OPEN request, as documented in
> the "fuse_lowlevel.h" header :
>
> /**
> * Open a file
> *
> * Open flags are available in
Add 'vmnet' customizable option and 'vmnet.framework' probe into
configure;
Create source files for network client driver, update meson.build;
Add 'vmnet' into qapi::net::NetClientDriver options list.
Signed-off-by: Vladislav Yaroshchuk
---
configure | 31 +++
On Thu, Jun 17, 2021 at 12:08:20PM +0200, Klaus Jensen wrote:
> if (cq->tail != cq->head) {
> +if (!pending) {
> +n->cq_pending++;
> +}
You should check cq->irq_enabled before incrementing cq_pending. You
don't want to leave the irq asserted when polled queues
On Thu, Jun 17, 2021 at 10:12:04PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> dirty rate measurement may start or stop dirty tracking during
> calculation. this conflict with migration because stop dirty
> tracking make migration leave dirty pages out then that'll be
> a
On 17/06/2021 12.06, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
On 6/15/21 4:17 PM, Peter Maydell wrote:
On Tue, 15 Jun 2021 at 14:42, Paolo Bonzini wrote:
The following changes since commit 894fc4fd670aaf04a67dc7507739f914ff4bacf2:
Merge remote-tracking branch
Machines and accelerators are not user-creatable but they are going
to share similar command-line parsing machinery. Export functions
that will be used with -machine and -accel in softmmu/vl.c.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
include/qom/object.h| 23
Starting from ceph Pacific, RBD has built-in support for image-level encryption.
Currently supported formats are LUKS version 1 and 2.
There are 2 new relevant librbd APIs for controlling encryption, both expect an
open image context:
rbd_encryption_format: formats an image (i.e. writes the LUKS
Allow parsing multiple keyval sequences into the same dictionary.
This will be used to simplify the parsing of the -M command line
option, which is currently a .merge_lists = true QemuOpts group.
Reviewed-by: Markus Armbruster
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
On Thu, 17 Jun 2021 15:29:12 +0100
"Dr. David Alan Gilbert" wrote:
> * Greg Kurz (gr...@kaod.org) wrote:
> > A well behaved FUSE client uses FUSE_CREATE to create files. It isn't
> > supposed to pass O_CREAT along a FUSE_OPEN request, as documented in
> > the "fuse_lowlevel.h" header :
> >
> >
On 6/16/21 5:24 PM, Igor Mammedov wrote:
>
> Sometimes it's necessary to execute a test that depends on KVM,
> however qtest is not aware if tested QEMU binary supports KVM
> on the host it the test is executed.
Hello,
It seems to me that we are constantly re-implementing the same feature with
qemu-file-channel.c may depend on GnuTLS.
Signed-off-by: Akihiko Odaki
---
meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/meson.build b/meson.build
index a2311eda6ec..29d854699ca 100644
--- a/meson.build
+++ b/meson.build
@@ -2090,6 +2090,7 @@ libio = static_library('io',
Extract 1100+ lines from the huge translate.c to a new file,
'mips16e_translate.c.inc'. As there are too many inter-
dependencies we don't compile it as another object, but
keep including it in the big translate.o. We gain in code
maintainability.
Signed-off-by: Philippe Mathieu-Daudé
Hi Andrey,
The issue doesnt seem related to ITS patchset as the implementation has
no changes around MTTCG or vCPU configurations.
if this patchset were not applied(with only commit 3e9f48b),do you
still see the hang issue?
Thanks
Shashi
On Thu, 2021-06-17 at 16:43 +, Andrey Shinkevich
15.06.2021 23:47, Eric Blake wrote:
From: Vladimir Sementsov-Ogievskiy
block/nbd doesn't need underlying sioc channel anymore. So, we can
update nbd/client-connection interface to return only one top-most io
channel, which is more straight forward.
Signed-off-by: Vladimir Sementsov-Ogievskiy
All DSDT Q35 tables will be modified because ACPI hot-plug is enabled
by default.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 11 +++
1 file changed, 11 insertions(+)
diff --git
By default, -fsanitize=fuzzer instruments all code with coverage
information. However, this means that libfuzzer will track coverage over
hundreds of source files that are unrelated to virtual-devices. This
means that libfuzzer will optimize inputs for coverage observed in timer
code, memory APIs
On Thu, Jun 17, 2021 at 09:07:36PM +0200, Julia Suvorova wrote:
> Instead of changing the hot-plug type in _OSC register, do not
> set the 'Hot-Plug Capable' flag. This way guest will choose ACPI
> hot-plug if it is preferred and leave the option to use SHPC with
> pcie-pci-bridge.
>
> The
getxattr/setxattr/removexattr/listxattr operations handle regualar
and non-regular files differently. For the case of non-regular files
we do fchdir(/proc/self/fd) and the xattr operation and then revert
back to original working directory. After this we are saving errno
and that's buggy because
PCI Express does not allow hot-plug on pcie.0. Check for Q35 in
acpi_pcihp_disable_root_bus() to be able to forbid hot-plug using the
'acpi-root-pci-hotplug' flag.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
hw/acpi/pcihp.c | 3 ++-
1 file changed, 2 insertions(+), 1
On Tue, 15 Jun 2021 at 18:01, Alex Bennée wrote:
>
> The previous numbers were a guess at best and rather arbitrary without
> taking into account anything that might be loaded. Instead of using
> guesses based on the state of registers implement a new function that
> scans MemoryRegions for the
Implement notifications and gpe to support q35 ACPI PCI hot-plug.
Use 0xcc4 - 0xcd7 range for 'acpi-pci-hotplug' io ports.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.h| 4
include/hw/acpi/ich9.h | 2 ++
include/hw/acpi/pcihp.h | 3 ++-
On Thu, Jun 17, 2021 at 3:17 PM Dov Murik wrote:
>
>
>
> On 17/06/2021 20:22, Eduardo Habkost wrote:
> > On Thu, Jun 17, 2021 at 03:48:52PM +0300, Dov Murik wrote:
> >>
> >>
> >> On 15/06/2021 22:53, Philippe Mathieu-Daudé wrote:
> >>> Hi Dov, James,
> >>>
> >>> +Connor who asked to be reviewer.
On 6/17/21 8:01 PM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> On 6/4/21 8:52 AM, Alex Bennée wrote:
>>> From: Claudio Fontana
>>> Cortex-A15 is the only ARM cpu class we need in KVM too.
>>> We will be able to move it to tcg/ once the board code and
>>> configurations
>>> are fixed.
On Wed, Jun 16, 2021 at 03:38:13PM +0200, Max Reitz wrote:
> On 11.06.21 22:04, Vivek Goyal wrote:
> > On Wed, Jun 09, 2021 at 05:55:49PM +0200, Max Reitz wrote:
> > > Currently, lo_inode.fhandle is always NULL and so always keep an O_PATH
> > > FD in lo_inode.fd. Therefore, when the respective
This patch series adds the STM32VLDISCOVERY Machine to QEMU
Information on the board is available at:
https://www.st.com/en/evaluation-tools/stm32vldiscovery.html
v3:
- Add test for STM32VLDISCOVERY USART1
v2:
- Add documentation of STM32 boards
- Fixed number of interrupts
- Fixed
This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY.
Signed-off-by: Alexandre Iooss
---
MAINTAINERS| 1 +
docs/system/arm/stm32.rst | 66 ++
docs/system/target-arm.rst | 1 +
3 files changed, 68 insertions(+)
Hi Dov,
+Thomas
On 6/17/21 2:48 PM, Dov Murik wrote:
> On 15/06/2021 22:53, Philippe Mathieu-Daudé wrote:
>> Hi Dov, James,
>>
>> +Connor who asked to be reviewer.
>>
>> On 6/15/21 5:20 PM, Eduardo Habkost wrote:
>>> On Tue, May 25, 2021 at 06:59:31AM +, Dov Murik wrote:
From: James
On 6/17/21 2:40 PM, Maxim Levitsky wrote:
> On Mon, 2021-06-14 at 18:03 +0200, Philippe Mathieu-Daudé wrote:
>> On 6/11/21 1:46 PM, Philippe Mathieu-Daudé wrote:
>>> When the NVMe block driver was introduced (see commit bdd6a90a9e5,
>>> January 2018), Linux VFIO_IOMMU_MAP_DMA ioctl was only
We moved various TCG source files in commit a2b0a27d33e
("target/mips: Move TCG source files under tcg/ sub directory")
but forgot to move the header declaring their prototypes.
Do it now, since all it declares is TCG specific.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/{ =>
2021年6月18日(金) 2:39 Philippe Mathieu-Daudé :
>
> On 6/17/21 7:19 PM, Akihiko Odaki wrote:
> > qemu-file-channel.c may depend on GnuTLS.
> >
> > Signed-off-by: Akihiko Odaki
> > ---
> > meson.build | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/meson.build b/meson.build
> > index
Richard Henderson writes:
> On 6/4/21 8:52 AM, Alex Bennée wrote:
>> From: Claudio Fontana
>> Cortex-A15 is the only ARM cpu class we need in KVM too.
>> We will be able to move it to tcg/ once the board code and
>> configurations
>> are fixed.
>> Signed-off-by: Claudio Fontana
>>
fuse has an option FUSE_POSIX_ACL which needs to be opted in by fuse
server to enable posix acls. As of now we are not opting in for this,
so posix acls are disabled on virtiofs by default.
Add virtiofsd option "-o posix_acl/no_posix_acl" to let users enable/disable
posix acl support. By default
When posix access acls are set on a file, it can lead to adjusting file
permissions (mode) as well. If caller does not have CAP_FSETID and it
also does not have membership of owner group, this will lead to clearing
SGID bit in mode.
Current fuse code is written in such a way that it expects file
Previously the store-conditional code was writing to hex_pred[prednum].
Then, the fGEN_TCG override was reading from there to the destination
variable so that the packet commit logic would handle it properly.
The correct implementation is to write to the destination variable
and don't have the
This SoC is similar to stm32f205 SoC.
This will be used by the STM32VLDISCOVERY to create a machine.
Signed-off-by: Alexandre Iooss
---
MAINTAINERS| 6 ++
hw/arm/Kconfig | 6 ++
hw/arm/meson.build | 1 +
hw/arm/stm32f100_soc.c | 182
On 6/17/21 7:19 PM, Akihiko Odaki wrote:
> qemu-file-channel.c may depend on GnuTLS.
>
> Signed-off-by: Akihiko Odaki
> ---
> meson.build | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/meson.build b/meson.build
> index a2311eda6ec..29d854699ca 100644
> --- a/meson.build
> +++
Commit a2b0a27d33e ("target/mips: Move TCG source files under
tcg/ sub directory") forgot to move the trace-event file.
As it only contains TCG events, move it for consistency.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build| 2 +-
target/mips/tcg/translate.c
Fixes and cleanup accumulated during the last month.
Nothing particularly exciting :/
Please review,
Phil.
Philippe Mathieu-Daudé (9):
target/mips: Do not abort on invalid instruction
target/mips: Fix more TCG temporary leaks in
gen_pool32a5_nanomips_insn
target/mips: Move TCG trace
Fix multiple TCG temporary leaks in gen_pool32a5_nanomips_insn().
Fixes: 3285a3e4445 ("target/mips: Add emulation of DSP ASE for nanoMIPS - part
1")
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/translate.c | 4
1 file changed, 4 insertions(+)
diff --git
These placeholder comments for SmartMIPS and MDMX extensions have
been added commit 3c824109da0 ("target-mips: microMIPS ASE support").
More than 11 years later it is safe to assume there won't be added
soon, so remove these unuseful comments.
Signed-off-by: Philippe Mathieu-Daudé
---
Merge MSA32 & MSA64.
Philippe Mathieu-Daudé (2):
target/mips: Remove pointless gen_msa()
target/mips: Merge msa32/msa64 decodetree definitions
target/mips/tcg/{msa32.decode => msa.decode} | 8 +---
target/mips/tcg/msa64.decode | 17
Commit 043715d1e0f ("target/mips: Update ITU to utilize SAARI
and SAAR CP0 registers") declared itc_reconfigure() in public
namespace, while it is restricted to system emulation.
Similarly commit 5679479b9a1 ("target/mips: Move CP0 helpers
to sysemu/cp0.c") restricted cpu_mips_soft_irq()
Keep host_to_mips_errno[] in .rodata by marking the array const.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/sysemu/mips-semi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/tcg/sysemu/mips-semi.c
b/target/mips/tcg/sysemu/mips-semi.c
index
To be able to extract the microMIPS ISA and Code Compaction ASE
translation routines to different source files, declare few TCG
helpers which are also used by translate.c in "translate.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/translate.h | 5 +
With kernel header updates fuse_setxattr_in struct has grown in size.
But this new struct size only takes affect if user has opted in
for fuse feature FUSE_SETXATTR_EXT otherwise fuse continues to
send "fuse_setxattr_in" of older size. Older size is determined
by FUSE_COMPAT_SETXATTR_IN_SIZE.
Fix
When parent directory has default acl and a file is created in that
directory, then umask is ignored and final file permissions are
determined using default acl instead. (man 2 umask).
Currently, fuse applies the umask and sends modified mode in create
request accordingly. fuse server can set
Add the bits to enable support for setxattr_ext if fuse offers it. Do not
enable it by default yet. Let passthrough_ll opt-in. Enabling it by deafult
kind of automatically means that you are taking responsibility of clearing
SGID if ACL is set.
Signed-off-by: Vivek Goyal
---
On 6/17/21 8:44 PM, shashi.mall...@linaro.org wrote:
> Hi Andrey,
>
> The issue doesnt seem related to ITS patchset as the implementation has
> no changes around MTTCG or vCPU configurations.
>
> if this patchset were not applied(with only commit 3e9f48b),do you
> still see the hang issue?
No,
From: Klaus Jensen
Prior to this patch, a loop was used to issue multiple "fire and forget"
aios for each range in the command. Without a reference to the aiocb
returned from the blk_aio_pdiscard calls, the aios cannot be canceled.
Fix this by processing the ranges one after another.
As a
From: Klaus Jensen
This series reimplements flush, dsm, copy, zone reset and format nvm to
allow cancellation. I posted an RFC back in March ("hw/block/nvme:
convert ad-hoc aio tracking to aiocb") and I've applied some feedback
from Stefan and reimplemented the remaining commands.
The basic
From: Klaus Jensen
Prepare nvme_dif_pract_generate_dif() and nvme_dif_check() to be
callable in smaller increments by making the reftag a pointer parameter
updated by the function.
Signed-off-by: Klaus Jensen
---
hw/nvme/nvme.h | 4 ++--
hw/nvme/ctrl.c | 10 +-
hw/nvme/dif.c | 22
From: Klaus Jensen
Prior to this patch, the aios associated with broadcast format are
submitted anonymously (no aiocb reference saved from the blk_aio call).
Fix this by formatting the namespaces one after another, saving a
reference to the aiocb for each.
Signed-off-by: Klaus Jensen
---
Add ACPI hot-plug registers to DSDT Q35 tables.
Changes in the tables:
+Scope (_SB.PCI0)
+{
+OperationRegion (PCST, SystemIO, 0x0CC4, 0x08)
+Field (PCST, DWordAcc, NoLock, WriteAsZeros)
+{
+PCIU, 32,
+PCID, 32
+}
+
+
On Wed, Jun 16, 2021 at 10:43:25PM +0200, Philippe Mathieu-Daudé wrote:
> ACPI core routines (in core.c) are not really x86-specific.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/acpi/meson.build | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git
Dear Shashi,
I have applied the version 4 of the series "GICv3 LPI and ITS feature
implementation" right after the commit 3e9f48b as before (because the
GCCv7.5 is unavailable in the YUM repository for CentOS-7.9).
The guest OS still hangs at its start when QEMU is configured with 4 or
more
This is a Cortex-M3 based machine. Information can be found at:
https://www.st.com/en/evaluation-tools/stm32vldiscovery.html
Signed-off-by: Alexandre Iooss
---
MAINTAINERS | 6 +++
default-configs/devices/arm-softmmu.mak | 1 +
hw/arm/Kconfig
New mini-kernel test for STM32VLDISCOVERY USART1.
Signed-off-by: Alexandre Iooss
---
tests/qtest/boot-serial-test.c | 37 ++
1 file changed, 37 insertions(+)
diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c
index
We don't need to maintain 2 sets of decodetree definitions.
Merge them into a single file.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/{msa32.decode => msa.decode} | 8 +---
target/mips/tcg/msa64.decode | 17 -
target/mips/tcg/msa_translate.c
Since all entries are no more than 3/4/6 bytes (including nul
terminator), can save space and pie runtime relocations by
declaring regnames[] as array of 3/4/6 const char.
Inspired-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 2 +-
On real hardware an invalid instruction doesn't halt the world,
but usually triggers a RESERVED INSTRUCTION exception.
TCG guest code shouldn't abort QEMU anyway.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
These switch cases for the microMIPS BPOSGE32 / BPOSGE64 opcodes have
been added commit 3c824109da0 ("target-mips: microMIPS ASE support").
More than 11 years later it is safe to assume there won't be added
soon. The cases fall back to the default which generates a RESERVED
INSTRUCTION, so it is
Patches in this series are going to make use of "umask" syscall.
So allow it.
Signed-off-by: Vivek Goyal
Reviewed-by: Stefan Hajnoczi
---
tools/virtiofsd/passthrough_seccomp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/virtiofsd/passthrough_seccomp.c
Patchew URL:
https://patchew.org/QEMU/20210617181213.1177835-1-vgo...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210617181213.1177835-1-vgo...@redhat.com
Subject: [PATCH v6 0/8] virtiofsd: Add
17.06.2021 12:42, Peter Maydell wrote:
On Tue, 15 Jun 2021 at 21:50, Eric Blake wrote:
The following changes since commit 1ea06abceec61b6f3ab33dadb0510b6e09fb61e2:
Merge remote-tracking branch
'remotes/berrange-gitlab/tags/misc-fixes-pull-request' into staging (2021-06-14
15:59:13
On Jun 17 07:50, Keith Busch wrote:
On Thu, Jun 17, 2021 at 12:08:20PM +0200, Klaus Jensen wrote:
if (cq->tail != cq->head) {
+if (!pending) {
+n->cq_pending++;
+}
You should check cq->irq_enabled before incrementing cq_pending. You
don't want to leave the irq
From: Klaus Jensen
Before this patch the code would issue several aios simultaneously
without saving a reference to the aiocb. Without the aiocb reference the
individual copies cannot be canceled.
Fix this by issuing copies of the ranges one after another.
Signed-off-by: Klaus Jensen
---
The patch set consists of two parts:
patches 1-4: introduce new feature
'acpi-pci-hotplug-with-bridge-support' on Q35
patches 5-7: make the feature default along with changes in ACPI tables
With the feature disabled Q35 falls back to the native hot-plug.
Pros
* no racy behavior
From: Klaus Jensen
The nvme_check_prinfo() and nvme_dif_check() functions operate on the
16 bit "control" member of the NvmeCmd. These functions do not otherwise
operate on an NvmeCmd or an NvmeRequest, so change them to expect the
actual 4 bit PRINFO field and add constants that work on this
On Thu, Jun 17, 2021 at 05:53:11PM +0200, Claudio Fontana wrote:
> On 6/17/21 5:39 PM, Valeriy Vdovin wrote:
> > On Thu, Jun 17, 2021 at 04:14:17PM +0200, Markus Armbruster wrote:
> >> Claudio Fontana writes:
> >>
> >>> On 6/17/21 1:09 PM, Markus Armbruster wrote:
> Valeriy Vdovin writes:
>
Extract the microMIPS ISA and Code Compaction ASE translation
routines to different source files. Patches rebased and already
reviewed, except patch #1.
Philippe Mathieu-Daudé (4):
target/mips: Add declarations for generic TCG helpers
target/mips: Extract Code Compaction ASE translation
Add acpi_pcihp to ich9_pm as part of
'acpi-pci-hotplug-with-bridge-support' option. Set default to false.
Signed-off-by: Julia Suvorova
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.h | 1 +
include/hw/acpi/ich9.h | 3 ++
hw/acpi/ich9.c | 67
From: Klaus Jensen
Pull the gist of nvme_check_dulbe() into a helper function. This is in
preparation for dsm refactoring.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 41 -
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git
From: Klaus Jensen
Some commands report additional useful information in dw0 and dw1 of the
completion queue entry.
Add them to the trace.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 2 ++
hw/nvme/trace-events | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git
On 17/06/2021 18.56, Alexandre Iooss wrote:
New mini-kernel test for STM32VLDISCOVERY USART1.
Signed-off-by: Alexandre Iooss
---
tests/qtest/boot-serial-test.c | 37 ++
1 file changed, 37 insertions(+)
diff --git a/tests/qtest/boot-serial-test.c
Recently we added support of zstd to qcow2 format, as zstd seems to be
better than zlib in general, and which is important (as qcow2
compression used mostly for backups) compressed writes are faster with
zstd.
Let's add a build option to use zstd by default.
Signed-off-by: Vladimir
Instead of changing the hot-plug type in _OSC register, do not
set the 'Hot-Plug Capable' flag. This way guest will choose ACPI
hot-plug if it is preferred and leave the option to use SHPC with
pcie-pci-bridge.
The ability to control hot-plug for each downstream port is retained,
while
TYPE_ES1370 is "ES1370", capitalized. Fix the config to account for
that.
Signed-off-by: Alexander Bulekov
---
tests/qtest/fuzz/generic_fuzz_configs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/fuzz/generic_fuzz_configs.h
On Wed, Jun 16, 2021 at 10:43:05PM +0200, Philippe Mathieu-Daudé wrote:
> Hi,
>
> While testing James & Dov patch:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg810571.html
> I wasted some time trying to figure out how OVMF was supposed to
> behave until realizing the binary I was using
On Thu, Jun 17, 2021 at 09:07:32PM +0200, Julia Suvorova wrote:
> The patch set consists of two parts:
> patches 1-4: introduce new feature
> 'acpi-pci-hotplug-with-bridge-support' on Q35
> patches 5-7: make the feature default along with changes in ACPI tables
>
> With the feature
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c| 6 --
target/hexagon/translate.c | 11 ++-
2 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index bd18cb1..5dbabe0 100644
Y4_l2fetch == l2fetch(Rs32, Rt32)
Y5_l2fetch == l2fetch(Rs32, Rtt32)
The semantics for these instructions are present, but the encodings
are missing.
Note that these are treated as nops in qemu, so we add overrides.
Test case added to tests/tcg/hexagon/misc.c
Reviewed-by: Richard Henderson >
Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1"
Remove gen_logical_not function
Clean up fLSBNEWNOT to use andi-1 followed by xori-1
Test cases added to tests/tcg/hexagon/misc.c
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h| 27
qemu-file-channel.c may depend on GnuTLS.
Signed-off-by: Akihiko Odaki
---
meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index a2311eda6ec..b8812dff387 100644
--- a/meson.build
+++ b/meson.build
@@ -2090,6 +2090,7 @@ libio =
On Thu, Jun 17, 2021 at 03:48:52PM +0300, Dov Murik wrote:
>
>
> On 15/06/2021 22:53, Philippe Mathieu-Daudé wrote:
> > Hi Dov, James,
> >
> > +Connor who asked to be reviewer.
> >
> > On 6/15/21 5:20 PM, Eduardo Habkost wrote:
> >> On Tue, May 25, 2021 at 06:59:31AM +, Dov Murik wrote:
>
Only trans_MSA() calls gen_msa(), inline it to simplify.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/msa_translate.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index
To be able to extract the DSP ASE translation routines to
different source file, declare few TCG helpers, MASK_SPECIAL3
and a DSP register in "translate.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/translate.h | 7 +++
target/mips/tcg/translate.c | 10 +-
2 files
Hi,
This is V6 of the patches.
Changes since V5:
- Kernel patches for extended setxattr have been merged in 5.13-rc1.
These patches have been modified to work with FUSE_SETXATTR_EXT.
Currently posix ACL support does not work well with virtiofs and bunch
of tests fail when I run xfstests
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