On Tue, Aug 24, 2021 at 03:11:58PM +0200, Sergio Lopez wrote:
> With the thread pool disabled, we add the requests in the queue to a
> GList, processing by iterating over there afterwards.
>
> For adding them, we're using "g_list_prepend()", which is more
> efficient but causes the requests to be
Hi,
This series contains various patches sent last year with
review comments addressed, few more cleanups, and a new
patch which remove the spurious "VFIO_MAP_DMA failed: No
space left on device" now poping up since commit 15a730e7a.
(it is the expected behavior, which is why we retry the
same
On Tue, 24 Aug 2021 at 14:50, Philippe Mathieu-Daudé wrote:
>
> On 8/24/21 3:15 PM, Stefan Hajnoczi wrote:
> > On Mon, Aug 23, 2021 at 06:41:57PM +0200, Philippe Mathieu-Daudé wrote:
> >> Check bus permission in flatview_access_allowed() before
> >> running any bus transaction.
> >>
> >> There is
These will be used to implement new decimal floating point
instructions from Power ISA 3.1.
A new argument, prem, was added to divu128/divs128 to receive the
remainder, freeing up phigh to receive the high 64 bits of the
quotient.
For scenarios supported by the previous implementation
(<= 64-bit
Move abs64 to host-utils so it can be reused elsewhere.
Also made it inline.
Signed-off-by: Luis Pires
---
hw/i386/kvm/i8254.c | 5 -
include/qemu/host-utils.h | 8
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c
index
Move the following instructions to decodetree:
dquai: DFP Quantize Immediate
dquaiq: DFP Quantize Immediate Quad
drintx: DFP Round to FP Integer With Inexact
drintxq: DFP Round to FP Integer With Inexact Quad
drintn: DFP Round to FP Integer Without Inexact
drintnq: DFP Round to FP Integer
The Synertek datasheet says, "A write to T1L-H loads an 8-bit count value
into the latch. A read of T1L-H transfers the contents of the latch to
the data bus. Neither operation has an affect [sic] on the interrupt
flag."
Signed-off-by: Finn Thain
---
hw/misc/mos6522.c | 1 -
1 file changed, 1
Reads and writes to the TL and TC registers have no immediate effect on
a running timer, with the exception of a write to TCH. Hence these
mos6522_timer_update() calls are not needed.
Signed-off-by: Finn Thain
---
hw/misc/mos6522.c | 7 ---
1 file changed, 7 deletions(-)
diff --git
The first reload of timer 1 is early by half of a clock cycle as it gets
measured from a falling edge. By contrast, the succeeding reloads are
measured from rising edge to rising edge.
Neglecting that complication, the behaviour of the counter should be the
same from one reload to the next. The
On Tue, 24 Aug 2021, Igor Mammedov wrote:
> On Mon, 23 Aug 2021 19:06:47 -0400
> "Michael S. Tsirkin" wrote:
>
> > On Sat, Aug 21, 2021 at 08:35:35PM +0530, Ani Sinha wrote:
> > > Bsel property of the pci bus indicates whether the bus supports acpi
> > > hotplug.
> > > We need to validate
Peter Maydell writes:
> On Tue, 24 Aug 2021 at 09:14, Markus Armbruster wrote:
>> In functions with an Error **errp parameter, use of _fatal is
>> almost always wrong.
>
> What are the cases where it is not wrong?
I can't think of a use that isn't wrong. Doesn't mean no such use could
exist.
On Mon, Aug 23, 2021 at 06:41:54PM +0200, Philippe Mathieu-Daudé wrote:
> We are going to introduce more MemTxResult bits, so it is
> safer to check for !MEMTX_OK rather than MEMTX_ERROR.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/intc/arm_gicv3_dist.c | 4 ++--
>
On Mon, Aug 23, 2021 at 06:41:53PM +0200, Philippe Mathieu-Daudé wrote:
> Remove unuseful local 'result' variables.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> softmmu/physmem.c | 11 +++
> 1 file changed, 3 insertions(+), 8 deletions(-)
Reviewed-by: Stefan Hajnoczi
On 8/24/21 4:04 PM, Darren Kenny wrote:
> Should have done this much sooner given the amount of reviewing I'm
> already doing in this area.
>
> Signed-off-by: Darren Kenny
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
:)
Reviewed-by: Philippe Mathieu-Daudé
On Tue, 24 Aug 2021 at 14:58, Eduardo Habkost wrote:
>
> On Tue, Aug 24, 2021 at 01:16:40PM +0100, Peter Maydell wrote:
> > On Tue, 24 Aug 2021 at 13:05, Markus Armbruster wrote:
> > > When you know that all callers handle errors like _fatal does, use
> > > of _fatal doesn't produce wrong
Move the following instructions to decodetree:
dcmpu:DFP Compare Unordered
dcmpuq: DFP Compare Unordered Quad
dcmpo:DFP Compare Ordered
dcmpoq: DFP Compare Ordered Quad
dtstex: DFP Test Exponent
dtstexq: DFP Test Exponent Quad
dtstsf: DFP Test Significance
dtstsfq: DFP Test
Am 21.08.21 um 15:18 schrieb Peter Maydell:
> On Sat, 21 Aug 2021 at 10:48, Florian Hauschild
> wrote:
>>
>> This extension covers functions:
>> * to read and write guest memory
>> * to read and write guest registers
>> * to flush tb cache
>> * to control single stepping of qemu from
We rely on a QEMUTimer callback to set the interrupt flag, and this races
with counter register accesses, such that the guest might see the counter
reloaded but might not see the interrupt flagged.
According to the datasheet, a real 6522 device counts down to , then
raises the relevant IRQ.
Add simple grammar-parsing template benchmark. New tool consume test
template written in bash with some special grammar injections and
produces multiple tests, run them and finally print a performance
comparison table of different tests produced from one template.
Signed-off-by: Vladimir
On 8/24/21 12:09 PM, Finn Thain wrote:
> On a real Quadra, accesses to the SY6522 chips are slow because they are
> synchronous with the 783360 Hz "phase 2" clock. In QEMU, they are slow
> only because of the division operation in the timer count calculation.
>
> This patch series improves the
On Dienstag, 24. August 2021 10:22:52 CEST Markus Armbruster wrote:
> Christian Schoenebeck writes:
> > Implements deep auto free of arrays while retaining common C-style
> > squared bracket access.
> >
> > Signed-off-by: Christian Schoenebeck
>
> You provide some motivation for this, but only
On Sonntag, 22. August 2021 15:16:46 CEST Christian Schoenebeck wrote:
> Implements deep auto free of arrays while retaining common C-style
> squared bracket access.
>
> Signed-off-by: Christian Schoenebeck
> ---
> include/qemu/qarray.h | 150 ++
> 1 file
On existing older machine types, without cpu topology described
in ACPI or DT, the guest will populate one by default. With the
topology described, it will read the information and set up its
topology as instructed, but that may not be the same as what was
getting used by default. It's possible
From: LCM
The current SMMU v3 model only support PCI/PCIe devices, so we update it for
non-PCI/PCIe devices.
. Add independent IOMMU memory regions for non-PCI/PCIe devices
. Add SID value property setting for non-PCI/PCIe devices
. Add PL330 DMA controller into "virt" machine and connect
On Mon, Aug 23, 2021 at 08:10:50PM +0100, Peter Maydell wrote:
> On Mon, 23 Aug 2021 at 17:42, Philippe Mathieu-Daudé
> wrote:
> >
> > This series aim to kill a recent class of bug, the infamous
> > "DMA reentrancy" issues found by Alexander while fuzzing.
> >
> > Introduce the 'bus_perm' field
On 24.08.21 10:38, Vladimir Sementsov-Ogievskiy wrote:
mypy thinks that return value of these methods in subclusses is
QEMUMachine, which is wrong. So, make typing smarter.
Suggested-by: John Snow
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
python/qemu/machine/machine.py | 10 +++---
Implement the following PowerISA v3.1 instruction:
dctfixqq: DFP Convert To Fixed Quadword Quad
Signed-off-by: Luis Pires
---
target/ppc/dfp_helper.c | 53 +
target/ppc/helper.h | 1 +
target/ppc/insn32.decode| 5 +++
From: Fernando Valle
Signed-off-by: Fernando Valle
Signed-off-by: Luis Pires
---
target/ppc/translate.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 4749ecdaa9..5489b4b6e0 100644
--- a/target/ppc/translate.c
+++
From: Bruno Larsen
Move REQUIRE_ALTIVEC to translate.c and rename it to REQUIRE_VECTOR.
Signed-off-by: Bruno Larsen
Signed-off-by: Matheus Ferst
Signed-off-by: Fernando Valle
Signed-off-by: Luis Pires
---
target/ppc/translate.c | 8
Move the following instructions to decodetree:
dctdp: DFP Convert To DFP Long
dctqpq: DFP Convert To DFP Extended
drsp:DFP Round To DFP Short
drdpq: DFP Round To DFP Long
dcffix: DFP Convert From Fixed
dcffixq: DFP Convert From Fixed Quad
dctfix: DFP Convert To Fixed
dctfixq: DFP
This code appears to be unnecessary.
Also, these routines don't return the counter value but a time interval
between counter values, so they are misnamed.
Signed-off-by: Finn Thain
---
hw/misc/mos6522.c | 22 ++
1 file changed, 2 insertions(+), 20 deletions(-)
diff --git
This improves readability.
Signed-off-by: Finn Thain
---
hw/misc/mos6522.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 1d4a56077e..c0d6bee4cc 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -154,7 +154,7 @@
On Tue, Aug 24, 2021 at 12:30 AM John Snow wrote:
>
>
> On Mon, Aug 23, 2021 at 12:31 PM G S Niteesh Babu
> wrote:
>
>> Added AQMP TUI.
>>
>> Implements the follwing basic features:
>> 1) Command transmission/reception.
>> 2) Shows events asynchronously.
>> 3) Shows server status in the bottom
There is no conflict and no dependency if we have parallel writes to
different subclusters of one cluster when the cluster itself is already
allocated. So, relax extra dependency.
Measure performance:
First, prepare build/qemu-img-old and build/qemu-img-new images.
cd scripts/simplebench
On 8/24/21 12:09 PM, Finn Thain wrote:
> It necessary to call mos6522_update_irq() when the interrupt flags
> change and unnecessary when they haven't.
>
> Signed-off-by: Finn Thain
> ---
> hw/misc/mos6522.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Philippe
On Tue, 24 Aug 2021 09:37:54 +0100
"Dr. David Alan Gilbert" wrote:
> * David Hildenbrand (da...@redhat.com) wrote:
> > On 23.08.21 12:34, Philippe Mathieu-Daudé wrote:
> > > On 8/23/21 12:24 PM, David Hildenbrand wrote:
> > > > On 23.08.21 12:12, Philippe Mathieu-Daudé wrote:
> > > > > On
On Mon, Aug 23, 2021 at 06:41:56PM +0200, Philippe Mathieu-Daudé wrote:
> Introduce flatview_access_allowed() to check bus permission
> before running any bus transaction. For now this is a simple
> stub.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> softmmu/physmem.c | 37
On Tue, 24 Aug 2021, Philippe Mathieu-Daudé wrote:
> On 8/24/21 1:06 PM, Ani Sinha wrote:
> > On Tue, 24 Aug 2021, Ani Sinha wrote:
> >> On Tue, 24 Aug 2021, Igor Mammedov wrote:
> >>> On Mon, 23 Aug 2021 19:06:47 -0400
> >>> "Michael S. Tsirkin" wrote:
> >>>
> On Sat, Aug 21, 2021 at
On Mon, Aug 16, 2021 at 09:42:36AM -0700, Elena Ufimtseva wrote:
> +static Property vfio_user_pci_dev_properties[] = {
> +DEFINE_PROP_STRING("socket", VFIOUserPCIDevice, sock_name),
> +DEFINE_PROP_BOOL("secure-dma", VFIOUserPCIDevice, secure_dma, false),
> +DEFINE_PROP_END_OF_LIST(),
>
On Tue, Aug 24, 2021 at 01:16:40PM +0100, Peter Maydell wrote:
> On Tue, 24 Aug 2021 at 13:05, Markus Armbruster wrote:
> > When you know that all callers handle errors like _fatal does, use
> > of _fatal doesn't produce wrong behavior. It's still kind of
> > wrong, because relying on such a
On Mon, Aug 16, 2021 at 09:42:37AM -0700, Elena Ufimtseva wrote:
> @@ -3361,13 +3362,35 @@ static void vfio_user_pci_realize(PCIDevice *pdev,
> Error **errp)
> VFIOUserPCIDevice *udev = VFIO_USER_PCI(pdev);
> VFIOPCIDevice *vdev = VFIO_PCI_BASE(pdev);
> VFIODevice *vbasedev =
On Tue, 24 Aug 2021 at 15:34, Florian Hauschild
wrote:
>
>
>
> Am 21.08.21 um 15:18 schrieb Peter Maydell:
> > On Sat, 21 Aug 2021 at 10:48, Florian Hauschild
> > wrote:
> >>
> >> This extension covers functions:
> >> * to read and write guest memory
> >> * to read and write guest registers
Hi all!
v2:
01: improve documentation
02: add Hanna's and Eric's r-bs, add tiny grammar fix
03: fix test by filtering instead of reducing number of writes
Parallel small writes to unallocated cluster works bad when subclusters
enabled.
Look, without subclusters, one of write requests will
mos6522_read() and mos6522_write() may call various functions to determine
timer irq state, timer counter value and QEMUTimer deadline. All called
functions must use the same value for the present time.
Signed-off-by: Finn Thain
---
hw/misc/mos6522.c | 51
It necessary to call mos6522_update_irq() when the interrupt flags
change and unnecessary when they haven't.
Signed-off-by: Finn Thain
---
hw/misc/mos6522.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 0a241fe9f8..0dd3ccf945
On 8/24/21 12:09 PM, Finn Thain wrote:
> This improves readability.
>
> Signed-off-by: Finn Thain
> ---
> hw/misc/mos6522.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 8/24/21 12:09 PM, Finn Thain wrote:
> This code appears to be unnecessary.
>
> Signed-off-by: Finn Thain
> ---
> hw/misc/mos6522.c | 22 +-
> 1 file changed, 1 insertion(+), 21 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 8/24/21 12:09 PM, Finn Thain wrote:
> This code appears to be unnecessary.
>
> Also, these routines don't return the counter value but a time interval
> between counter values, so they are misnamed.
>
> Signed-off-by: Finn Thain
> ---
> hw/misc/mos6522.c | 22 ++
> 1
On Tue, 24 Aug 2021 16:07:30 +0530 (IST)
Ani Sinha wrote:
> On Tue, 24 Aug 2021, Igor Mammedov wrote:
>
> > On Mon, 23 Aug 2021 19:06:47 -0400
> > "Michael S. Tsirkin" wrote:
> >
> > > On Sat, Aug 21, 2021 at 08:35:35PM +0530, Ani Sinha wrote:
> > > > Bsel property of the pci bus indicates
Hi,
> I was vaguely tossing an idea around in the back of my mind
> about whether you could have a flag on devices that marked
> them as "this device is currently involved in IO", such that
> you could then just fail the last DMA (or qemu_irq_set, or
> whatever) that would complete the loop
From: Andrew Jones
Add the Processor Properties Topology Table (PPTT) to expose
CPU topology information defined by users to ACPI guests.
Note, a DT-boot Linux guest with a non-flat CPU topology will
see socket and core IDs being sequential integers starting
from zero, which is different from
Add a generic API to build Processor hierarchy node structure (Type 0),
which is strictly consistent with descriptions in ACPI 6.2: 5.2.29.1.
This function will be used to build ACPI PPTT table for cpu topology.
Co-developed-by: Ying Fang
Co-developed-by: Henglong Fan
Co-developed-by: Yanan
Pass qemu_vfio_do_mapping() an Error* argument so it can propagate
any error to callers. Replace error_report() which only report
to the monitor by the more generic error_setg_errno().
Reviewed-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Philippe Mathieu-Daudé
---
Now that all qemu_vfio_dma_map() callers provide an Error* argument,
fill it with relevant / more descriptive message. Reduce 'ret'
(returned value) scope by returning errno directly to simplify
(removing the goto / 'out' label).
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c|
Peter Maydell writes:
> On Tue, 24 Aug 2021 at 13:05, Markus Armbruster wrote:
>> When you know that all callers handle errors like _fatal does, use
>> of _fatal doesn't produce wrong behavior. It's still kind of
>> wrong, because relying on such a non-local argument without a genuine
>> need
Move the following instructions to decodetree:
dadd: DFP Add
daddq: DFP Add Quad
dsub: DFP Subtract
dsubq: DFP Subtract Quad
dmul: DFP Multiply
dmulq: DFP Multiply Quad
ddiv: DFP Divide
ddivq: DFP Divide Quad
diex: DFP Insert Biased Exponent
diexq: DFP Insert Biased Exponent Quad
Implement the following PowerISA v3.1 instruction:
dcffixqq: DFP Convert From Fixed Quadword Quad
Signed-off-by: Luis Pires
---
target/ppc/dfp_helper.c | 11 +++
target/ppc/helper.h | 1 +
target/ppc/insn32.decode| 8
Signed-off-by: Luis Pires
---
include/qemu/host-utils.h | 38 ++
1 file changed, 38 insertions(+)
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h
index 8e8cab9a3e..2e3b5ad989 100644
--- a/include/qemu/host-utils.h
+++
On Tue, Aug 24, 2021 at 06:24:27PM +0200, David Hildenbrand wrote:
> > > Not so much; here's the list of priorities and the devices using it:
> > >
> > > |+-|
> > > | priority | devices |
> > > |+-|
> > >
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of
the QEMU 6.1.0 release. This release contains 3000+ commits from 221
authors.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
The full list of changes are available at:
Signed-off-by: Eugene Huang
---
ui/egl-helpers.c | 41 +
1 file changed, 37 insertions(+), 4 deletions(-)
diff --git a/ui/egl-helpers.c b/ui/egl-helpers.c
index 6d0cb2b5cb..ce0971422b 100644
--- a/ui/egl-helpers.c
+++ b/ui/egl-helpers.c
@@ -1,6 +1,8 @@
The error_report() call in drc_unisolate_logical() is not considering
that drc->dev->id can be NULL, and the underlying functions error_report()
calls to do its job (vprintf(), g_strdup_printf() ...) has undefined
behavior when trying to handle "%s" with NULL arguments.
Besides, there is no
Clarify that @device is optional and that 'path' is the device
path from QOM.
This change follows Markus' suggestion verbatim, provided in full
context here:
https://lists.gnu.org/archive/html/qemu-devel/2021-07/msg01891.html
Suggested-by: Markus Armbruster
Reviewed-by: Greg Kurz
Reviewed-by:
From: Matheus Ferst
These helpers shouldn't depend on the host endianness, as they only use
shifts, , and int128_* methods.
Fixes: 60caf2216bf0 ("target-ppc: add vextu[bhw][lr]x instructions")
Signed-off-by: Matheus Ferst
---
target/ppc/int_helper.c | 38 ++
Hi, Peter, Gerd,
On Tue, Aug 24, 2021 at 02:01:53PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > I was vaguely tossing an idea around in the back of my mind
> > about whether you could have a flag on devices that marked
> > them as "this device is currently involved in IO", such that
> > you could
Make 'qemu-img commit' work on Windows.
Command 'commit' requires reopening backing file in RW mode. So,
add reopen prepare/commit/abort handlers and change dwShareMode
for CreateFile call in order to allow further read/write reopening.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/418
MEM_UNPLUG_ERROR is deprecated since the introduction of
DEVICE_UNPLUG_GUEST_ERROR. Keep emitting both while the deprecation of
MEM_UNPLUG_ERROR is pending.
CC: Michael S. Tsirkin
CC: Igor Mammedov
Reviewed-by: Greg Kurz
Signed-off-by: Daniel Henrique Barboza
---
hw/acpi/memory_hotplug.c | 9
As done in hw/acpi/memory_hotplug.c, pass an empty string if dev->id
is NULL to qapi_event_send_mem_unplug_error() to avoid relying on
a behavior that can be changed in the future.
Suggested-by: Markus Armbruster
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr.c | 2 +-
1 file changed,
Signed-off-by: Eugene Huang
---
ui/egl-helpers.c | 4
1 file changed, 4 insertions(+)
diff --git a/ui/egl-helpers.c b/ui/egl-helpers.c
index ce0971422b..dee31c6fbb 100644
--- a/ui/egl-helpers.c
+++ b/ui/egl-helpers.c
@@ -346,6 +346,10 @@ EGLSurface qemu_egl_init_surface_x11(EGLContext
qapi_event_send_mem_unplug_error() deals with @device being NULL by
replacing it with an empty string ("") when emitting the event. Aside
from the fact that this behavior (qapi visitor mapping NULL pointer to
"") can be patched/changed someday, there's also the lack of utility
that the event
Hi,
In this version the event was renamed and the optional 'msg'
attribute was removed. It also contains smaller changes based
on Markus' comments in v6.
changes from v6:
- patches 1 and 2:
* handle dev->id = NULL explicitly with empty string
- patch 3:
* added Markus' reviewed-by
- patch 4:
At this moment we only provide one event to report a hotunplug error,
MEM_UNPLUG_ERROR. As of Linux kernel 5.12 and QEMU 6.0.0, the pseries
machine is now able to report unplug errors for other device types, such
as CPUs.
Instead of creating a (device_type)_UNPLUG_ERROR for each new device,
On Tue, Aug 24, 2021 at 10:04:19PM +0400, Marc-André Lureau wrote:
> Hi
Hello, Marc-Andre,
>
> On Tue, Aug 24, 2021 at 7:27 PM Peter Xu wrote:
>
> > Both dump-guest-memory and live migration caches vm state at the beginning.
> > Either of them entering the other one will cause race on the vm
Hi, I recently tried using the edid feature in QEMU for my Mac OS 10.8 guest
like this: -device VGA,edid=on,xres=1280,yres=800. When the guest operating
system loaded there were no additional options available in the Display
settings. Would you know what is wrong?
Thank you.
On Mon, Aug 16, 2021 at 04:15:46PM +0200, Paolo Bonzini wrote:
> Hi,
>
> first of all, thanks for posting this work and starting the discussion.
>
> However, I am not sure if the in-guest migration helper vCPUs should use
> the existing KVM support code. For example, they probably can just
>
From: Matheus Ferst
The definition of struct Int128 is currently independent of the host
endianness, causing different results when using the member s128 of
union ppc_vsr_t in big-endian builds with CONFIG_INT128 or
!CONFIG_INT128.
The only PPC instructions that seem to be affected by this
From: Matheus Ferst
Suggested-by: Peter Maydell
Signed-off-by: Matheus Ferst
---
include/qemu/int128.h | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/include/qemu/int128.h b/include/qemu/int128.h
index 64500385e3..e36c6e6db5 100644
---
On Mon, Aug 23, 2021 at 11:38 AM Peter Lieven wrote:
>
> Am 22.08.21 um 23:02 schrieb Ilya Dryomov:
> > On Tue, Aug 10, 2021 at 3:41 PM Peter Lieven wrote:
> >> the qemu rbd driver currently lacks support for bdrv_co_block_status.
> >> This results mainly in incorrect progress during block
Linux Kernel 5.12 is now unisolating CPU DRCs in the device_removal
error path, signalling that the hotunplug process wasn't successful.
This allow us to send a DEVICE_UNPLUG_GUEST_ERROR in drc_unisolate_logical()
to signal this error to the management layer.
We also have another error path in
On Tue, Aug 24, 2021 at 08:09:36PM +1000, Finn Thain wrote:
> This is a patch series that I started last year. The aim was to try to
> get a monotonic clocksource for Linux/m68k guests. That aim hasn't been
> achieved yet (for q800 machines) but I'm submitting the patch series as
> an RFC
On Tue, Aug 24, 2021 at 09:48:33PM -0300, Daniel Henrique Barboza wrote:
> At this moment we only provide one event to report a hotunplug error,
> MEM_UNPLUG_ERROR. As of Linux kernel 5.12 and QEMU 6.0.0, the pseries
> machine is now able to report unplug errors for other device types, such
> as
On Tue, Aug 24, 2021 at 09:48:32PM -0300, Daniel Henrique Barboza wrote:
> Clarify that @device is optional and that 'path' is the device
> path from QOM.
>
> This change follows Markus' suggestion verbatim, provided in full
> context here:
>
>
> On Tue, Aug 24, 2021 at 05:46:43PM -0400, Programmingkid wrote:
> > Hi, I recently tried using the edid feature in QEMU for my Mac OS 10.8
> > guest
> > like this: -device VGA,edid=on,xres=1280,yres=800. When the guest operating
> > system loaded there were no additional options available in
On 8/24/21 10:11 PM, matheus.fe...@eldorado.org.br wrote:
> From: Matheus Ferst
>
> The definition of struct Int128 is currently independent of the host
> endianness, causing different results when using the member s128 of
> union ppc_vsr_t in big-endian builds with CONFIG_INT128 or
>
On Tue, Aug 24, 2021 at 01:30:20PM -0300, Daniel Henrique Barboza wrote:
> This patch adds the barebones of the PMU logic by enabling cycle
> counting, done via the performance monitor counter 6. The overall logic
> goes as follows:
>
> - a helper is added to control the PMU state on each MMCR0
On Tue, Aug 24, 2021 at 01:30:23PM -0300, Daniel Henrique Barboza wrote:
> PM_RUN_INST_CMPL, instructions completed with the run latch set, is
> the architected PowerISA v3.1 event defined with PMC4SEL = 0xFA.
>
> Implement it by checking for the CTRL RUN bit before incrementing the
> counter.
>
Now that we have "acpi-pci-hotplug-with-bridge-support" PIIX4 PM property being
used for both q35 and i440fx machine types, it is better that we defined this
property string at a single place within a header file like other PIIX4
properties. We can then use this single definition at all the places
On Tue, Aug 24, 2021 at 11:27:19AM -0300, Luis Pires wrote:
> From: Fernando Valle
>
> Signed-off-by: Fernando Valle
> Signed-off-by: Luis Pires
Reviewed-by: David Gibson
> ---
> target/ppc/translate.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/target/ppc/translate.c
On Tue, Aug 24, 2021 at 09:48:35PM -0300, Daniel Henrique Barboza wrote:
> MEM_UNPLUG_ERROR is deprecated since the introduction of
> DEVICE_UNPLUG_GUEST_ERROR. Keep emitting both while the deprecation of
> MEM_UNPLUG_ERROR is pending.
>
> CC: Michael S. Tsirkin
> CC: Igor Mammedov
>
On Tue, Aug 24, 2021 at 01:30:19PM -0300, Daniel Henrique Barboza wrote:
> From: Gustavo Romero
>
> Similar to the previous patch, user write on some PowerPC
> PMU regs, in this case, MMCR0, is limited. Create a new
> function to handle that.
Ok.. ok, this fixes my concern on the previous
On Tue, Aug 24, 2021 at 01:30:18PM -0300, Daniel Henrique Barboza wrote:
> From: Gustavo Romero
>
> This patch adds handling of UMMCR0 and UMMCR2 user read which,
> according to PowerISA 3.1, has some bits ommited to the
Nit: One 'm' in "omited".
> userspace.
>
> CC: Gustavo Romero
>
On Tue, Aug 24, 2021 at 01:30:22PM -0300, Daniel Henrique Barboza wrote:
> The PMU is already counting cycles by calculating time elapsed in
> nanoseconds. Counting instructions is a different matter and requires
> another approach.
>
> This patch adds the capability of counting completed
On Tue, Aug 24, 2021 at 09:48:29PM -0300, Daniel Henrique Barboza wrote:
> qapi_event_send_mem_unplug_error() deals with @device being NULL by
> replacing it with an empty string ("") when emitting the event. Aside
> from the fact that this behavior (qapi visitor mapping NULL pointer to
> "") can
. Add sid-map property to store non PCI/PCIe devices SID
. Create IOMMU memory regions for non PCI/PCIe devices based on their SID
. Update SID getting strategy for PCI/PCIe and non PCI/PCIe devices
Signed-off-by: Li, Chunming
---
hw/arm/smmuv3.c | 46
There is no need to use fresh typecasts to get references to pci device structs
when there is an existing reference to pci device struct. Use existing
reference.
Minor cleanup.
Signed-off-by: Ani Sinha
Reviewed-by: Philippe Mathieu-Daudé
---
hw/acpi/pcihp.c | 6 +++---
1 file changed, 3
On Tue, Aug 24, 2021 at 01:30:21PM -0300, Daniel Henrique Barboza wrote:
> This patch enable all PMCs but PMC5 to count cycles. To do that we
> need to implement MMCR1 bits where the event are stored, retrieve
> them, see if the PMC was configured with a PM_CYC event, and
> calculate cycles if
commit c0e427d6eb5fefc538 ("hw/acpi/ich9: Enable ACPI PCI hot-plug") removed all
uses of find_i440fx() function. This has been replaced by the more generic call
acpi_get_i386_pci_host() which maybe able to find the root bus both for i440fx
machine type as well as for the q35 machine type. There
I have developed an interest in this space and hopefully can lend some
helping hand to Igor and Michael in reviewing simpler patches.
Signed-off-by: Ani Sinha
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Igor Mammedov
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git
Since commit
36b79e3219d ("hw/acpi/Kconfig: Add missing Kconfig dependencies (build error)"),
ACPI_MEMORY_HOTPLUG and ACPI_NVDIMM is implicitly turned on when
ACPI_HW_REDUCED is selected. ACPI_HW_REDUCED is already enabled. No need to
turn on ACPI_MEMORY_HOTPLUG or ACPI_NVDIMM explicitly. This is
On Tue, Aug 24, 2021 at 05:11:03PM -0300, matheus.fe...@eldorado.org.br wrote:
> From: Matheus Ferst
>
> The definition of struct Int128 is currently independent of the host
> endianness, causing different results when using the member s128 of
> union ppc_vsr_t in big-endian builds with
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