We want to use the OBJECT_DECLARE_SIMPLE_TYPE() macro to QOM'ify
this device in the next commit. To make its review simpler, as a
first step move the LASIPS2State and LASIPS2Port declarations to
'hw/input/lasips2.h'
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/input/lasips2.h | 18
Am 20.09.21 um 08:23 schrieb Philippe Mathieu-Daudé:
The following commits (released in v6.0.0) made raised the
quality of the TCI backend to the other TCG architectures,
thus is is not considerated experimental anymore:
- c6fbea47664..2f74f45e32b
- dc09f047edd..9e9acb7b348
-
commit d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction
bridges")
added ACPI hotplug descriptions for cold plugged bridges for functions other
than 0. For all other devices, the ACPI hotplug descriptions are limited to
function 0 only. This change adds unit tests for this
This patchset adds a unit test to exercize acpi hotplug support for
multifunction
bridges on q35 machines. This support was added with the commit:
d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction bridges")
changelist:
v1 : initial RFC patch.
v2: incorporated some of the
We are adding a new unit test to cover the acpi hotplug support in q35 for
multi-function bridges. This test uses a new table DSDT.multi-bridge.
We need to allow changes in DSDT acpi table for addition of this new
unit test.
Signed-off-by: Ani Sinha
---
tests/data/acpi/q35/DSDT.multi-bridge
This patchset adds a unit test to exercize acpi hotplug support for
multifunction
bridges on q35 machines. This support was added with the commit:
d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction bridges")
changelist:
v1 : initial RFC patch.
v2: incorporated some of the
On Fri, Sep 17, 2021 at 08:47:49AM -0300, matheus.fe...@eldorado.org.br wrote:
> From: Matheus Ferst
>
> While working on FreeBSD radix support, Leandro Lupori (CC'ed) noticed
> that the latest build still fails in KVM but works in TCG[1]. This
> difference occurs because the current
From: Joel Stanley
This contains some hardcoded register values that were obtained from the
hardware after reading the temperature.
It does enough to test the Linux kernel driver. The FIFO mode, IRQs and
operation modes other than the default as used by Linux are not modelled.
Signed-off-by:
From: Andrew Jeffery
The logic in the handling for the control register required toggling the
enable state for writes to stick. Rework the condition chain to allow
sequential writes that do not update the enable state.
Fixes: 854123bf8d4b ("wdt: Add Aspeed watchdog device model")
Signed-off-by:
From: Peter Delevoryas
This adds a new machine type "fuji-bmc" based on the following device tree:
https://github.com/torvalds/linux/blob/40cb6373b46/arch/arm/boot/dts/aspeed-bmc-facebook-fuji.dts
Most of the i2c devices are not there, they're added here:
On Tue, 14 Sep 2021 15:20:00 +0100
Jean-Philippe Brucker wrote:
> Allow instantiating a virtio-iommu device by adding an ACPI Virtual I/O
> Translation table (VIOT), which describes the relation between the
> virtio-iommu and the endpoints it manages.
>
> Add a hotplug handler for virtio-iommu
From: Joel Stanley
Witherspoon uses the DPS310 as a temperature sensor. Rainier uses it as
a temperature and humidity sensor.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Message-Id: <20210629142336.750058-5-...@kaod.org>
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 4
On Tue, 14 Sep 2021 15:20:05 +0100
Jean-Philippe Brucker wrote:
> The VIOT table generated for the q35 test is:
I'd squash this into previous patch
> [000h 4]Signature : "VIOT"[Virtual I/O
> Translation Table]
> [004h 0004 4] Table Length :
From: Peter Delevoryas
When you run QEMU with an Aspeed machine and a single serial device
using stdio like this:
qemu -machine ast2600-evb -drive ... -serial stdio
The guest OS can read and write to the UART5 registers at 0x1E784000 and
it will receive from stdin and write to stdout. The
On Tue, 14 Sep 2021 15:19:56 +0100
Jean-Philippe Brucker wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI
On Tue, 14 Sep 2021 15:20:02 +0100
Jean-Philippe Brucker wrote:
> Add two test cases for VIOT, one on the q35 machine and the other on
> virt. To test complex topologies the q35 test has two PCIe buses that
> bypass the IOMMU (and are therefore not described by VIOT), and two
> buses that are
On Thu, 16 Sept 2021 at 14:58, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit 57b6f58c1d0df757c9311496c32d502925056894:
>
> Merge remote-tracking branch 'remotes/hreitz/tags/pull-block-2021-09-15'
> into staging (2021-09-15
On Fri, 17 Sep 2021 18:27:58 -0300
Daniel Henrique Barboza wrote:
> The next preliminary step to introduce NUMA FORM2 affinity is to make
> the existing code independent of FORM1 macros and values, i.e.
> MAX_DISTANCE_REF_POINTS, NUMA_ASSOC_SIZE and VCPU_ASSOC_SIZE. This patch
> accomplishes
Eric Blake writes:
> On Wed, Sep 15, 2021 at 09:24:21PM +0200, Markus Armbruster wrote:
>> The next commit will add feature flags to enum members. There's a
>> problem, though: query-qmp-schema shows an enum type's members as an
>> array of member names (SchemaInfoEnum member @values). If it
CC'ing qemu-block list
On Sat, Sep 18, 2021 at 12:06:58PM +0800, lishan wrote:
> AIO read/write. The size of iocb->aio_nbytes in the kernel cannot exceed
> UIO_MAXIOV = 1024.
> max_segments read from the block device layer may be greater than UIO_MAXIOV,
> this causes the ioq_submit interface to
On Mon, 20 Sept 2021 at 03:48, Richard Henderson
wrote:
>
> For A64, any input to an indirect branch can cause this.
>
> For A32, many indirect branch paths force the branch to be aligned,
> but BXWritePC does not. This includes the BX instruction but also
> other interworking changes to PC.
Peter Krempa writes:
> On Wed, Sep 15, 2021 at 21:24:21 +0200, Markus Armbruster wrote:
>> The next commit will add feature flags to enum members. There's a
>> problem, though: query-qmp-schema shows an enum type's members as an
>> array of member names (SchemaInfoEnum member @values). If it
Signed-off-by: Cédric Le Goater
---
target/ppc/excp_helper.c | 38 ++
target/ppc/trace-events | 8
2 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index d7e32ee107e0..b7d176792098
The current way the mask is built can overflow with a 64-bit decrementer.
Use sextract64() to extract the signed values and remove the logic to
handle negative values which has become useless.
Cc: Luis Fernando Fujita Pires
Fixes: a8dafa525181 ("target/ppc: Implement large decrementer support
The following commits (released in v6.0.0) made raised the
quality of the TCI backend to the other TCG architectures,
thus is is not considerated experimental anymore:
- c6fbea47664..2f74f45e32b
- dc09f047edd..9e9acb7b348
- b6139eb0578..2fc6f16ca5e
- dbcbda2cd84..5e8892db93f
Signed-off-by:
Artist is another device, this one is the Lasi PS/2.
Rename the functions accordingly.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/input/lasips2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/input/lasips2.c b/hw/input/lasips2.c
index e7faf24058b..68d741d3421
Slowly nuking non-QOM devices: Lasi PS/2's turn.
Philippe Mathieu-Daudé (3):
hw/input/lasips2: Fix typos in function names
hw/input/lasips2: Move LASIPS2State declaration to
'hw/input/lasips2.h'
hw/input/lasips2: QOM'ify the Lasi PS/2
include/hw/input/lasips2.h | 31 --
Vladimir Sementsov-Ogievskiy writes:
> Add command that can add and remove filters.
>
> Key points of functionality:
>
> What the command does is simply replace some BdrvChild.bs by some other
> nodes. The tricky thing is selecting there BdrvChild objects.
> To be able to select any kind of
We are adding a new unit test to cover the acpi hotplug support in q35 for
multi-function bridges. This test uses a new table DSDT.multi-bridge.
We need to allow changes in DSDT acpi table for addition of this new
unit test.
Signed-off-by: Ani Sinha
---
tests/data/acpi/q35/DSDT.multi-bridge
On Mon, 20 Sep 2021, Igor Mammedov wrote:
> > > > > diff --git a/tests/qtest/bios-tables-test.c
> > > > > b/tests/qtest/bios-tables-test.c
> > > > > index 51d3a4e239..c92b70e8b8 100644
> > > > > --- a/tests/qtest/bios-tables-test.c
> > > > > +++ b/tests/qtest/bios-tables-test.c
> > > > > @@
On Mon, Sep 20, 2021 at 08:12:02AM +0200, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater
So.. all the functions here are called *set_irq*, but you've named the
tracepoints *irq_set*. It's not a big deal, but it seems like it
would be less confusing if you flipped that around to match
On 9/20/21 09:34, David Gibson wrote:
On Mon, Sep 20, 2021 at 08:12:02AM +0200, Cédric Le Goater wrote:
Signed-off-by: Cédric Le Goater
So.. all the functions here are called *set_irq*, but you've named the
tracepoints *irq_set*.
Yes. I did that on purpose to identify easily the PPC IRQ
Daniel P. Berrangé writes:
> The file already covers writing new style HMP commands, in addition to
> the QMP commands, so it deserves a more general name.
>
> Signed-off-by: Daniel P. Berrangé
> ---
> docs/devel/index.rst| 2 +-
>
From: Joel Stanley
This is the latest revision of the ASPEED 2600 SoC. As there is no
need to model multiple revisions of the same SoC for the moment,
update the SCU AST2600 to model the A3 revision instead of the A1 and
adapt the AST2600 SoC and machines.
Reset values are taken from v8 of the
From: Guenter Roeck
According to its dts file in the Linux kernel, we need mac0 and mac1 enabled
instead of mac1 and mac2. Also, g220a is based on aspeed-g5 (ast2500) which
doesn't even have the third interface.
Signed-off-by: Guenter Roeck
Reviewed-by: Cédric Le Goater
Message-Id:
From: Joel Stanley
There's no need to define the registers relative to the 0x800 offset
where the controller is mapped, as the device is instantiated as it's
own model at the correct memory address.
Simplify the defines and remove the offset to save future confusion.
Signed-off-by: Joel
From: Andrew Jeffery
While some of the critical fields remain the same, there is variation in
the definition of the control register across the SoC generations.
Reserved regions are adjusted, while in other cases the mutability or
behaviour of fields change.
Introduce a callback to sanitize the
On Sun, 19 Sep 2021 08:29:51 +0530 (IST)
Ani Sinha wrote:
> On Sun, 19 Sep 2021, Ani Sinha wrote:
>
> >
> >
> > On Fri, 17 Sep 2021, Igor Mammedov wrote:
> >
> > > On Fri, 6 Aug 2021 23:16:42 +0530
> > > Ani Sinha wrote:
> > >
> > > > commit d7346e614f4ec ("acpi: x86: pcihp: add support
Vladimir Sementsov-Ogievskiy writes:
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> softmmu/qdev-monitor.c | 42 ++
> 1 file changed, 42 insertions(+)
>
> diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
> index 0117989009..2e149aa9b8
If an unknown pin of the IRQ controller is raised, something is very
wrong in the QEMU model. It is better to abort.
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc.c | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index
Hello,
This series converts custom PPC debug messages in trace events. Last
patch is fix for the decrementer when using a 64-bit width.
Thanks,
C.
Cédric Le Goater (4):
target/ppc: Convert debug to trace events (exceptions)
target/ppc: Replace debug messages by asserts for unknown IRQ
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc.c| 169
hw/ppc/trace-events | 22 +-
2 files changed, 82 insertions(+), 109 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index a327206a0a1e..b813ef732ec1 100644
--- a/hw/ppc/ppc.c
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/input/lasips2.h | 17 +
hw/hppa/lasi.c | 10 +-
hw/input/lasips2.c | 38 --
3 files changed, 50 insertions(+), 15 deletions(-)
diff --git
We added a new unit test for testing acpi hotplug on multifunction bridges in
q35 machines. Here, we update the DSDT table gloden master blob for this unit
test.
Signed-off-by: Ani Sinha
---
tests/data/acpi/q35/DSDT.multi-bridge | Bin 0 -> 8435 bytes
commit d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction
bridges")
added ACPI hotplug descriptions for cold plugged bridges for functions other
than 0. For all other devices, the ACPI hotplug descriptions are limited to
function 0 only. This change adds unit tests for this
We added a new unit test for testing acpi hotplug on multifunction bridges in
q35 machines. Here, we update the DSDT table gloden master blob for this unit
test.
Following is the ASL diff between the original DSDT table and the modified DSDT
table due to the unit test:
@@ -5,13 +5,13 @@
*
*
Thank a lot Peter and Philippe
On 9/19/21 20:46, Philippe Mathieu-Daudé wrote:
> In the "infinite loop exception" case, '-d int' might be sufficient,
> before using 'exec/cpu', since you'll see the exception raise over
> and over.
I tried -d int and see that a lot of exceptions are rising in
On Mon, Sep 20, 2021 at 08:12:01AM +0200, Cédric Le Goater wrote:
> If an unknown pin of the IRQ controller is raised, something is very
> wrong in the QEMU model. It is better to abort.
>
> Signed-off-by: Cédric Le Goater
Applied to ppc-for-6.2, thanks.
> ---
> hw/ppc/ppc.c | 24
On Mon, Sep 20, 2021 at 08:12:03AM +0200, Cédric Le Goater wrote:
> The current way the mask is built can overflow with a 64-bit decrementer.
> Use sextract64() to extract the signed values and remove the logic to
> handle negative values which has become useless.
>
> Cc: Luis Fernando Fujita
On Mon, Sep 20, 2021 at 08:12:00AM +0200, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater
Applied to ppc-for-6.2, thanks.
> ---
> target/ppc/excp_helper.c | 38 ++
> target/ppc/trace-events | 8
> 2 files changed, 18 insertions(+), 28
Daniel P. Berrangé writes:
> Traditionally we have required that newly added QMP commands will model
> any returned data using fine grained QAPI types. This is good for
> commands that are intended to be consumed by machines, where clear data
> representation is very important. Commands that
Daniel P. Berrangé writes:
> The new headings reflect the intended structure of the document and will
> better suit additions that follow.
>
> Signed-off-by: Daniel P. Berrangé
> ---
> docs/devel/writing-monitor-commands.rst | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>
On Fri, 6 Aug 2021 16:18:09 -0400
"Annie.li" wrote:
> Hello Igor,
>
> This is an old patch, but it does what we need.
> I am getting a little bit lost about not implementing fixed hardware
> sleep button, can you please clarify? thank you!
>
> On 7/20/2017 10:59 AM, Igor Mammedov wrote:
> > On
Daniel P. Berrangé writes:
> This illustrates how to add a QMP command returning unstructured text,
> following the guidelines added in the previous patch. The example uses
> a simplified version of 'info roms'.
>
> Signed-off-by: Daniel P. Berrangé
> ---
>
On Tue, 14 Sep 2021 15:19:56 +0100
Jean-Philippe Brucker wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI
-aspeed-20210920
for you to fetch changes up to febbe308bf9477767ca92e8ed5f265b0001fcef9:
hw/arm/aspeed: Add Fuji machine type (2021-09-20 08:50:59 +0200)
Aspeed patches :
* MAC enablement fixes (Guenter)
* Watchdog and pca9552
On Mon, 20 Sept 2021 at 02:29, Richard Henderson
wrote:
>
> On 8/26/21 6:45 AM, Peter Maydell wrote:
> > I don't think you should need to special case AArch64 vs AArch32 like this;
> > you can do
> > env->exception.vaddress = pc;
> > env->exception.fsr = the_fsr;
> >
From: Joel Stanley
These are the devices documented by the Rainier device tree. With this
we can see the guest discovering the multiplexers and probing the eeprom
devices:
i2c i2c-2: Added multiplexed i2c bus 16
i2c i2c-2: Added multiplexed i2c bus 17
i2c i2c-2: Added multiplexed i2c bus 18
Daniel P. Berrangé writes:
> We no longer wish to have commands implemented in HMP only. All commands
> should start with a QMP implementation and the HMP merely be a shim
> around this. To reduce the burden of implementing QMP commands where
> there is low expectation of machine usage,
From: Andrew Jeffery
There was a bit of a thinko in the state calculation where every odd pin
in was reported in e.g. "pwm0" mode rather than "off". This was the
result of an incorrect bit shift for the 2-bit field representing each
LED state.
Fixes: a90d8f84674d ("misc/pca9552: Add qom set and
From: Peter Delevoryas
UART5 is typically used as the default debug UART on the AST2600, but
UART1 is also designed to be a debug UART. All the AST2600 UART's have
semi-configurable clock rates through registers in the System Control
Unit (SCU), but only UART5 works out of the box with
From: Guenter Roeck
Commit 7582591ae7 ("aspeed: Support AST2600A1 silicon revision") switched
the silicon revision for AST2600 to revision A1. On revision A1, the first
Ethernet interface is operational. Enable it.
Signed-off-by: Guenter Roeck
Reviewed-by: Joel Stanley
Reviewed-by: Cédric Le
On Tue, 14 Sep 2021 15:19:59 +0100
Jean-Philippe Brucker wrote:
> We do not support instantiating multiple IOMMUs. Before adding a
> virtio-iommu, check that no other IOMMU is present. This will detect
> both "iommu=smmuv3" machine parameter and another virtio-iommu instance.
>
> Fixes:
On Mon, 20 Sept 2021 at 06:07, David Gibson wrote:
> On Sat, Sep 18, 2021 at 01:01:35PM -0700, Richard Henderson wrote:
> > We dropped host support for sparcv8 (true 32-bit) a long time ago.
> > We only support sparcv9 in ilp32 (sparcv8plus) and lp64 (sparc64).
>
> We really need to update
>
From: Joel Stanley
There are two GPIO controllers in the ast2600; one is 3.3V and the other
is 1.8V.
Signed-off-by: Joel Stanley
Reviewed-by: Rashmica Gupta
Reviewed-by: Cédric Le Goater
Message-Id: <20210713065854.134634-4-j...@jms.id.au>
Signed-off-by: Cédric Le Goater
---
Am 18.09.2021 um 09:33 hat lishan geschrieben:
> AIO read/write. The size of iocb->aio_nbytes in the kernel cannot exceed
> UIO_MAXIOV = 1024.
> max_segments read from the block device layer may be greater than UIO_MAXIOV,
> this causes the ioq_submit interface to return a -22(-EINVAL) error
On Thu, 16 Sept 2021 at 17:08, Philippe Mathieu-Daudé wrote:
>
> On 9/16/21 5:54 PM, Alexander Graf wrote:
> > Now that we have working system register sync, we push more target CPU
> > properties into the virtual machine. That might be useful in some
> > situations, but is not the typical case
On Fri, 17 Sep 2021 18:27:59 -0300
Daniel Henrique Barboza wrote:
> Introducing a new NUMA affinity, FORM2, requires a new mechanism to
> switch between affinity modes after CAS. Also, we want FORM2 data
> structures and functions to be completely separated from the existing
> FORM1 code,
On Fri, 17 Sep 2021 18:28:00 -0300
Daniel Henrique Barboza wrote:
> FORM2 NUMA affinity is prepared to deal with empty (memory/cpu less)
> NUMA nodes. This is used by the DAX KMEM driver to locate a PAPR SCM
> device that has a different latency than the original NUMA node from the
> regular
Am 01.09.2021 um 17:16 hat Hanna Reitz geschrieben:
> From: Vladimir Sementsov-Ogievskiy
>
> Finally, copy-before-write gets own .bdrv_open and .bdrv_close
> handlers, block_init() call and becomes available through bdrv_open().
>
> To achieve this:
>
> - cbw_init gets unused flags argument
On Mon, Sep 20, 2021 at 11:08:59 +0200, Markus Armbruster wrote:
> Peter Krempa writes:
>
> > On Wed, Sep 15, 2021 at 21:24:21 +0200, Markus Armbruster wrote:
> >> The next commit will add feature flags to enum members. There's a
> >> problem, though: query-qmp-schema shows an enum type's
Thanks a lot for reviewing!
20.09.2021 09:44, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
Add command that can add and remove filters.
Key points of functionality:
What the command does is simply replace some BdrvChild.bs by some other
nodes. The tricky thing is selecting
Yeah Sebastian, a new ticket (with a reference to this bug as being
similar) would be preferred.
** Changed in: qemu (Ubuntu)
Assignee: Christian Ehrhardt (paelzer) => (unassigned)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to
On Thu, 16 Sept 2021 at 16:30, Richard Henderson
wrote:
>
> The following changes since commit 57b6f58c1d0df757c9311496c32d502925056894:
>
> Merge remote-tracking branch 'remotes/hreitz/tags/pull-block-2021-09-15'
> into staging (2021-09-15 18:55:59 +0100)
>
> are available in the Git
20.09.2021 12:41, Kevin Wolf wrote:
Am 01.09.2021 um 17:16 hat Hanna Reitz geschrieben:
From: Vladimir Sementsov-Ogievskiy
Finally, copy-before-write gets own .bdrv_open and .bdrv_close
handlers, block_init() call and becomes available through bdrv_open().
To achieve this:
- cbw_init gets
On Thu, 16 Sept 2021 at 16:54, Alexander Graf wrote:
>
> Now that Apple Silicon is widely available, people are obviously excited
> to try and run virtualized workloads on them, such as Linux and Windows.
>
> This patch set implements a fully functional version to get the ball
> going on that.
On 9/20/21 12:07, Peter Maydell wrote:
> On Thu, 16 Sept 2021 at 16:30, Richard Henderson
> wrote:
>>
>> The following changes since commit 57b6f58c1d0df757c9311496c32d502925056894:
>>
>> Merge remote-tracking branch 'remotes/hreitz/tags/pull-block-2021-09-15'
>> into staging (2021-09-15
On Thu, 5 Aug 2021 18:30:30 -0400
Eric DeVolder wrote:
> Following the guidelines in tests/qtest/bios-tables-test.c, this
> change adds empty placeholder files per step 1 for the new ERST
> table, and excludes resulting changed files in bios-tables-test-allowed-diff.h
> per step 2.
>
I'd move
On Thu, 16 Sept 2021 at 22:49, Alistair Francis
wrote:
>
> From: Alistair Francis
>
> The following changes since commit d1fe59377bbbf91dfded1f08ffe3c636e9db8dc0:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/trivial-branch-for-6.2-pull-request' into staging
> (2021-09-16 16:02:31
On Mon, 20 Sept 2021 at 14:38, Kevin Townsend wrote:
>
> Hi Peter,
>
> Thanks for the review, and sorry for the slow reply, just getting back from
> holidays myself.
>
> On Thu, 26 Aug 2021 at 17:39, Peter Maydell wrote:
>>
>>
>> So if I'm reading the datasheet correctly, the LM303DLHC is
>>
On 9/20/21 15:14, Philippe Mathieu-Daudé wrote:
> On 9/20/21 12:07, Peter Maydell wrote:
>> On Thu, 16 Sept 2021 at 16:30, Richard Henderson
>> wrote:
>>>
>>> The following changes since commit 57b6f58c1d0df757c9311496c32d502925056894:
>>>
>>> Merge remote-tracking branch
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target-con-set.h | 17 +
tcg/loongarch/tcg-target.c.inc | 15 +++
2 files changed, 32 insertions(+)
create mode 100644 tcg/loongarch/tcg-target-con-set.h
diff --git a/tcg/loongarch/tcg-target-con-set.h
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target-con-set.h | 2 +
tcg/loongarch/tcg-target.c.inc | 69 ++
2 files changed, 71 insertions(+)
diff --git a/tcg/loongarch/tcg-target-con-set.h
b/tcg/loongarch/tcg-target-con-set.h
index 7e459490ea..385f503552
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-insn-defs.c.inc | 1080 +
1 file changed, 1080 insertions(+)
create mode 100644 tcg/loongarch/tcg-insn-defs.c.inc
diff --git a/tcg/loongarch/tcg-insn-defs.c.inc
b/tcg/loongarch/tcg-insn-defs.c.inc
new file mode
When not predicating, implement the MVE bitwise logical insns
directly using TCG vector operations.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-id: 20210913095440.13462-5-peter.mayd...@linaro.org
---
target/arm/translate-mve.c | 51
Move an ifndef CONFIG_USER_ONLY code block up in arm_cpu_reset() so
it can be merged with another earlier one.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20210914120725.24992-4-peter.mayd...@linaro.org
---
target/arm/cpu.c | 22 ++
1 file
Optimize the MVE VNEG and VABS insns by using TCG
vector ops when possible.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-id: 20210913095440.13462-7-peter.mayd...@linaro.org
---
target/arm/translate-mve.c | 32
On 9/20/21 1:04 AM, WANG Xuerui wrote:
I wrote the initial code, so I should maintain it of course.
Signed-off-by: WANG Xuerui
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
Reviewed-by: Richard Henderson
r~
On Fri, 17 Sep 2021 18:28:01 -0300
Daniel Henrique Barboza wrote:
> The main feature of FORM2 affinity support is the separation of NUMA
> distances from ibm,associativity information. This allows for a more
> flexible and straightforward NUMA distance assignment without relying on
> complex
在 2021/8/30 7:11, Hyman 写道:
ping - hi, what would you think about this patchset ? :)
ping again, just make sure this patchset not be ignored,
any advice or comment are welcome. :)
在 2021/6/30 0:01, huang...@chinatelecom.cn 写道:
From: Hyman Huang(黄勇)
v12
- adjust the order of calculating
On Mon, Sep 20, 2021 at 10:59 AM Peter Maydell wrote:
>
> On Tue, 3 Aug 2021 at 20:35, Cleber Rosa wrote:
> >
> > This is a reply to an issue[1] reported by Peter, and while at it, an
> > update of the MAINTAINERS entry so other people now the status and
> > where to go for help with regards to
On 9/20/21 1:04 AM, WANG Xuerui wrote:
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-insn-defs.c.inc | 1080 +
1 file changed, 1080 insertions(+)
create mode 100644 tcg/loongarch/tcg-insn-defs.c.inc
diff --git a/tcg/loongarch/tcg-insn-defs.c.inc
Hi; I'm trying to bisect a problem that's causing an acceptance
test failure, but docs/devel/testing.rst doesn't have any info about
how to run just one acceptance test rather than the whole lot
via 'make check-acceptance'. Is this possible?
(It's pretty slow to have to run the whole thing,
The PL031 currently is not able to report guest RTC change to the QMP
monitor as opposed to mc146818 or spapr RTCs. This patch adds the call
to qapi_event_send_rtc_change() when the Load Register is written. The
value which is reported corresponds to the difference between the guest
reference time
On 9/20/21 3:07 AM, Peter Maydell wrote:
This seems to result in a failure on the s390x all-linux-static
CI job:
https://gitlab.com/qemu-project/qemu/-/jobs/1604251543
due to a core dump running the 'trap' test.
Curious. I can't reproduce this on s390x.ci.qemu.org manually.
r~
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target-con-set.h | 1 +
tcg/loongarch/tcg-target.c.inc | 21 +
2 files changed, 22 insertions(+)
diff --git a/tcg/loongarch/tcg-target-con-set.h
b/tcg/loongarch/tcg-target-con-set.h
index 385f503552..b0751c4bb0 100644
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target-con-set.h | 1 +
tcg/loongarch/tcg-target.c.inc | 82 ++
2 files changed, 83 insertions(+)
diff --git a/tcg/loongarch/tcg-target-con-set.h
b/tcg/loongarch/tcg-target-con-set.h
index 5cc4407367..7e459490ea
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target-con-set.h | 2 ++
tcg/loongarch/tcg-target.c.inc | 47 ++
2 files changed, 49 insertions(+)
diff --git a/tcg/loongarch/tcg-target-con-set.h
b/tcg/loongarch/tcg-target-con-set.h
index 8630d1ee6e..58b5c487e2
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target-con-set.h | 1 +
tcg/loongarch/tcg-target.c.inc | 31 ++
2 files changed, 32 insertions(+)
diff --git a/tcg/loongarch/tcg-target-con-set.h
b/tcg/loongarch/tcg-target-con-set.h
index b0751c4bb0..417c97549a
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target.c.inc | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tcg/loongarch/tcg-target.c.inc b/tcg/loongarch/tcg-target.c.inc
index e5356bdaf8..d617b833e5 100644
--- a/tcg/loongarch/tcg-target.c.inc
+++
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