Re: [PATCH v5 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 88 tcg/loongarch64/tcg-target.h | 16 ++--- 3 files changed, 98

Re: [PATCH v5 11/30] tcg/loongarch64: Implement sign-/zero-extension ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 82 tcg/loongarch64/tcg-target.h | 24 3 files changed, 95

Re: [PATCH v5 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 65 tcg/loongarch64/tcg-target.h | 16 +++ 3 files changed, 74

Re: [PATCH 06/14] bsd-user: move TARGET_MC_GET_CLEAR_RET to target_os_signal.h

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: Move TARGET_MC_GET_CLEAR_RET to freebsd/target_os_signal.h since it's FreeBSD-wide. "architecture agnostic (on FreeBSD)" instead? Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_signal.h | 3 +++ bsd-user/i386/target_arch_signal.h | 2 --

Re: [PATCH 07/14] bsd-user/target_os_elf.h: Remove fallback ELF_HWCAP and reorder

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: All architectures have a ELF_HWCAP, so remove the fallback ifdef. Place ELF_HWCAP in the same order as on native FreeBSD. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_elf.h | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-)

Re: [PATCH v2 9/9] bsd-user/mmap.c: assert that target_mprotect cannot fail

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 06:56, Warner Losh wrote: Similar to the equivalent linux-user change 86abac06c14. All error conditions that target_mprotect checks are also checked by target_mmap. EACCESS cannot happen because we are just removing PROT_WRITE. ENOMEM should not happen because we are modifying a

Re: [PATCH v2 4/9] bsd-user/mmap.c: mmap return ENOMEM on overflow

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 06:56, Warner Losh wrote: mmap should return ENOMEM on len overflow rather than EINVAL. Return EINVAL when len == 0 and ENOMEM when the rounded to a page length is 0. Found by make check-tcg. Signed-off-by: Warner Losh --- bsd-user/mmap.c | 9 - 1 file changed, 8

[PATCH v7 07/40] accel/whpx: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Implement WHPX has_work() handler in AccelOpsClass and remove it from cpu_thread_is_idle() since cpu_has_work() is already called. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c| 4 +--- target/i386/whpx/whpx-accel-ops.c | 6 ++

[PATCH v7 01/40] accel: Simplify qemu_init_vcpu()

2021-09-25 Thread Philippe Mathieu-Daudé
cpus_register_accel() already checks for ops->create_vcpu_thread being non-NULL, so it is pointless to re-check for it in qemu_init_vcpu(). Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/softmmu/cpus.c

[PATCH v7 04/40] hw/core: Move cpu_common_has_work() to cpu_has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
cpu_class_init() always register cpu_common_has_work() as CPUClass::has_work() handler, so the assertion check in cpu_has_work() is pointless. Since cpu_common_has_work() simply returns 'false', we can inline it in cpu_has_work(), improving the function readability. Suggested-by: Richard

[PATCH v7 23/40] target/i386: Restrict has_work() handler to sysemu and TCG

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.c | 6 -- target/i386/tcg/tcg-cpu.c | 8 +++- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index

[PATCH v7 22/40] target/hppa: Restrict has_work() handler to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 89cba9d7a2c..000c2e7793a 100644 --- a/target/hppa/cpu.c

[PULL 05/25] qapi: Convert simple union TpmTypeOptions to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 16/25] tests/qapi-schema: Simple union UserDefListUnion is now unused, drop

2021-09-25 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210917143134.412106-17-arm...@redhat.com> --- tests/qapi-schema/qapi-schema-test.json | 17 --- tests/qapi-schema/qapi-schema-test.out | 64 - 2 files changed, 81 deletions(-) diff --git

Re: [PATCH v5 17/30] tcg/loongarch64: Implement add/sub ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 38

Re: [PATCH v5 19/30] tcg/loongarch64: Implement br/brcond ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 53 2 files changed, 54 insertions(+) diff --git

Re: [PATCH v5 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- accel/tcg/user-exec.c | 73 +++ 1 file changed, 73 insertions(+) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index

Re: [PATCH 1/1] hw: aspeed_gpio: Fix GPIO array indexing

2021-09-25 Thread Philippe Mathieu-Daudé
Hi Peter, On 9/24/21 08:19, p...@fb.com wrote: From: Peter Delevoryas The gpio array is declared as a dense array: ... qemu_irq gpios[ASPEED_GPIO_NR_PINS]; (AST2500 has 228, AST2400 has 216, AST2600 has 208) However, this array is used like a matrix of GPIO sets (e.g.

[PATCH v7 08/40] accel/hvf: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Since there is no specific HVF handling for cpu_has_work() in cpu_thread_is_idle(), implement HVF has_work() handler as a simple 'return false' code. Signed-off-by: Philippe Mathieu-Daudé --- accel/hvf/hvf-accel-ops.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH v7 10/40] accel/hax: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Since there is no specific HAX handling for cpu_has_work() in cpu_thread_is_idle(), implement HAX has_work() handler as a simple 'return false' code. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hax/hax-accel-ops.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PULL 21/25] qapi: Drop simple unions

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. The previous commits eliminated simple union from the

[PULL 17/25] tests/qapi-schema: Rewrite simple union TestIfUnion to be flat

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, rewrite TestIfUnion to be

[PULL 04/25] qapi: Convert simple union InputEvent to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 08/25] qapi: Convert simple union SocketAddressLegacy to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 07/25] qapi: Convert simple union ChardevBackend to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

Re: [PULL 00/25] QAPI patches patches for 2021-09-25

2021-09-25 Thread Peter Maydell
On Sat, 25 Sept 2021 at 07:25, Markus Armbruster wrote: > > The following changes since commit 11a11998460ed84d9a127c025f50f7234e5a483f: > > Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210921' into > staging (2021-09-24 13:21:18 -0400) > > are available in the Git repository at:

Re: [PATCH v5 08/30] tcg/loongarch64: Implement the memory barrier op

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 32 1 file changed, 32 insertions(+) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v5 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 109 +++ 1 file changed, 109 insertions(+) +/* Loads a 32-bit immediate into rd, sign-extended. */ +static void

Re: [PATCH 03/14] bsd-user: TARGET_RESET define is unused, remove it

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: Signed-off-by: Warner Losh --- bsd-user/i386/target_arch_cpu.h | 2 -- bsd-user/x86_64/target_arch_cpu.h | 2 -- 2 files changed, 4 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 13/14] bsd-user: Rename sigqueue to qemu_sigqueue

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: To avoid a name clash with FreeBSD's sigqueue data structure in signalvar.h, rename sigqueue to qemu_sigqueue. This sturcture is currently defined, but unused. Signed-off-by: Warner Losh --- bsd-user/qemu.h | 14 +++--- 1 file changed, 7

Re: [PATCH 12/14] bsd-user/sysarch: Provide a per-arch framework for sysarch syscall

2021-09-25 Thread Philippe Mathieu-Daudé
Hi Warner, On 9/22/21 08:14, Warner Losh wrote: Add the missing glue to pull in do_freebsd_sysarch to call do_freebsd_arch_sysarch. Put it in os-sys.c, which will be used for sysctl and sysarch system calls because they are mostly arch specific. Signed-off-by: Stacey Son Signed-off-by: Warner

Re: [PATCH v3 3/3] tests/Makefile: add AVOCADO_TESTS option to make check-acceptance

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/23/21 18:11, Willian Rampazzo wrote: Add the possibility of running all the tests from a single file, or multiple files, running a single test within a file or multiple tests within multiple files using `make check-acceptance` and the AVOCADO_TESTS environment variable. Suggested-by:

[PATCH v2 2/3] hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container

2021-09-25 Thread Philippe Mathieu-Daudé
Our device have 2 different I/O regions: - a 16550 UART mapped for 32-bit accesses - 13 extra registers Instead of mapping each region on the main bus, introduce a container, map the 2 devices regions on the container, and map the container on the main bus. Before: (qemu) info mtree ...

[PATCH v2 3/3] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART

2021-09-25 Thread Philippe Mathieu-Daudé
- Embed SerialMM in MchpPfSoCMMUartState and QOM-initialize it - Alias SERIAL_MM 'chardev' property on MCHP_PFSOC_UART - Forward SerialMM sysbus IRQ in mchp_pfsoc_mmuart_realize() - Add DeviceReset() method - Add vmstate structure for migration - Register device in 'input' category - Keep

Re: [PATCH v5 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

2021-09-25 Thread Richard Henderson
On 9/25/21 6:05 AM, Philippe Mathieu-Daudé wrote: +    case INDEX_op_shl_i32: +    if (c2) { Why can't we use:    tcg_debug_assert(a2 <= 0x1f);    tcg_out_opc_slli_w(s, a0, a1, a2); ? Because tcg/optimize.c can produce out-of-range values. We have this same

Re: [PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 11:38, Philippe Mathieu-Daudé wrote: CPU has_work() is a per-accelerator handler. This series is organized in 2 parts: - Patches 1-15: Move has_work() from CPUClass to AccelOpsClass - Patches 16-40: Move remainging has_work() to TCGCPUOps target/arm: Explicit v7M cores use

Re: [PATCH v5 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

2021-09-25 Thread Richard Henderson
On 9/24/21 11:51 PM, WANG Xuerui wrote: Hi all, On 9/25/21 01:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Acked-by: Richard Henderson ---   tcg/loongarch64/tcg-insn-defs.c.inc | 979   1 file changed, 979 insertions(+)   create mode 100644

Re: [PATCH v5 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/25/21 16:20, Richard Henderson wrote: On 9/24/21 11:51 PM, WANG Xuerui wrote: Hi all, On 9/25/21 01:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Acked-by: Richard Henderson ---   tcg/loongarch64/tcg-insn-defs.c.inc | 979   1 file changed, 979

Re: [PATCH 1/1] hw: aspeed_gpio: Fix GPIO array indexing

2021-09-25 Thread Peter Delevoryas
> On Sep 25, 2021, at 4:03 AM, Philippe Mathieu-Daudé wrote: > > Hi Peter, > >> On 9/24/21 08:19, p...@fb.com wrote: >> From: Peter Delevoryas >> The gpio array is declared as a dense array: >> ... >> qemu_irq gpios[ASPEED_GPIO_NR_PINS]; >> (AST2500 has 228, AST2400 has 216, AST2600 has 208)

[PULL 03/25] qapi: Convert simple union KeyValue to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 11/25] tests/qapi-schema: Prepare for simple union UserDefListUnion removal

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, simple union

[PULL 24/25] tests/qapi-schema: Use Python OSError instead of outmoded IOError

2021-09-25 Thread Markus Armbruster
https://docs.python.org/3.6/library/exceptions.html has Changed in version 3.3: EnvironmentError, IOError, WindowsError, socket.error, select.error and mmap.error have been merged into OSError, and the constructor may return a subclass. and The following exceptions are kept for

[PULL 20/25] tests/qapi-schema: Purge simple unions from tests

2021-09-25 Thread Markus Armbruster
Drop tests that are specifically about simple unions: * SugaredUnion in doc-good: flat unions are covered by @Object. * union-branch-case and union-clash-branches: branch naming for flat unions is enforced for the tag enum instead, which is covered by enum-member-case and enum-clash-member.

[PULL 15/25] tests/qapi-schema: Wean off UserDefListUnion

2021-09-25 Thread Markus Armbruster
Command boxed-union uses simple union UserDefListUnion to cover unions. Use UserDefFlatUnion instead. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210917143134.412106-16-arm...@redhat.com> --- tests/unit/test-qmp-cmds.c | 2 +-

[PULL 01/25] qapi: Tidy up unusual line breaks

2021-09-25 Thread Markus Armbruster
Break lines between members instead of within members. Signed-off-by: Markus Armbruster Reviewed-by: Marc-André Lureau Message-Id: <20210917143134.412106-2-arm...@redhat.com> --- docs/devel/qapi-code-gen.rst| 12 +-- tests/qapi-schema/doc-good.json | 4 ++--

[PULL 18/25] test-clone-visitor: Wean off __org.qemu_x-Union1

2021-09-25 Thread Markus Armbruster
test_clone_complex3() uses simple union __org.qemu_x-Union1 to cover arrays. Use UserDefOneList instead. Unions are still covered by test_clone_complex1(). Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210917143134.412106-19-arm...@redhat.com> ---

Re: [Qemu-devel] [PULL 18/18] qapi: move RTC_CHANGE to the target schema

2021-09-25 Thread Markus Armbruster
Peter Maydell writes: > On Fri, 24 Sept 2021 at 15:43, Daniel P. Berrangé wrote: >> >> On Fri, Sep 24, 2021 at 03:35:52PM +0200, Markus Armbruster wrote: >> > Peter Maydell writes: >> > > Side side note: the JSON event doesn't seem to contemplate >> > > the possibility that a machine might

Re: [PATCH v5 06/30] tcg/loongarch64: Define the operand constraints

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-str.h | 28 +++ tcg/loongarch64/tcg-target.c.inc | 52 2 files changed, 80 insertions(+) create mode 100644

Re: [PATCH v5 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 91 tcg/loongarch64/tcg-target.h | 4 +- 3 files changed, 94

Re: [PATCH 08/14] bsd-user/target_os_elf: If ELF_HWCAP2 is defined, publish it

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: Some architecutres publish AT_HWCAP2 as well as AT_HWCAP. Those Typo "architectures" architectures will define this in their target_arch_elf.h files. If it is defined, then publish it. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_elf.h |

Re: [PATCH 09/14] bsd-user: Remove used from TaskState

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: The used field of TaskState is write only. Eliminate it. The 'used' field ... Signed-off-by: Warner Losh --- bsd-user/main.c | 1 - bsd-user/qemu.h | 1 - 2 files changed, 2 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v2 2/9] bsd-user/mmap.c: check pread's return value to fix warnings with _FORTIFY_SOURCE

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 06:56, Warner Losh wrote: From: Mikaël Urankar Simmilar to the equivalent linux-user: commit fb7e378cf9c, which added checking to pread's return value. Signed-off-by: Mikaël Urankar Signed-off-by: Warner Losh --- bsd-user/mmap.c | 6 -- 1 file changed, 4 insertions(+), 2

Re: [PULL 8/9] qapi: introduce forwarding visitor

2021-09-25 Thread Paolo Bonzini
El lun., 9 ago. 2021 12:40, Peter Maydell escribió: > Is it right, or is this its "looks like this is returning an error > indication" heuristic misfiring again ? > > My guess is the latter and it's caused by a mismatch > between the prototype of visit_optional() (returns a > status both by

[PULL 06/25] qapi: Convert simple union MemoryDeviceInfo to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 00/25] QAPI patches patches for 2021-09-25

2021-09-25 Thread Markus Armbruster
The following changes since commit 11a11998460ed84d9a127c025f50f7234e5a483f: Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210921' into staging (2021-09-24 13:21:18 -0400) are available in the Git repository at: git://repo.or.cz/qemu/armbru.git tags/pull-qapi-2021-09-25 for

[PULL 10/25] qapi: Convert simple union TransactionAction to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 13/25] test-qobject-output-visitor: Wean off UserDefListUnion

2021-09-25 Thread Markus Armbruster
The test_visitor_out_list_union_FOO() use simple union UserDefListUnion to cover lists of builtin types. Rewrite as test_visitor_out_list_struct(), using struct ArrayStruct and a lot less code. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id:

[PULL 23/25] test-clone-visitor: Correct an accidental rename

2021-09-25 Thread Markus Armbruster
Commit b359f4b203 "tests: Rename UserDefNativeListUnion to UserDefListUnion" renamed test_clone_native_list() to test_clone_list_union(). The function has nothing to do with unions. Rename it to test_clone_list(). Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id:

[PULL 09/25] qapi: Convert simple union ImageInfoSpecific to flat one

2021-09-25 Thread Markus Armbruster
Simple unions predate flat unions. Having both complicates the QAPI schema language and the QAPI generator. We haven't been using simple unions in new code for a long time, because they are less flexible and somewhat awkward on the wire. To prepare for their removal, convert simple union

[PULL 02/25] qapi: Stop enforcing "type name should not end in 'Kind'

2021-09-25 Thread Markus Armbruster
I'm about to convert simple unions to flat unions, then drop simple union support. The conversion involves making the implict enum types explicit. To reduce churn, I'd like to name them exactly like the implicit types they replace. However, these names are reserved for the generator's use.

[PULL 22/25] tests/qapi-schema: Rename flat-union-* test cases to union-*

2021-09-25 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Message-Id: <20210917143134.412106-23-arm...@redhat.com> Reviewed-by: Eric Blake union-array-branch.json} | 0 ...rray-branch.out => union-array-branch.out} | 0 tests/qapi-schema/union-bad-base.err | 2 ++ ...nion-bad-base.json =>

Re: [PATCH v5 22/30] tcg/loongarch64: Implement simple load/store ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 131 +++ 2 files changed, 132 insertions(+) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v5 30/30] configure, meson.build: Mark support for loongarch64 hosts

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/24/21 19:25, WANG Xuerui wrote: Could you add an 'uname -a' here as example? Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- configure | 7 ++- meson.build | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 04/14] bsd-user: export get_errno and is_error from syscall.c

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: Make get_errno and is_error global so files other than syscall.c can use them. Signed-off-by: Warner Losh --- bsd-user/qemu.h| 4 bsd-user/syscall.c | 10 +- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git

Re: [PATCH v3 1/3] tests/Makefile: allow control over tags during check-acceptance

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/23/21 18:11, Willian Rampazzo wrote: Although it is possible to run a specific test using the avocado command-line, a user may want to use a specific tag while running the ``make check-acceptance`` during the development or debugging. This allows using the AVOCADO_TAGS environment variable

Re: [PATCH v3 2/3] docs/devel/testing: add instruction to run a single acceptance test

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/23/21 18:11, Willian Rampazzo wrote: Add instructions to the Acceptance tests section about running a single test file or a test within the test file. Signed-off-by: Willian Rampazzo --- docs/devel/testing.rst | 28 1 file changed, 28 insertions(+)

Re: [PATCH] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART

2021-09-25 Thread Philippe Mathieu-Daudé
Hi Bin, On 9/23/21 12:29, Philippe Mathieu-Daudé wrote: On 9/23/21 07:16, Bin Meng wrote:> On Sun, Sep 19, 2021 at 2:07 AM Philippe Mathieu-Daudé wrote: - Embed SerialMM in MchpPfSoCMMUartState and QOM-initialize it - Alias SERIAL_MM 'chardev' property on MCHP_PFSOC_UART - Forward SerialMM

Re: [PATCH v5 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

2021-09-25 Thread Richard Henderson
On 9/25/21 5:54 AM, Philippe Mathieu-Daudé wrote: +    /* High bits must be set; load with lu12i.w + optional ori.  */ +    tcg_target_long hi12 = sextreg(val, 12, 20); Please declare variables in function prologue. Ah, true. Officially, that's qemu coding style. I tend to overlook it

Re: [PATCH v5 19/30] tcg/loongarch64: Implement br/brcond ops

2021-09-25 Thread Richard Henderson
On 9/25/21 6:13 AM, Philippe Mathieu-Daudé wrote: +static const struct { +    LoongArchInsn op; +    bool swap; +} tcg_brcond_to_loongarch[] = { Richard, TCGCond is 4-bit, shouldn't we explicit this array size to 16, and even better define TCG_COND_COUNT = 16 in "tcg/tcg-cond.h"? Perhaps.

Re: [PATCH v5 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/25/21 16:09, Richard Henderson wrote: On 9/25/21 6:05 AM, Philippe Mathieu-Daudé wrote: +    case INDEX_op_shl_i32: +    if (c2) { Why can't we use:     tcg_debug_assert(a2 <= 0x1f);     tcg_out_opc_slli_w(s, a0, a1, a2); ? Because tcg/optimize.c can

Re: [PATCH] seabios-hppa: Update SeaBIOS to seabios-hppa-v2

2021-09-25 Thread Richard Henderson
On 9/24/21 3:53 PM, Helge Deller wrote: Changes in seabios-hppa: * Include all latest upstream SeaBIOS patches * add support for the qemu "bootindex" parameter * add support for the qemu "-boot order=g-m" parameter to choose SCSI ID Signed-off-by: Helge Deller Thanks, queued. r~

[PATCH v7 18/40] target/alpha: Restrict has_work() handler to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 93e16a2ffb4..1ca601cac5b 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@

[PATCH v7 02/40] hw/core: Restrict cpu_has_work() to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
cpu_has_work() is only called from system emulation code. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/include/hw/core/cpu.h

[PATCH v7 03/40] hw/core: Un-inline cpu_has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
We want to make cpu_has_work() per-accelerator. Only declare its prototype and move its definition to softmmu/cpus.c. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 +--- softmmu/cpus.c| 8 2 files changed, 9

[PATCH v7 09/40] accel/xen: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Since there is no specific Xen handling for cpu_has_work() in cpu_thread_is_idle(), implement Xen has_work() handler as a simple 'return false' code. Acked-by: Paul Durrant Signed-off-by: Philippe Mathieu-Daudé --- accel/xen/xen-all.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH v7 14/40] accel: Simplify cpu_has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Now that all accelerators implement a has_work() handler, we can simplify cpu_has_work() by removing the non-NULL handler check. Add an assertion in cpus_register_accel() for future accelerators. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c | 6

[PATCH v7 05/40] accel: Introduce AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Introduce an accelerator-specific has_work() handler. Eventually call it from cpu_has_work(). Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/accel-ops.h | 5 + softmmu/cpus.c | 3 +++ 2 files changed, 8 insertions(+) diff --git

[PATCH v7 20/40] target/cris: Restrict has_work() handler to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/cris/cpu.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index c2e7483f5bd..b2761f8b110 100644 --- a/target/cris/cpu.c

[PULL 12/25] test-qobject-input-visitor: Wean off UserDefListUnion

2021-09-25 Thread Markus Armbruster
The test_visitor_in_list_union_FOO() use simple union UserDefListUnion to cover lists of builtin types. Rewrite as test_visitor_in_list_struct(), using struct ArrayStruct and a lot less code. test_visitor_in_fail_union_list() uses UserDefListUnion to cover "variant members don't match the

[PULL 14/25] test-clone-visitor: Wean off UserDefListUnion

2021-09-25 Thread Markus Armbruster
test_clone_complex1() uses simple union UserDefListUnion to cover unions. Use UserDefFlatUnion instead. Arrays are still covered by test_clone_complex3(). Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210917143134.412106-15-arm...@redhat.com> ---

[PULL 25/25] tests/qapi-schema: Make test-qapi.py -u work when files are absent

2021-09-25 Thread Markus Armbruster
test-qapi.py -u updates the expected files. Since it fails when they are absent, users have to create them manually before they can use test-qapi.py to fill in the contents, say for a new test. Silly. Improve -u to create them. Signed-off-by: Markus Armbruster Message-Id:

[PULL 19/25] tests/qapi-schema: Drop simple union __org.qemu_x-Union1

2021-09-25 Thread Markus Armbruster
Replace simple union __org.qemu_x-Union1 with flat union __org.qemu_x-Union2, except drop it from __org.qemu_x-command, because there it's only used to pull it into QMP. Now drop the unused -Union1, and rename -Union2 to -Union. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake

Re: [PATCH 0/2] qapi: Move RTC_CHANGE back out of target schema

2021-09-25 Thread Markus Armbruster
Peter Maydell writes: > This patchset moves RTC_CHANGE back to misc.json, effectively > reverting commit 183e4281a30962, which moved the RTC_CHANGE event to > the target schema. That change was an attempt to make the event > target-specific to improve introspection, but the event isn't really >

Re: [PATCH 14/14] bsd-user/signal: Create a dummy signal queueing function

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/22/21 08:14, Warner Losh wrote: Create dummy signal queueing function so we can start to integrate other architectures (at the cost of signals remaining broken) to tame the dependency graph a bit and to bring in signals in a more controlled fashion. Signed-off-by: Warner Losh ---

[PATCH v2 0/3] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART

2021-09-25 Thread Philippe Mathieu-Daudé
Hi, This series QOM'ify the PolarFire UART (the project would get ride of non-QOM devices). Since v1: - Simplify MCHP_PFSOC_MMUART_REG_SIZE - Use MemoryRegion container - Mention qdev_set_legacy_instance_id() is not needed (Bin) - Properly map the 16550 (Bin) - Add DeviceReset() method (Peter) -

[PATCH v2 1/3] hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition

2021-09-25 Thread Philippe Mathieu-Daudé
The current MCHP_PFSOC_MMUART_REG_SIZE definition represent the size occupied by all the registers. However all registers are 32-bit wide, and the MemoryRegionOps handlers are restricted to 32-bit: static const MemoryRegionOps mchp_pfsoc_mmuart_ops = { .read = mchp_pfsoc_mmuart_read,

Re: [PATCH v5 19/30] tcg/loongarch64: Implement br/brcond ops

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/25/21 16:12, Richard Henderson wrote: On 9/25/21 6:13 AM, Philippe Mathieu-Daudé wrote: +static const struct { +    LoongArchInsn op; +    bool swap; +} tcg_brcond_to_loongarch[] = { Richard, TCGCond is 4-bit, shouldn't we explicit this array size to 16, and even better define

[PATCH v7 00/40] accel: Move has_work() from CPUClass to AccelOpsClass

2021-09-25 Thread Philippe Mathieu-Daudé
Hi, CPU has_work() is a per-accelerator handler. This series is organized in 2 parts: - Patches 1-15: Move has_work() from CPUClass to AccelOpsClass - Patches 16-40: Move remainging has_work() to TCGCPUOps I prefer to send as a single big series to be sure it is merged at once, since the 2nd

[PATCH v7 21/40] target/hexagon: Remove unused has_work() handler

2021-09-25 Thread Philippe Mathieu-Daudé
has_work() is sysemu specific, and Hexagon target only provides a linux-user implementation. Remove the unused hexagon_cpu_has_work(). Reviewed-by: Richard Henderson Reviewed-by: Taylor Simpson Signed-off-by: Philippe Mathieu-Daudé --- target/hexagon/cpu.c | 6 -- 1 file changed, 6

[PATCH v7 06/40] accel/kvm: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Implement KVM has_work() handler in AccelOpsClass and remove it from cpu_thread_is_idle() since cpu_has_work() is already called. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- accel/kvm/kvm-accel-ops.c | 6 ++ softmmu/cpus.c| 2 +- 2 files changed, 7

[PATCH v7 26/40] target/mips: Restrict has_work() handler to sysemu and TCG

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 00e0c55d0e4..3639c03f8ea 100644 ---

[PATCH v7 28/40] target/openrisc: Restrict has_work() handler to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/openrisc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 27cb04152f9..3c368a1bde7 100644 ---

[PATCH v7 11/40] accel/nvmm: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Since there is no specific NVMM handling for cpu_has_work() in cpu_thread_is_idle(), implement NVMM has_work() handler as a simple 'return false' code. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/nvmm/nvmm-accel-ops.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH v7 25/40] target/microblaze: Restrict has_work() handler to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/cpu.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 15db277925f..36e6e540483 100644

[PATCH v7 15/40] accel/tcg: Introduce TCGCPUOps::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
Introduce a target-specific has_work() handler for TCG. Eventually call it from tcg_cpu_has_work(), our AccelOpsClass::has_work() handler. Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 4 accel/tcg/tcg-accel-ops.c | 4 2

[PATCH v7 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/s390_flic.c | 15 --- target/s390x/cpu.c | 4 +++- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index

[PATCH v7 36/40] target/sparc: Restrict has_work() handler to sysemu

2021-09-25 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 0d252cb5bdc..8d61bf15f6c 100644 ---

Re: [PATCH v7 12/40] accel/qtest: Implement AccelOpsClass::has_work()

2021-09-25 Thread Philippe Mathieu-Daudé
On 9/25/21 17:32, Richard Henderson wrote: On 9/25/21 11:27 AM, Philippe Mathieu-Daudé wrote: +static bool qtest_cpu_has_work(CPUState *cpu) +{ +    g_assert_not_reached(); +} Sigh, this triggers: Running test qtest-i386/cpu-plug-test ** ERROR:../accel/qtest/qtest.c:52:qtest_cpu_has_work:

Re: [PATCH v5 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

2021-09-25 Thread WANG Xuerui
Hi Richard, On 9/25/21 22:20, Richard Henderson wrote: On 9/24/21 11:51 PM, WANG Xuerui wrote: Hi all, On 9/25/21 01:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Acked-by: Richard Henderson ---   tcg/loongarch64/tcg-insn-defs.c.inc | 979   1 file

Re: [PATCH v5 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

2021-09-25 Thread WANG Xuerui
Hi Philippe, On 9/25/21 17:54, Philippe Mathieu-Daudé wrote: On 9/24/21 19:25, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson ---   tcg/loongarch64/tcg-target.c.inc | 109 +++   1 file changed, 109 insertions(+) +/* Loads a 32-bit

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