On Tue, 5 Oct 2021 10:38:05 +0200
Eric Auger wrote:
> Re-generate reference blobs with rebuild-expected-aml.sh.
commit message should have diff old vs new,
if dis is the same/similar for various variants,
it's fine to provide only one variant diff here.
>
> Signed-off-by: Eric Auger
> ---
On Tue, 5 Oct 2021 10:38:04 +0200
Eric Auger wrote:
> Upgrade the IORT table from B to E.b specification
> revision (ARM DEN 0049E.b).
>
> Signed-off-by: Eric Auger
with nit below fixed:
Reviewed-by: Igor Mammedov
>
> ---
>
> v1 -> v2:
> - Fix Revision value for ITS node and SMMUv3 node
>
On Mon, 11 Oct 2021 15:40:07 +0200, bala...@eik.bme.hu wrote:
> I guess a frequent use case for running macOS guests with keys from host
> would be on hosts running macOS too so a solution that works both on macOS
> and Linux might be better than a Linux specific one which then needs
> another
On Mon, Oct 11, 2021 at 4:59 AM Stefan Hajnoczi wrote:
> On Mon, Oct 11, 2021 at 09:21:30AM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > > > I guess the main question is who is using the ROM/BIOS sources in the
> > > > tarballs, and would this 2-step process work for those users? If
> there
> >
On 13.09.21 15:04, Thomas Weißschuh wrote:
VMDK files support an attribute that represents the version of the guest
tools that are installed on the disk.
This attribute is used by vSphere before a machine has been started to
determine if the VM has the guest tools installed.
This is important
ping?
在 2021/10/2 19:45, Jiaxun Yang 写道:
Jiaxun Yang (3):
hw/mips/boston: Massage memory map information
hw/mips/boston: Allow loading elf kernel and dtb
hw/mips/boston: Add FDT generator
hw/mips/boston.c | 348 +++
1 file changed, 320
On Thu, 7 Oct 2021 19:27:50 +0530
Ani Sinha wrote:
> We added a new unit test for testing acpi hotplug on multifunction bridges in
> q35 machines. Here, we update the DSDT table gloden master blob for this unit
> test.
>
> The test adds the following devices to qemu and then checks the changes
On Thu, 7 Oct 2021 19:27:48 +0530
Ani Sinha wrote:
> We are adding a new unit test to cover the acpi hotplug support in q35 for
> multi-function bridges. This test uses a new table DSDT.multi-bridge.
> We need to allow changes in DSDT acpi table for addition of this new
> unit test.
>
>
On Thu, 7 Oct 2021 19:27:49 +0530
Ani Sinha wrote:
> commit d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction
> bridges")
> added ACPI hotplug descriptions for cold plugged bridges for functions other
> than 0. For all other devices, the ACPI hotplug descriptions are
On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
On Mon, Oct 11, 2021 at 03:27:44PM +0200, BALATON Zoltan wrote:
On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/10/21 15:24,
On Mon, 11 Oct 2021, Gabriel L. Somlo wrote:
FWIW, there's an applesmc driver in the Linux kernel, and it exposes
many of the keys and values stored on the chip under
/sys/devices/platform/applesmc.768 (or at least it *used* to back when
I last checked).
My idea at the time was to get this
On 06/10/2021 11.26, Marc Hartmayer wrote:
Check if the provided kernel command line exceeds the maximum size of the s390x
Linux kernel command line size, which is 896 bytes.
Reported-by: Sven Schnelle
Signed-off-by: Marc Hartmayer
---
hw/s390x/ipl.c | 12 +++-
1 file changed, 11
On Mon, Oct 11, 2021 at 03:27:44PM +0200, BALATON Zoltan wrote:
> On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
> > On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
> > > On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
> > > > On 10/10/21 15:24, BALATON Zoltan wrote:
> > > > >
On 11/10/2021 11.20, David Gibson wrote:
On Mon, Oct 11, 2021 at 10:10:36AM +0200, Thomas Huth wrote:
On 06/10/2021 09.25, Thomas Huth wrote:
On 05/10/2021 23.53, BALATON Zoltan wrote:
[...]
Maybe these 405 boards in QEMU ran with modified firmware where the
memory detection was patched out
On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/10/21 15:24, BALATON Zoltan wrote:
Hello,
I'm trying to fix shutdown and reboot on pegasos2 which uses ACPI as
part of the
On 10/11/21 15:15, Markus Armbruster wrote:
> The error message claims the parameter is invalid:
>
> $ qemu-system-x86_64 -object qom-type=nonexistent
> qemu-system-x86_64: -object qom-type=nonexistent: Invalid parameter
> 'nonexistent'
>
> What's wrong is actually the *value*
On 06.10.21 11:27, Paolo Bonzini wrote:
This makes it possible to see what is happening, even if the output of
"make check-block" is not sent to a tty (for example if it is sent to
grep or tee).
Signed-off-by: Paolo Bonzini
---
tests/qemu-iotests/testrunner.py | 1 +
1 file changed, 1
On 10/11/21 14:59, Thomas Huth wrote:
> Using the U-Boot firmware, we can check that at least the serial console
> of the ppc405 boards is still usable.
>
> Signed-off-by: Thomas Huth
> ---
> Based-on: 20211006071140.565952-1-th...@redhat.com
>
> tests/acceptance/ppc_405.py | 40
On Mon, 11 Oct 2021 08:19:01 -0400
"Michael S. Tsirkin" wrote:
> On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
> > On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
> > > On 10/10/21 15:24, BALATON Zoltan wrote:
> > > > Hello,
> > > >
> > > > I'm trying to fix shutdown
FWIW, there's an applesmc driver in the Linux kernel, and it exposes
many of the keys and values stored on the chip under
/sys/devices/platform/applesmc.768 (or at least it *used* to back when
I last checked).
My idea at the time was to get this driver to also expose the value of
OSK0,1, so that
The error message claims the parameter is invalid:
$ qemu-system-x86_64 -object qom-type=nonexistent
qemu-system-x86_64: -object qom-type=nonexistent: Invalid parameter
'nonexistent'
What's wrong is actually the *value* 'nonexistent'. Improve the
message to
qemu-system-x86_64:
On Mon, Oct 11, 2021 at 10:10:36AM +0200, Thomas Huth wrote:
> On 06/10/2021 09.25, Thomas Huth wrote:
> > On 05/10/2021 23.53, BALATON Zoltan wrote:
> > [...]
> > > Maybe these 405 boards in QEMU ran with modified firmware where the
> > > memory detection was patched out but it seems to detect
Using the U-Boot firmware, we can check that at least the serial console
of the ppc405 boards is still usable.
Signed-off-by: Thomas Huth
---
Based-on: 20211006071140.565952-1-th...@redhat.com
tests/acceptance/ppc_405.py | 40 +
1 file changed, 40
On Mon, Oct 11, 2021 at 02:05:04PM +0200, Gerd Hoffmann wrote:
> Add an expire time for pending delete, once the time is over allow
> pressing the attention button again.
>
> This makes pcie hotplug behave more like acpi hotplug, where one can
> try sending an 'device_del' monitor command again
On Mon, Sep 13, 2021 at 04:35:24PM +0100, Stefan Hajnoczi wrote:
> It was reported that enabling SafeStack reduces IOPS significantly
> (>25%) with the following fio benchmark on virtio-blk using a NVMe host
> block device:
>
> # fio --rw=randrw --bs=4k --iodepth=64 --runtime=1m --direct=1 \
>
From: Stefano Garzarella
Commit 0445409d74 ("iothread: generalize
iothread_set_param/iothread_get_param") moved common code to set and
get IOThread parameters in two new functions.
These functions are called inside callbacks, so we don't need to use an
opaque pointer. Let's replace `void
From: Stefano Garzarella
Commit 1793ad0247 ("iothread: add aio-max-batch parameter") added
a new parameter (aio-max-batch) to IOThread and used PollParamInfo
structure to handle it.
Since it is not a parameter of the polling mechanism, we rename the
structure to a more generic
The following changes since commit ca61fa4b803e5d0abaf6f1ceb690f23bb78a4def:
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211006' into
staging (2021-10-06 12:11:14 -0700)
are available in the Git repository at:
https://gitlab.com/stefanha/qemu.git tags/block-pull-request
for
On Sat, 9 Oct 2021 17:24:01 +0200
Markus Armbruster wrote:
> I noticed -cpu help printing enough trailing spaces to make the output
> at least 84 characters wide. Looks ugly unless the terminal is wider.
> Ugly or not, trailing spaces are stupid.
>
> The culprit is this line in
On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
> On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
> > On 10/10/21 15:24, BALATON Zoltan wrote:
> > > Hello,
> > >
> > > I'm trying to fix shutdown and reboot on pegasos2 which uses ACPI as
> > > part of the VIA VT8231 (similar to
No functional change.
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 35 +--
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index c455f92e16bf..70fc11ba4c7d 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -497,6
This allows to power off pci devices. In "off" state the devices will
not be visible. No pci config space access, no pci bar access, no dma.
Default state is "on", so this patch (alone) should not change behavior.
Use case: Allows hotplug controllers implement slot power. Hotplug
controllers
Add an expire time for pending delete, once the time is over allow
pressing the attention button again.
This makes pcie hotplug behave more like acpi hotplug, where one can
try sending an 'device_del' monitor command again in case the guest
didn't respond to the first attempt.
Signed-off-by:
Gerd Hoffmann (6):
pci: implement power state
pcie: implement slow power control for pcie root ports
pcie: add power indicator blink check
pcie: factor out pcie_cap_slot_unplug()
pcie: fast unplug when slot power is off
pcie: expire pending delete
include/hw/pci/pci.h | 2 ++
In case the slot is powered off (and the power indicator turned off too)
we can unplug right away, without round-trip to the guest.
Also clear pending attention button press, there is nothing to care
about any more.
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 10 ++
1 file
Refuse to push the attention button in case the guest is busy with some
hotplug operation (as indicated by the power indicator blinking).
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index
With this patch hot-plugged pci devices will only be visible to the
guest if the guests hotplug driver has enabled slot power.
This should fix the hot-plug race which one can hit when hot-plugging
a pci device at boot, while the guest is in the middle of the pci bus
scan.
Signed-off-by: Gerd
* Stefan Reiter (s.rei...@proxmox.com) wrote:
> Adds support for the "-xS" parameter type, where "-x" denotes a flag
> name and the "S" suffix indicates that this flag is supposed to take an
> arbitrary string parameter.
>
> These parameters are always optional, the entry in the qdict will be
>
Add the SGX numa reference command and how to check if
SGX numa is support or not with multiple EPC sections.
Signed-off-by: Yang Zhong
---
docs/system/i386/sgx.rst | 31 +++
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/docs/system/i386/sgx.rst
The SGXEPCSection list added into SGXInfo to show the multiple
SGX EPC sections detailed info, not the total size like before.
Signed-off-by: Yang Zhong
---
qapi/misc-target.json | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/qapi/misc-target.json
This patch can enable numa support for 'info sgx' command
in the monitor, which can show detailed SGX EPC sections
info.
(qemu) info sgx
SGX support: enabled
SGX1 support: enabled
SGX2 support: enabled
FLC support: enabled
SECTION #0: size=67108864
SECTION #1: size=29360128
The QMP
The basic SGX patches were merged into Qemu release, the left NUMA
function for SGX should be enabled. The patch1 implemented the SGX NUMA
ACPI to enable NUMA in the SGX guest. Since Libvirt need detailed host
SGX EPC sections info to decide how to allocate EPC sections for SGX NUMA
guest, the
Add the MEMORY_DEVICE_INFO_KIND_SGX_EPC case for SGX numa info
with 'info numa' command in the monitor.
Signed-off-by: Yang Zhong
---
hw/core/numa.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/core/numa.c b/hw/core/numa.c
index 510d096a88..1aa05dcf42 100644
--- a/hw/core/numa.c
Libvirt need get the detailed host SGX EPC capabilities to support
numa function. Libvirt can decide how to allocate host EPC sections
to guest numa from host numa info.
(QEMU) query-sgx-capabilities
{"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \
[{"index": 0, "size":
The basic SGX did not enable numa for SGX EPC sections, which
result in all EPC sections located in numa node 0. This patch
enable SGX numa function in the guest and the EPC section can
work with RAM as one numa node.
The Guest kernel related log:
[0.009981] ACPI: SRAT: Node 0 PXM 0 [mem
On Fri, Oct 08, 2021 at 12:48:26PM +0200, Emanuele Giuseppe Esposito wrote:
>
>
> On 07/10/2021 16:54, Stefan Hajnoczi wrote:
> > On Tue, Oct 05, 2021 at 10:32:14AM -0400, Emanuele Giuseppe Esposito wrote:
> > > The job API will be handled separately in another serie.
> > >
> > > Signed-off-by:
From: NDNF
This patch adds the ability to generate files in drcov format.
Primary goal this script is to have coverage
logfiles thatwork in Lighthouse.
Problems:
- The path to the executable file is not specified.
- base, end, entry take incorrect values.
(Lighthouse + IDA Pro
On Fri, Oct 08, 2021 at 09:20:35AM +0200, Emanuele Giuseppe Esposito wrote:
>
> > > +/*
> > > + * Global state (GS) API. These functions run under the BQL lock.
> > > + *
> > > + * If a function modifies the graph, it also uses drain and/or
> > > + * aio_context_acquire/release to be sure it has
On 11.10.21 11:58, Emanuele Giuseppe Esposito wrote:
On 11/10/2021 11:29, Hanna Reitz wrote:
On 08.10.21 08:28, Emanuele Giuseppe Esposito wrote:
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need
On Mon, Oct 11, 2021 at 09:21:30AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > I guess the main question is who is using the ROM/BIOS sources in the
> > > tarballs, and would this 2-step process work for those users? If there
> > > are distros relying on them then maybe there are some more
On 21.09.21 16:28, Eric Blake wrote:
Use consistent capitalization, and fix a missed line (we duplicate the
qemu-img synopses in too many places).
Fixes: 1899bf4737 (qemu-img: Add -F shorthand to convert)
Signed-off-by: Eric Blake
---
docs/tools/qemu-img.rst | 2 +-
qemu-img-cmds.hx
Richard Henderson writes:
> AArch64 has both sign and zero-extending addressing modes, which
> means that either treatment of guest addresses is equally efficient.
> Enabling this for AArch64 gives us testing of the feature in CI.
So which guests front ends will exercise this backend? I
On Mon, 11 Oct 2021, Gerd Hoffmann wrote:
On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
This device is part of a superio/ISA bridge chip and IRQs from it are
routed to an ISA interrupt set by the Interrupt Line PCI config
register. Change uhci_update_irq() to allow this and
Richard Henderson writes:
> When using reserved_va, which is the default for a 64-bit host
> and a 32-bit guest, set guest_base_signed_addr32 if requested
> by TCG_TARGET_SIGNED_ADDR32, and the executable layout allows.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/cpu-all.h | 4
On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/10/21 15:24, BALATON Zoltan wrote:
Hello,
I'm trying to fix shutdown and reboot on pegasos2 which uses ACPI as
part of the VIA VT8231 (similar to and modelled in hw/isa/vt82c686b.c)
and found that the guest writes to ACPI PM1aCNT
On Fri, Oct 8, 2021 at 11:18 PM Jean-Philippe Brucker
wrote:
>
> On Tue, Oct 05, 2021 at 11:45:42AM -0400, Michael S. Tsirkin wrote:
> > Looks like this can not be applied yet because the bypass bit
> > isn't in yet. what's up with that?
>
> The boot-bypass bit isn't a hard dependency for this
Richard Henderson writes:
> Create a new function to combine a CPUTLBEntry addend
> with the guest address to form a host address.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> Define as 0 for all tcg hosts. Put this in a separate header,
> because we'll want this in places that do not ordinarily have
> access to all of tcg/tcg.h.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On 11/10/2021 11:29, Hanna Reitz wrote:
On 08.10.21 08:28, Emanuele Giuseppe Esposito wrote:
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need to fix it.
All these fixes involve just indentation
On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
> This device is part of a superio/ISA bridge chip and IRQs from it are
> routed to an ISA interrupt set by the Interrupt Line PCI config
> register. Change uhci_update_irq() to allow this and use it from
> vt82c686-uhci-pci.
Hmm,
On 08.10.21 08:28, Emanuele Giuseppe Esposito wrote:
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need to fix it.
All these fixes involve just indentation or additional spaces
added.
Signed-off-by:
On 11.10.21 10:40, Christian Borntraeger wrote:
Am 11.10.21 um 09:09 schrieb David Hildenbrand:
On 08.10.21 22:38, Eric Farman wrote:
When building a Stop IRQ to pass to KVM, we should incorporate
the flags if handling the SIGP Stop and Store Status order.
With that, KVM can reject other
On Mon, Oct 11 2021, Halil Pasic wrote:
> The virtio specification virtio-v1.1-cs01 states: "Transitional devices
> MUST detect Legacy drivers by detecting that VIRTIO_F_VERSION_1 has not
> been acknowledged by the driver." This is exactly what QEMU as of 6.1
> has done relying solely on
Am 11.10.21 um 09:09 schrieb David Hildenbrand:
On 08.10.21 22:38, Eric Farman wrote:
When building a Stop IRQ to pass to KVM, we should incorporate
the flags if handling the SIGP Stop and Store Status order.
With that, KVM can reject other orders that are submitted for
the same CPU while
Hi Eduardo,
Ping for this minor change.
On 8/27/2021 2:48 PM, Chenyi Qiang wrote:
Because core-capability releated features are model-specific and KVM
won't support it, remove the core-capability in CPU model to avoid the
warning message.
Signed-off-by: Chenyi Qiang
---
target/i386/cpu.c |
On 06/10/2021 09.25, Thomas Huth wrote:
On 05/10/2021 23.53, BALATON Zoltan wrote:
[...]
Maybe these 405 boards in QEMU ran with modified firmware where the memory
detection was patched out but it seems to detect the RAM so I wonder where
it gets that from. Maybe by reading the SDRAM
Hi Markus,
On 2021/10/11 13:26, Markus Armbruster wrote:
Yanan Wang writes:
Functionally smp_parse() is only called once and in one place
i.e. machine_set_smp, the possible second place where it'll be
called should be some unit tests if any.
Actually we are going to introduce an unit test
Kevin Wolf writes:
[...]
> What I had in mind was using the schema to generate the necessary code,
> using the generic keyval parser everywhere, and just providing a hook
> where the QDict could be modified after the keyval parser and before the
> visitor. Most command line options would not
virito-mem currently relies on having a single sparse memory region (anon
mmap, mmaped file, mmaped huge pages, mmap shmem) per VM. Although we can
share memory with other processes, sharing with other VMs is not intended.
Instead of actually mmaping parts dynamically (which can be quite
Hi,
> > I guess the main question is who is using the ROM/BIOS sources in the
> > tarballs, and would this 2-step process work for those users? If there
> > are distros relying on them then maybe there are some more logistics to
> > consider since the make-release downloads are both
On 08.10.21 22:38, Eric Farman wrote:
When building a Stop IRQ to pass to KVM, we should incorporate
the flags if handling the SIGP Stop and Store Status order.
With that, KVM can reject other orders that are submitted for
the same CPU while the operation is fully processed.
Signed-off-by: Eric
On 08.10.21 22:38, Eric Farman wrote:
According to the Principles of Operation, the SIGP Set Architecture
order will return Incorrect State if some CPUs are not stopped, but
only if the CZAM facility is not present. If it is, the order will
return Invalid Parameter because the architecture mode
On 16/09/21 13:17, Markus Armbruster wrote:
Commit 6287d827d4 "monitor: allow device_del to accept QOM paths"
extended find_device_state() to accept QOM paths in addition to qdev
IDs. This added a checked conversion to TYPE_DEVICE at the end, which
duplicates the check done for the qdev ID case
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