On 12/23/21 2:17 AM, Paolo Bonzini wrote:
The following changes since commit 2bf40d0841b942e7ba12953d515e62a436f0af84:
Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into
staging (2021-12-20 13:20:07 -0800)
are available in the Git repository at:
On Thu, Dec 23, 2021 at 06:34:22PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> >
> > -kvm-y := $(KVM)/kvm_main.o $(KVM)/eventfd.o $(KVM)/binary_stats.o
> > +kvm-y := $(KVM)/kvm_main.o $(KVM)/eventfd.o $(KVM)/binary_stats.o
> > $(KVM)/memfd.o
>
> This should be
On Tue, Dec 21, 2021 at 01:52:30PM +0100, Juan Quintela wrote:
> So printing it as %d is wrong. Notice that for the channel id, that
> is an uint8_t, but I changed it anyways for consistency.
Just curious: uint_8 can always correctly converted to a int, so the patch
shouldn't have a functional
The enablement of postcopy listening has a few steps, add a few tracepoints to
be there ready for some basic measurements for them.
Signed-off-by: Peter Xu
---
migration/savevm.c | 9 -
migration/trace-events | 2 +-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git
On Mon, Dec 20, 2021 at 03:18:52PM -0300, Fabiano Rosas wrote:
> There are currently only two interrupts that use alternate SRRs, so
> let them write to them directly during the setup code.
>
> No functional change intented.
>
> Signed-off-by: Fabiano Rosas
Reviewed-by: David Gibson
> ---
>
- update extension check REQUIRE_ZHINX_OR_ZFH and
REQUIRE_ZFH_OR_ZFHMIN_OR_ZHINX_OR_ZHINXMIN
- update half float point register read/write
- disable nanbox_h check
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/fpu_helper.c | 60 ++--
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a5fa14f2ac..dbd15693be 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -657,6
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
roms/SLOF| 2 +-
target/riscv/cpu.c | 12
target/riscv/cpu.h | 4
target/riscv/translate.c | 8
4 files changed, 25 insertions(+), 1 deletion(-)
diff --git
On Fri, Dec 24, 2021 at 12:09:47AM +0100, Paolo Bonzini wrote:
> On 12/23/21 19:34, Sean Christopherson wrote:
> > > select HAVE_KVM_PM_NOTIFIER if PM
> > > + select MEMFD_OPS
> > MEMFD_OPS is a weird Kconfig name given that it's not just memfd() that can
> > implement the ops.
> >
>
>
On Tue, Dec 14, 2021 at 07:07:33PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> Setup a negative feedback system when vCPU thread
> handling KVM_EXIT_DIRTY_RING_FULL exit by introducing
> throttle_us_per_full field in struct CPUState. Sleep
> throttle_us_per_full
On Thu, Dec 16, 2021 at 11:23:37AM +0100, Markus Armbruster wrote:
> Hyman Huang writes:
>
> [...]
>
> > So the final format of qmp we conclude are:
> >
> > case 1: setup vcpu 0 dirty page limit 100MB/s
> > set-vcpu-dirty-limit cpu-index=0 dirty-rate=100
> >
> > case 2: setup all vcpu dirty
On Tue, Dec 14, 2021 at 07:07:34PM +0800, huang...@chinatelecom.cn wrote:
> +void qmp_vcpu_dirty_limit(bool enable,
> + bool has_cpu_index,
> + uint64_t cpu_index,
> + bool has_dirty_rate,
> +
v3:
- s/disgard/discard/, s/exit/return/ [DavidE]
v2:
- add r-bs for Dave
- move mig_cmd_args reference later than index bound check [Dave]
- use chars in tracepoints instead of number of steps [Dave]
- add one patch for postcopy-run tracing
Some queued patches for ram disgard cleanup, and some
Right now we loop ramblocks for twice, the 1st time chunk the dirty bits with
huge page information; the 2nd time we send the discard ranges. That's not
necessary - we can do them in a single loop.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/ram.c | 20
The following changes since commit f18155a207dbc6a23f06a4af667280743819c31e:
Merge tag 'for-upstream-mtest' of https://gitlab.com/bonzini/qemu into
staging (2021-12-23 11:35:48 -0800)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-pa-20211223
for you
Because sa may be 0,
tcg_gen_deposit_reg(dest, t0, cpu_gr[a->r1], 32 - sa, sa);
may attempt a zero-width deposit at bit 32, which will assert
for TARGET_REGISTER_BITS == 32.
Use the newer extract2 when possible, which itself includes the
rotri special case; otherwise mirror the code from
- update extension check REQUIRE_ZFINX_OR_F
- update single float point register read/write
- disable nanbox_s check
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/fpu_helper.c | 60 ++---
target/riscv/helper.h
It will just never fail. Drop those return values where they're constantly
zeros.
A tiny touch-up on the tracepoint so trace_ram_postcopy_send_discard_bitmap()
is called after the logic itself (which sounds more reasonable).
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
I planned to add "#ifdef DEBUG_POSTCOPY" around the function too because
otherwise it'll be compiled into qemu binary even if it'll never be used. Then
I found that maybe it's easier to just drop it for good..
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/ram.c |
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
We can just access it directly in powerpc_excp.
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 43
1 file changed, 21 insertions(+), 22 deletions(-)
Reviewed-by: Richard Henderson
r~
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
Now that 'vector' is known before calling the interrupt-specific setup
code, we can move all of the scv setup into one place.
No functional change intended.
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 13 +
1 file
We need to read the floating-point flags before printf may do
other floating-point operations which may affect the flags.
Hexagon reference files regenerated by Taylor Simpson.
Signed-off-by: Taylor Simpson
Signed-off-by: Richard Henderson
Message-Id:
On Tue, Dec 21, 2021 at 02:29:13PM +0100, Philippe Mathieu-Daudé wrote:
> On 12/21/21 13:52, Juan Quintela wrote:
> > The goto is not needed at all.
> >
> > Signed-off-by: Juan Quintela
> > ---
> > migration/ram.c | 11 +++
> > 1 file changed, 3 insertions(+), 8 deletions(-)
> >
> >
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
None of the interrupt setup code touches 'vector', so we can move it
earlier in the function. This will allow us to later move the System
Call Vectored setup that is on the top level into the
POWERPC_EXCP_SYSCALL_VECTORED code block.
This patch also
On Thu, Dec 23, 2021 at 06:02:33PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> > Similar to hva_tree for hva range, maintain interval tree ofs_tree for
> > offset range of a fd-based memslot so the lookup by offset range can be
> > faster when memslot count is
On Thu, Dec 23, 2021 at 06:06:19PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> > This new function establishes the mapping in KVM page tables for a
> > given gfn range. It can be used in the memory fallocate callback for
> > memfd based memory to establish the
Remove the old two tracepoints and they're even near each other:
trace_loadvm_postcopy_handle_run_cpu_sync()
trace_loadvm_postcopy_handle_run_vmstart()
Add trace_loadvm_postcopy_handle_run_bh() with a finer granule trace.
Signed-off-by: Peter Xu
---
migration/savevm.c | 12
It'll be easier to read the name rather than index of sub-cmd when debugging.
Signed-off-by: Peter Xu
---
migration/savevm.c | 3 ++-
migration/trace-events | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/migration/savevm.c b/migration/savevm.c
index
This patch is to improve the logic of QEMU main thread sleep code in
qemu_chr_write_buffer() where it can be blocked and can't run other
coroutines during COLO IO stress test.
Our approach is to put filter_send() in a coroutine. In this way,
filter_send() will call qemu_coroutine_yield() in
Generated on Power9, PowerNV 9006-22P.
Signed-off-by: Richard Henderson
---
tests/tcg/ppc64le/float_convs.ref | 748 +
tests/tcg/ppc64le/float_madds.ref | 768 ++
2 files changed, 1516 insertions(+)
create mode 100644
-- update extension check REQUIRE_ZDINX_OR_D
-- update double float point register read/write
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/insn_trans/trans_rvd.c.inc | 252
1 file changed, 174 insertions(+), 78
://gitlab.com/rth7680/qemu.git tags/pull-pa-20211223
for you to fetch changes up to 05bfd4db08608bc4c22de729780c1f74612fbc0e:
target/hppa: Fix deposit assert from trans_shrpw_imm (2021-12-23 17:47:01
-0800)
Fix target/hppa #635
When using JSON syntax for -device, -set option can not find device
specified in JSON by id field. The following commandline is an example:
$ qemu-system-x86_64 -device '{"id":"foo"}' -set device.foo.bar=1
qemu-system-x86_64: -set device.foo.bar=1: there is no device "foo" defined
The patch
This patchset implements RISC-V Float-Point in Integer Registers
extensions(Version 1.0.0-rc), which includes Zfinx, Zdinx, Zhinx and Zhinxmin
extension.
Specification:
https://github.com/riscv/riscv-zfinx/blob/main/zfinx-1.0.0-rc.pdf
The port is available here:
We didn't read the fp flags early enough, so we got whatever
came out of the guest printf. With careful review of the
hexagon output, we would have seen this long ago.
r~
Richard Henderson (2):
tests/tcg/multiarch: Read fp flags before printf
test/tcg/ppc64le: Add float reference files
On Tue, Dec 21, 2021 at 01:52:31PM +0100, Juan Quintela wrote:
> We only need last_stage in two places and we are passing it all
> around. Just add a field to RAMState that passes it.
>
> Signed-off-by: Juan Quintela
Reviewed-by: Peter Xu
--
Peter Xu
On Tue, Dec 21, 2021 at 01:52:35PM +0100, Juan Quintela wrote:
> We always need to call it when we find a zero page, so put it in a
> single place.
>
> Signed-off-by: Juan Quintela
Reviewed-by: Peter Xu
--
Peter Xu
On 12/23/21 3:51 AM, Paolo Bonzini wrote:
Avoid polluting the compilation of common-user/ with local include files;
making an include file available to common-user/ should be a deliberate
decision in order to keep a clear interface that can be used by both
bsd-user/ and linux-user/.
On Thu, 2021-12-23 at 20:29 +0800, Chao Peng wrote:
> From: "Kirill A. Shutemov"
>
> The patch introduces new MEMFD_OPS facility around file created by
> memfd_create() to allow a third kernel component to make use of
> memory
> bookmarked in a memfd and gets notifier when the memory in the file
Co-authored-by: ardxwe
Signed-off-by: liweiwei
Signed-off-by: wangjunqiang
---
target/riscv/translate.c | 169 +++
1 file changed, 169 insertions(+)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 8b1cdacf50..bac42e60bd 100644
---
On Thu, Dec 23, 2021 at 06:34:22PM +, Sean Christopherson wrote:
> On Thu, Dec 23, 2021, Chao Peng wrote:
> > diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
> > index 03b2ce34e7f4..86655cd660ca 100644
> > --- a/arch/x86/kvm/Kconfig
> > +++ b/arch/x86/kvm/Kconfig
> > @@ -46,6 +46,7 @@
On Tue, Dec 14, 2021 at 07:07:31PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> v10:
> - rebase on master
> - make the following modifications on patch [1/3]:
> 1. Make "dirtylimit-calc" thread joinable and join it after quitting.
>
> 2. Add finalize function to free
It always return zero, because it just can't go wrong so far. Simplify the
code with no functional change.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
---
migration/ram.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/migration/ram.c
This function calls three functions:
- postcopy_discard_send_init(ms, block->idstr);
- postcopy_chunk_hostpages_pass(ms, block);
- postcopy_discard_send_finish(ms);
However only the 2nd function call is meaningful. It's major role is to make
sure dirty bits are applied in host-page-size
On Tue, Dec 21, 2021 at 01:52:32PM +0100, Juan Quintela wrote:
> -static void ram_release_pages(const char *rbname, uint64_t offset, int pages)
> +static void ram_release_page(const char *rbname, uint64_t offset)
> {
> if (!migrate_release_ram() || !migration_in_postcopy()) {
>
Signed-off-by: Hongren (Zenithal) Zheng
---
docs/canokey.txt | 133 +++
1 file changed, 133 insertions(+)
create mode 100644 docs/canokey.txt
diff --git a/docs/canokey.txt b/docs/canokey.txt
new file mode 100644
index 00..69262194c4
---
Signed-off-by: Hongren (Zenithal) Zheng
---
docs/system/devices/usb.rst | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/system/devices/usb.rst b/docs/system/devices/usb.rst
index afb7d6c226..341694403a 100644
--- a/docs/system/devices/usb.rst
+++ b/docs/system/devices/usb.rst
@@
- One sentense
With this patch series, QEMU would fully emulate an open-source secure key,
CanoKey, with supports of various features listed below:
* U2F / FIDO2 with Ed25519 and HMAC-secret
* OpenPGP Card V3.4 with RSA4096, Ed25519 and more
* PIV (NIST SP 800-73-4)
* HOTP / TOTP
- What's
Signed-off-by: Hongren (Zenithal) Zheng
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5456536805..522b0e5687 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2295,6 +2295,14 @@ F: hw/timer/mips_gictimer.c
F: include/hw/intc/mips_gic.h
Signed-off-by: Hongren (Zenithal) Zheng
---
docs/qdev-device-use.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/qdev-device-use.txt b/docs/qdev-device-use.txt
index 2408889334..278fb66c0a 100644
--- a/docs/qdev-device-use.txt
+++ b/docs/qdev-device-use.txt
@@ -342,6 +342,7 @@ The
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
+static inline const char *powerpc_excp_name(int excp)
Drop the inline. It's not performance critical; let the compiler decide.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 12/23/21 1:22 PM, Laurent Vivier wrote:
+#define UNALIGN(C) (ctx->tbflags & TB_FLAG_UNALIGN ? MO_UNALN : 0)
Why isn't it like the other targets: "ctx->tb_flags & TB_FLAG_UNALIGN ? MO_UNALN :
MO_ALIGN)"?
It should be; not using 0 was a late revision and I missed this one.
r~
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
There is no need to deactivate MMU logging at compile time.
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu_common.c | 4 ++--
target/ppc/mmu_helper.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
There's also no need to use
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
The 405 timers were broken when booke support was added. Assumption
was made that the register numbers were the same but it's not :
SPR_BOOKE_TSR (0x150)
SPR_BOOKE_TCR (0x154)
SPR_40x_TSR (0x3D8)
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
This is a small cleanup to ease reading.
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc.c | 42 +++---
1 file changed, 19 insertions(+), 23 deletions(-)
You should mention dropping the comparison vs null as
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
Timers are already initialized in ppc4xx_init(). No need to do it a
second time with a wrong set.
Fixes: d715ea961254 ("PPC: 405: Fix ppc405ep initialization")
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405_uc.c | 2 --
1 file changed, 2
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
The PID SPR of the 405 CPU contains the translation ID of the TLB
which is a 8-bit field. Enforce the mask with a store helper.
Cc: Christophe Leroy
Signed-off-by: Cédric Le Goater
---
target/ppc/spr_tcg.h | 1 +
target/ppc/cpu_init.c | 2 +-
On 12/21/21 10:40 PM, Cédric Le Goater wrote:
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 9ef9a1a5ddd5..8f6a58e82483 100644
--- a/target/ppc/cpu_init.c
+++
Hi everyone,
I am pleased to announce that the QEMU v6.1.1 stable release is now
available.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
v6.1.1 is now tagged in the official qemu.git repository, and the
stable-6.1 branch has been updated
On 12/23/21 18:19, Richard Henderson wrote:
On 12/23/21 12:36 PM, Daniel Henrique Barboza wrote:
This reorg is breaking PMU-EBB tests, unfortunately. These tests are run from
the kernel
tree [1] and I test them inside a pSeries TCG guest. You'll need to apply
patches 9 and
10 of [2]
On Thu, Dec 23, 2021 at 1:03 PM Laurent Vivier wrote:
>
> Le 23/12/2021 à 07:47, Tonis Tiigi a écrit :
>
> Please copy here what you explain in PATCH 0 regarding this patch.
> (do the same for PATCH 1)
>
> > Signed-off-by: Tonis Tiigi
> > ---
> > linux-user/syscall.c | 94
On 12/23/21 19:34, Sean Christopherson wrote:
select HAVE_KVM_PM_NOTIFIER if PM
+ select MEMFD_OPS
MEMFD_OPS is a weird Kconfig name given that it's not just memfd() that can
implement the ops.
Or, it's kvm that implements them to talk to memfd?
Paolo
23.12.2021 15:44, Hanna Reitz wrote:
On 03.12.21 14:07, Vladimir Sementsov-Ogievskiy wrote:
We support IMGOPTS for python iotests now. Still a lot of tests are
unprepared to common IMGOPTS that are used with bash iotests. So we
should define corresponding unsupported_imgopts.
Signed-off-by:
23.12.2021 15:41, Hanna Reitz wrote:
On 03.12.21 14:07, Vladimir Sementsov-Ogievskiy wrote:
We have added support for some addition IMGOPTS in python iotests like
in bash iotests. Similarly to bash iotests, we want a way to skip some
tests which can't work with specific IMGOPTS.
Globally for
On 18/12/2021 13:24, Vladimir Sementsov-Ogievskiy wrote:
04.11.2021 17:53, Emanuele Giuseppe Esposito wrote:
--- a/block/replication.c
+++ b/block/replication.c
@@ -728,9 +728,11 @@ static void replication_stop(ReplicationState
*rs, bool failover, Error **errp)
* disk, secondary
There seems to be difference in syscall and libc definition of these
methods and therefore musl does not implement them (1e21e78bf7). Call
syscall directly to ensure the behavior of the libc of user application,
not the libc that was used to build QEMU.
Signed-off-by: Tonis Tiigi
---
Signed-off-by: Tonis Tiigi
---
linux-user/syscall.c | 94 +++
linux-user/syscall_defs.h | 14 ++
2 files changed, 108 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index f1cfcc8104..2f5a0fac5a 100644
---
Hi Alexandre,
On 12/17/21 17:38, Alexandre Ratchov wrote:
sndio is the native API used by OpenBSD, although it has been ported to
other *BSD's and Linux (packages for Ubuntu, Debian, Void, Arch, etc.).
Signed-off-by: Brad Smith
Signed-off-by: Alexandre Ratchov
---
Thank you for the reviews
This patchset improves support for sched_* syscalls under user emulation. The
first commit adds support for sched_g/setattr that was previously not
implemented. There is no equivalent for these syscalls in libc, so I needed to
redefine the struct from kernel. It can't be included directly
Dear QEMU Community,
after chatting a bit in the IRC channel, "stefanha" advised me to
contact you via EMail about my problem.
My advisor and me from the DSE chair at the TU Munich had the idea to
improve the emulation of the x86 cmpxchg instruction on ARM64 CPUs by
improving the translation
On 06.12.21 15:34, Thomas Huth wrote:
The lsi53c895a SCSI adaptor might not be enabled in each and every
x86 QEMU binary, e.g. it's disabled in the RHEL/CentOS build.
Thus let's add a check to the 051 test so that it does not fail if
this device is not available.
Signed-off-by: Thomas Huth
---
Split qemu_tool_popen() from qemu_tool_pipe_and_status() to be used
separately.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Nikita Lapshin
---
tests/qemu-iotests/iotests.py | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git
On 12/6/21 11:36, Cédric Le Goater wrote:
> From: Thomas Huth
>
> The PPC 405 CPU is a system-on-a-chip, so all 405 machines are very similar,
> except for some external periphery. However, the periphery of the 'taihu'
> machine is hardly emulated at all (e.g. neither the LCD nor the USB part
23.12.2021 01:11, Paolo Bonzini wrote:
Il mar 21 dic 2021, 20:35 Vladimir Sementsov-Ogievskiy mailto:vsement...@virtuozzo.com>> ha scritto:
--- a/trace/meson.build
+++ b/trace/meson.build
@@ -2,10 +2,14 @@
specific_ss.add(files('control-target.c'))
trace_events_files =
On 18.11.21 15:35, Daniel P. Berrangé wrote:
When support for sha256 fingerprint checking was aded in
commit bf783261f0aee6e81af3916bff7606d71ccdc153
Author: Daniel P. Berrangé
Date: Tue Jun 22 12:51:56 2021 +0100
block/ssh: add support for sha256 host key fingerprints
it was
Hi Peter,
On 12/15/21 11:10, Peter Maydell wrote:
> On Wed, 15 Dec 2021 at 08:18, Amir Gonnen wrote:
>> My goal is to simulate a mixed architecture system.
>>
>> Today QEMU strongly assumes that the simulated system is a *single
>> architecture*.
>> Changing this assumption and supporting mixed
On 18.11.21 15:35, Daniel P. Berrangé wrote:
When validating the server key fingerprint fails, it is difficult for
the user to know what they got wrong. The fingerprint accepted by QEMU
is received in a different format than openssh displays. There can also
be keys for multiple different ciphers
On 11/18/21 15:35, Daniel P. Berrangé wrote:
> When validating the server key fingerprint fails, it is difficult for
> the user to know what they got wrong. The fingerprint accepted by QEMU
> is received in a different format than openssh displays. There can also
> be keys for multiple different
On 22/12/2021 02:38, yangxiaojuan wrote:
Hi, Mark
On 12/18/2021 08:33 AM, Mark Cave-Ayland wrote:
On 04/12/2021 12:07, Xiaojuan Yang wrote:
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig
On Wed, 22 Dec 2021 17:46:11 +0100
Cornelia Huck wrote:
> On Thu, Dec 16 2021, Nico Boehr wrote:
>
> > Previously, we required bits 5, 6 and 7 to be zero (0x07 == 0b111). But,
> > as per the principles of operation, bit 5 is ignored in MSCH and bits 0,
> > 1, 6 and 7 need to be zero.
> >
> >
We are going to implement automatic trace points for qmp commands.
These several trace points are in conflict with upcoming ones. So, drop
them now.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
blockdev.c | 8
job-qmp.c | 6 --
block/trace-events | 9 -
Add and option to generate trace points. We should generate both trace
points and trace-events files for further trace point code generation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Philippe Mathieu-Daudé
---
scripts/qapi/gen.py | 13 ++---
scripts/qapi/main.py | 10
1. Use --add-trace-points when generate qmp commands
2. Add corresponding .trace-events files as outputs in qapi_files
custom target
3. Define global qapi_trace_events list of .trace-events file targets,
to fill in trace/qapi.build and to use in trace/meson.build
4. In trace/meson.build use
On 12/22/21 11:24, Troy Lee wrote:
> Typo found during developing.
>
> Fixes: 70b3f1a34d3c ("hw/misc: Add basic Aspeed PWM model")
> Signed-off-by: Troy Lee
> ---
> hw/misc/aspeed_pwm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/aspeed_pwm.c
Hello Troy Lee,
On 12/22/21 11:24, Troy Lee wrote:
Typo found during developing.
Fixes: 70b3f1a34d3c ("hw/misc: Add basic Aspeed PWM model")
PWM is not upstream. I will include the fix in a new aspeed-7.0 branch.
Thanks,
C.
Signed-off-by: Troy Lee
---
hw/misc/aspeed_pwm.c | 2 +-
1
On 21.07.21 22:46, Eric Blake wrote:
Add a regression test to make sure we detect attempts to use 'qemu-img
bitmap' to modify an in-use local file.
Suggested-by: Nir Soffer
Signed-off-by: Eric Blake
---
Sadly, this missed my bitmaps pull request today. If there's any
reason to respin that
On 18.11.21 15:35, Daniel P. Berrangé wrote:
The docs still illustrate host key fingerprint checking using the old
md5 hashes which are considered insecure and obsolete. Change it to
illustrate using a sha256 hash. Also show how to extract the hash
value from the known_hosts file.
Hi,
On Wed, Dec 22, 2021 at 9:52 PM Michael S. Tsirkin wrote:
>
> On Wed, Dec 22, 2021 at 09:27:51PM +0100, Philippe Mathieu-Daudé wrote:
> > On Wed, Dec 22, 2021 at 9:20 PM Michael S. Tsirkin wrote:
> > > On Wed, Dec 22, 2021 at 08:19:41PM +0100, Philippe Mathieu-Daudé wrote:
> > > > +Mauro &
Add missing vhost-user-blk help:
$ qemu-storage-daemon -h
...
--export [type=]vhost-user-blk,id=,node-name=,
addr.type=unix,addr.path=[,writable=on|off]
[,logical-block-size=][,num-queues=]
export the specified block node as a
When building QEMU with --disable-vhost-user and using introspection,
query-qmp-schema lists vhost-user-blk even though it's not actually
available:
{ "execute": "query-qmp-schema" }
{
"return": [
...
{
"name": "312",
"members": [
- Add vhost-user-blk help to qemu-storage-daemon,
- Do not list vhost-user-blk in BlockExportType when
CONFIG_VHOST_USER_BLK_SERVER is disabled.
Since v1:
- Reword patch 2 description (Markus)
- Fix BlockExportOptions enum build failure (Markus)
Philippe Mathieu-Daudé (2):
On 22/12/2021 08:26, yangxiaojuan wrote:
Hi, Mark
On 12/18/2021 06:02 PM, Mark Cave-Ayland wrote:
On 04/12/2021 12:07, Xiaojuan Yang wrote:
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some
Hi, Yong,
On Tue, Dec 14, 2021 at 07:07:32PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> Introduce the third method GLOBAL_DIRTY_LIMIT of dirty
> tracking for calculate dirtyrate periodly for dirty restraint.
>
> Implement thread for calculate dirtyrate periodly, which
21.12.2021 22:35, Vladimir Sementsov-Ogievskiy wrote:
Add possibility to generate trace points for each qmp command.
We should generate both trace points and trace-events file, for further
trace point code generation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
scripts/qapi/commands.py |
23.12.2021 12:33, Vladimir Sementsov-Ogievskiy wrote:
23.12.2021 01:11, Paolo Bonzini wrote:
Il mar 21 dic 2021, 20:35 Vladimir Sementsov-Ogievskiy mailto:vsement...@virtuozzo.com>> ha scritto:
--- a/trace/meson.build
+++ b/trace/meson.build
@@ -2,10 +2,14 @@
Hi all!
This series aims to add trace points for each qmp command with help of
qapi code generator.
v2:
01: new
02: use qmp_* naming for new trace-events
03: add Philippe's r-b, thanks!
04: rewrite, so that it works now! Thanks to Paolo for fast help!
Vladimir Sementsov-Ogievskiy (4):
jobs:
Add possibility to generate trace points for each qmp command.
We should generate both trace points and trace-events file, for further
trace point code generation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
scripts/qapi/commands.py | 84 ++--
1 file
Hello,
On 12/8/21 04:52, lagar...@linux.ibm.com wrote:
From: Leonardo Garcia
Signed-off-by: Leonardo Garcia
Here is a description of the branches I have put in place over the years
for aspeed and powernv machines on github:
- prev stable branch
dev branch
-
On 12/21/21 20:35, Vladimir Sementsov-Ogievskiy wrote:
> Add and option to generate trace points. We should generate both trace
> points and trace-events files for further trace point code generation.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> scripts/qapi/gen.py | 13
Hi Peter.
Since you reviewed v1, and Ack-by on v2 would be welcomed.
Otherwise, if you don't object, I plan to queue this via
machine-next tree.
Thanks,
Phil.
On 12/18/21 14:04, Philippe Mathieu-Daudé wrote:
> Trivial patches clarifying qdev_connect_gpio_out() use,
> basically that the
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