- add PTE_PBMT bits: It uses two PTE bits, but otherwise has no effect on QEMU,
since QEMU is sequentially consistent and doesn't model PMAs currently
- add PTE_PBMT bit check for inner PTE
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Anup Patel
---
target/riscv/cpu.c
On 24/01/2022 21.15, Alex Bennée wrote:
Left over .gcno files from old builds can really confuse gcov and the
user expects a clean slate after "make clean". Make clean mean clean.
Signed-off-by: Alex Bennée
---
Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Mark Burton wrote:
> All, I believe we will have a followup meeting this coming Tuesday
> 25th January, at 15:00 (presumably using the same link:
> https://redhat.bluejeans.com/5402697718).
>
> We (GreenSocs/Xilinx) would like to quickly show what now ‘works’, and to
> give an update on the
On Tue, Jan 25, 2022 at 4:54 PM LIU Zhiwei wrote:
>
>
> On 2022/1/25 16:40, Guo Ren wrote:
> > On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote:
> >>
> >> On 2022/1/25 14:45, Weiwei Li wrote:
> >>> From: Guo Ren
> >>>
> >>> Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
>
On Tue, Jan 25, 2022 at 3:33 PM Weiwei Li wrote:
>
> This patchset implements virtual memory related RISC-V extensions: Svnapot
> version 1.0, Svinval vesion 1.0, Svpbmt version 1.0.
>
> Specification:
> https://github.com/riscv/virtual-memory/tree/main/specs
>
> The port is available here:
>
On 1/18/22 19:44, Fabiano Rosas wrote:
The 405 ISI does not set SRR1 with any exception syndrome bits, only a
clean copy of the MSR.
Signed-off-by: Fabiano Rosas
I changed the routine in which the removal was done. With that,
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
On 1/18/22 19:44, Fabiano Rosas wrote:
The 405 Program Interrupt does not set SRR1 with any diagnostic bits,
just a clean copy of the MSR.
We're using the BookE Exception Syndrome Register which is different
from the 405.
I restored the setting of SPR_40x_ESR.
Signed-off-by: Fabiano Rosas
On 24/01/2022 21.15, Alex Bennée wrote:
If this starts causing failures again we should probably fix that.
Signed-off-by: Alex Bennée
---
tests/qtest/vhost-user-test.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
Works for me, too:
Tested-by: Thomas Huth
On 1/19/22 07:13, David Gibson wrote:
On Tue, Jan 18, 2022 at 03:44:45PM -0300, Fabiano Rosas wrote:
The 405 has no DSISR or DAR, so convert the trace entry to
trace_ppc_excp_print.
I think it would be preferable to show ESR and DEAR here, which are
very loosely equivalent to DSISR and DAR on
On 2022/1/25 14:45, Weiwei Li wrote:
From: Guo Ren
Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
need to ignore them. They cannot be a part of ppn.
1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture
4.4 Sv39: Page-Based 39-bit Virtual-Memory
On 1/25/2022 3:42 PM, Gerd Hoffmann wrote:
Regarding what interface should be used to load TDVF, there are three
options:
1) pflash: the same as how we load OVMF.
Suppose TDVF support will finally get into OVMF, using this
interface, it's full compatible with normal VMs. No change
> Regarding what interface should be used to load TDVF, there are three
> options:
>
> 1) pflash: the same as how we load OVMF.
>
> Suppose TDVF support will finally get into OVMF, using this
> interface, it's full compatible with normal VMs. No change required
> to QEMU command line and
On 2022/1/25 16:40, Guo Ren wrote:
On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote:
On 2022/1/25 14:45, Weiwei Li wrote:
From: Guo Ren
Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
need to ignore them. They cannot be a part of ppn.
1: The RISC-V Instruction Set
On 1/19/22 07:09, David Gibson wrote:
On Tue, Jan 18, 2022 at 03:44:42PM -0300, Fabiano Rosas wrote:
There's no sc 1.
No... but what exactly should and will happen if you attempt to
execute an "sc 1" on 40x. Will it be treated as an "sc 0", or will it
cause a 0x700? If it's a 0x700, better
On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote:
>
>
> On 2022/1/25 14:45, Weiwei Li wrote:
> > From: Guo Ren
> >
> > Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
> > need to ignore them. They cannot be a part of ppn.
> >
> > 1: The RISC-V Instruction Set Manual, Volume
On 1/25/22 08:23, Cédric Le Goater wrote:
On 1/19/22 07:13, David Gibson wrote:
On Tue, Jan 18, 2022 at 03:44:45PM -0300, Fabiano Rosas wrote:
The 405 has no DSISR or DAR, so convert the trace entry to
trace_ppc_excp_print.
I think it would be preferable to show ESR and DEAR here, which are
Peter Maydell wrote:
> The migration code will not look at a VMStateDescription's
> minimum_version_id_old field unless that VMSD has set the
> load_state_old field to something non-NULL. (The purpose of
> minimum_version_id_old is to specify what migration version is needed
> for the code in
Hi,
> +static void artist_vram_write4(ARTISTState *s, struct vram_buffer *buf,
> + uint32_t offset, uint32_t data)
> +static int get_vram_offset(ARTISTState *s, struct vram_buffer *buf,
> + int pos, int posy)
> +case 0x13a0:
> +
On 24/01/2022 21.15, Alex Bennée wrote:
Signed-off-by: Alex Bennée
Cc: Aaron Lindsay
Message-ID:
---
[AJB] this was for testing, I think you can show the same stuff with
the much more complete execlog now.
---
contrib/plugins/stxp-plugin.c | 50 +++
> @@ -1419,7 +1424,7 @@ static int vmstate_artist_post_load(void *opaque, int
> version_id)
>
> static const VMStateDescription vmstate_artist = {
> .name = "artist",
> -.version_id = 1,
> +.version_id = 2,
Which machines use that device? Usually we try avoid bumping the
version
On Mon, Jan 24, 2022 at 06:09:12PM +0100, BALATON Zoltan wrote:
> On Sun, 16 Jan 2022, BALATON Zoltan wrote:
> > Hello,
> >
> > I have these patches from last October when we've looked at what
> > causes problems with mac99 and USB. We've found the main problem is
> > likely not allowing pending
Hi,
> IMHO the ideal scenario would be for us to have a kernel, initrd
> containing just busybox tools for the key arch targets we care
> about. Those could be used with direct kernel boot or stuffed
> into a disk iamge. Either way, they would boot in ~1 second,
> even with TCG, and would be
On Thu, Jan 20, 2022 at 10:19:27AM +0100, Peter Lieven wrote:
Am 19.01.22 um 15:57 schrieb Stefano Garzarella:
On Fri, Jan 14, 2022 at 11:58:40AM +0100, Ilya Dryomov wrote:
On Thu, Jan 13, 2022 at 3:44 PM Peter Lieven wrote:
V1->V2:
Patch 1: Treat a hole just like an unallocated area.
On 24/01/2022 21.15, Alex Bennée wrote:
From: Philippe Mathieu-Daudé
The previous commit removed all uses of libxml2.
Refresh lcitool submodule, update qemu.yml and refresh the generated
files by running:
$ make lcitool-refresh
Note: This refreshment also removes libudev dependency on
On 1/25/22 09:50, Juan Quintela wrote:
> Mark Burton wrote:
>> All, I believe we will have a followup meeting this coming Tuesday
>> 25th January, at 15:00 (presumably using the same link:
>> https://redhat.bluejeans.com/5402697718).
>>
>> We (GreenSocs/Xilinx) would like to quickly show what now
On 1/21/22 10:31, Vitaly Cheptsov wrote:
Book-E architecture does not set the error code in 31:27 bits
of SRR1, but instead uses these bits for custom fields such
as GS (Guest Supervisor).
Wrongly setting these fields will result in QEMU crashes
when attempting to execute not executable code
On 1/25/22 12:36, Markus Armbruster wrote:
> Juan Quintela writes:
>
>> Hi
>>
>> Please, send any topic that you are interested in covering.
>>
>> This week we have a continuation of 2 weeks ago call to discuss how to
>> enable creation of machines from QMP sooner on the boot.
>>
>> There was
>
> I think these macros which in a hidden way use the bar0 variable really
> should be replaced with inline functions, improving type safety.
>
I second that.
On 1/24/22 19:46, Fabiano Rosas wrote:
This series splits the exception code for BookS CPUs: 970, POWER5+,
POWER7, POWER8, POWER9, POWER10. After dealing with the 405, let's go
back to something more familiar to give everyone a break.
No upfront fixes this time. The pseries code gets used a
Le 25/01/2022 à 03:47, Cameron Esfahani a écrit :
Instead of always returning 0, return actual starttime.
Signed-off-by: Cameron Esfahani
---
linux-user/syscall.c | 28
1 file changed, 28 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
On Wed, Jan 19, 2022 at 04:41:51PM -0500, Jagannathan Raman wrote:
> Specify target VM for exec_command and
> exec_command_and_wait_for_pattern routines
>
> Signed-off-by: Elena Ufimtseva
> Signed-off-by: John G Johnson
> Signed-off-by: Jagannathan Raman
> Reviewed-by: Philippe Mathieu-Daudé
25.01.2022 12:24, Paolo Bonzini wrote:
On 1/24/22 18:37, Vladimir Sementsov-Ogievskiy wrote:
Graph modifications should be done in drained section. stream_prepare()
handler of block stream job call bdrv_set_backing_hd() without using
drained section and it's theoretically possible that some IO
ping
On Mon, 17 Jan 2022 13:02:38 +0100
Halil Pasic wrote:
> The commit 04ceb61a40 ("virtio: Fail if iommu_platform is requested, but
> unsupported") claims to fail the device hotplug when iommu_platform
> is requested, but not supported by the (vhost) device. On the first
> glance the
On Wed, Jan 19, 2022 at 04:41:53PM -0500, Jagannathan Raman wrote:
> Adds pci_isol_bus_new() and pci_isol_bus_free() functions to manage
> creation and destruction of isolated PCI buses. Also adds qdev_get_bus
> and qdev_put_bus callbacks to allow the choice of parent bus.
>
> Signed-off-by:
On Wed, Jan 19, 2022 at 04:41:56PM -0500, Jagannathan Raman wrote:
> Signed-off-by: Elena Ufimtseva
> Signed-off-by: John G Johnson
> Signed-off-by: Jagannathan Raman
> ---
> hw/remote/machine.c | 57 +
> 1 file changed, 57 insertions(+)
>
> diff
On Tue, Jan 25, 2022 at 7:32 PM Peter Maydell wrote:
>
> On Tue, 25 Jan 2022 at 04:14, Akihiko Odaki wrote:
> > I'm neutral about the decision. I think QEMU should avoid using
> > Objective-C code except for interactions with Apple's APIs, and .c is
> > superior in terms of that as it would
On 24/01/2022 23.03, Philippe Mathieu-Daudé via wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
block/export/fuse.c | 48 +
1 file changed, 31 insertions(+), 17 deletions(-)
diff --git a/block/export/fuse.c b/block/export/fuse.c
index
Hi Andrew,
在 2022/1/25 18:26, Andrew Jones 写道:
On Tue, Jan 25, 2022 at 05:15:34PM +0800, chenxiang via wrote:
From: Xiang Chen
Since the patchset ("Build ACPI Heterogeneous Memory Attribute Table (HMAT)"),
HMAT is supported, but only x86 is enabled. Enable HMAT on arm virt machine.
Hi
From: Lucas Coutinho
Move the following instructions to decodetree:
vextsb2w: Vector Extend Sign Byte To Word
vextsh2w: Vector Extend Sign Halfword To Word
vextsb2d: Vector Extend Sign Byte To Doubleword
vextsh2d: Vector Extend Sign Halfword To Doubleword
vextsw2d: Vector Extend Sign Word To
From: Víctor Colombo
Based on [1] by Lijun Pan , which was never merged
into master.
[1]: https://lists.gnu.org/archive/html/qemu-ppc/2020-07/msg00419.html
Signed-off-by: Víctor Colombo
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 4 +++
On 1/24/22 18:37, Vladimir Sementsov-Ogievskiy wrote:
Graph modifications should be done in drained section. stream_prepare()
handler of block stream job call bdrv_set_backing_hd() without using
drained section and it's theoretically possible that some IO request
will interleave with graph
On Mon, Jan 24, 2022 at 12:08 PM Peter Xu wrote:
>
> On Mon, Jan 24, 2022 at 10:20:55AM +0100, Eugenio Perez Martin wrote:
> > On Mon, Jan 24, 2022 at 5:33 AM Peter Xu wrote:
> > >
> > > On Fri, Jan 21, 2022 at 09:27:23PM +0100, Eugenio Pérez wrote:
> > > > +int iova_tree_alloc(IOVATree *tree,
在 2022/1/25 下午5:00, Guo Ren 写道:
On Tue, Jan 25, 2022 at 4:54 PM LIU Zhiwei wrote:
On 2022/1/25 16:40, Guo Ren wrote:
On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote:
On 2022/1/25 14:45, Weiwei Li wrote:
From: Guo Ren
Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
On Wed, Jan 19, 2022 at 04:41:52PM -0500, Jagannathan Raman wrote:
> Allow PCI buses to be part of isolated CPU address spaces. This has a
> niche usage.
>
> TYPE_REMOTE_MACHINE allows multiple VMs to house their PCI devices in
> the same machine/server. This would cause address space collision
25.01.2022 12:07, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
We are going to generate trace events for qmp commands. We should
QMP
generate both trace_*() function calls and trace-events files listing
events for trace generator.
So, add an output module
Vladimir Sementsov-Ogievskiy writes:
> We are going to generate trace events for qmp commands. We should
> generate both trace_*() function calls and trace-events files listing
> events for trace generator.
>
> Now implement that possibility in gen_commands() function.
>
> The functionality will
On Mon, Jan 24, 2022 at 11:50:10AM -0500, Alexander Bulekov wrote:
> On 220124 1630, Stefan Hajnoczi wrote:
> > On Wed, Dec 15, 2021 at 07:24:18PM +0100, Philippe Mathieu-Daudé wrote:
> > > This series aim to kill a recent class of bug, the infamous
> > > "DMA reentrancy" issues found by Alexander
On 1/24/22 19:46, Fabiano Rosas wrote:
Introduce a new powerpc_excp function specific for BookS CPUs. This
commit copies powerpc_excp_legacy verbatim so the next one has a clean
diff.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/excp_helper.c |
On 1/24/22 19:46, Fabiano Rosas wrote:
powerpc_excp_books is BookS only, so remove 40x and BookE code.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/excp_helper.c | 17 -
1 file changed, 17 deletions(-)
diff --git
We previously loaded into in1, but in1 is not filled during
disassembly and hence always zero. This leads to an assertion failure:
qemu-system-s390x: /home/nrb/qemu/include/tcg/tcg.h:654: temp_idx:
Assertion `n >= 0 && n < tcg_ctx->nb_temps' failed.`
Instead, load into a temporary and pass
On 1/19/22 22:43, Patrick Venture wrote:
Use the macro for going from I2CSlave to EEPROMState.
Signed-off-by: Patrick Venture
---
hw/nvram/eeprom_at24c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index
Le 25/01/2022 à 10:41, Laurent Vivier a écrit :
Le 25/01/2022 à 03:47, Cameron Esfahani a écrit :
Instead of always returning 0, return actual starttime.
Signed-off-by: Cameron Esfahani
---
linux-user/syscall.c | 28
1 file changed, 28 insertions(+)
diff --git
On Tue, Jan 25, 2022 at 05:15:34PM +0800, chenxiang via wrote:
> From: Xiang Chen
>
> Since the patchset ("Build ACPI Heterogeneous Memory Attribute Table (HMAT)"),
> HMAT is supported, but only x86 is enabled. Enable HMAT on arm virt machine.
Hi Xiang,
What QEMU commands lines have you tested
On 1/25/22 11:23, Thomas Huth wrote:
> On 24/01/2022 21.15, Alex Bennée wrote:
>> From: Philippe Mathieu-Daudé
>>
>> The previous commit removed all uses of libxml2.
>>
>> Refresh lcitool submodule, update qemu.yml and refresh the generated
>> files by running:
>>
>> $ make lcitool-refresh
>>
* David Hildenbrand (da...@redhat.com) wrote:
> "prealloc=on" for the memory backend does not work as expected, as
> virtio-mem will simply discard all preallocated memory immediately again.
> In the best case, it's an expensive NOP. In the worst case, it's an
> unexpected allocation error.
>
>
Juan Quintela writes:
> Hi
>
> Please, send any topic that you are interested in covering.
>
> This week we have a continuation of 2 weeks ago call to discuss how to
> enable creation of machines from QMP sooner on the boot.
>
> There was already a call about this 2 weeks ago where we didn't
From: "Lucas Mateus Castro (alqotel)"
Changed vmulhuw, vmulhud, vmulhsw, vmulhsd to use
gvec instructions
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 8 +-
target/ppc/int_helper.c | 8 +-
Vladimir Sementsov-Ogievskiy writes:
> We are going to generate trace events for qmp commands. We should
QMP
> generate both trace_*() function calls and trace-events files listing
> events for trace generator.
>
> So, add an output module FOO.trace-events for each FOO schema module.
>
>
Philippe Mathieu-Daudé wrote:
> On 1/11/22 13:45, Juan Quintela wrote:
>> Remove the pages argument. And s/pages/page/
>>
>> Signed-off-by: Juan Quintela
>> Reviewed-by: Philippe Mathieu-Daudé
>> Reviewed-by: Peter Xu
>>
>> --
>
> Note, you need '---' (3x) to have git tools strip the rest
>
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> This will allow us to reduce the number of system calls on the next patch.
>>
>> Signed-off-by: Juan Quintela
>> ---
>> migration/multifd.h | 8 ++--
>> migration/multifd.c | 34
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> So we use multifd to transmit zero pages.
>>
>> Signed-off-by: Juan Quintela
>> ---
>> migration/ram.c | 32 +++-
>> 1 file changed, 31 insertions(+), 1 deletion(-)
>>
>> diff --git
25.01.2022 13:02, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
We are going to generate trace events for qmp commands. We should
generate both trace_*() function calls and trace-events files listing
events for trace generator.
Now implement that possibility in gen_commands()
On Tue, Jan 25, 2022 at 08:44:30AM +0100, Gerd Hoffmann wrote:
> On Mon, Jan 24, 2022 at 06:09:12PM +0100, BALATON Zoltan wrote:
> > On Sun, 16 Jan 2022, BALATON Zoltan wrote:
> > > Hello,
> > >
> > > I have these patches from last October when we've looked at what
> > > causes problems with
On Tue, 25 Jan 2022 at 04:14, Akihiko Odaki wrote:
> I'm neutral about the decision. I think QEMU should avoid using
> Objective-C code except for interactions with Apple's APIs, and .c is
> superior in terms of that as it would prevent accidental introduction
> of Objective-C code. On the other
* Peter Xu (pet...@redhat.com) wrote:
> On Wed, Jan 19, 2022 at 04:36:50PM +, Dr. David Alan Gilbert wrote:
> > * Peter Xu (pet...@redhat.com) wrote:
> > > This patch simplifies unqueue_page() on both sides of it (itself, and
> > > caller).
> > >
> > > Firstly, due to the fact that right
On 1/25/22 09:18, Cédric Le Goater wrote:
On 1/19/22 07:09, David Gibson wrote:
On Tue, Jan 18, 2022 at 03:44:42PM -0300, Fabiano Rosas wrote:
There's no sc 1.
No... but what exactly should and will happen if you attempt to
execute an "sc 1" on 40x. Will it be treated as an "sc 0", or will
* David Hildenbrand (da...@redhat.com) wrote:
> During precopy we usually write all plugged ares and essentially
> allocate them. However, there are two corner cases:
>
> 1) Migrating the zeropage
>
> When the zeropage gets migrated, we first check if the destination range is
> already zero and
On 25.01.22 12:19, Dr. David Alan Gilbert wrote:
> * David Hildenbrand (da...@redhat.com) wrote:
>> "prealloc=on" for the memory backend does not work as expected, as
>> virtio-mem will simply discard all preallocated memory immediately again.
>> In the best case, it's an expensive NOP. In the
On 1/24/22 19:46, Fabiano Rosas wrote:
Since this is now BookS only, we can simplify the code a bit and check
has_hv_mode instead of enumerating the exception models. LPES0 does
not make sense if there is no MSR_HV.
Note that QEMU does not support HV mode on 970 and POWER5+ so we don't
set
On Tue, 25 Jan 2022, Gerd Hoffmann wrote:
On Tue, Jan 25, 2022 at 08:44:30AM +0100, Gerd Hoffmann wrote:
On Mon, Jan 24, 2022 at 06:09:12PM +0100, BALATON Zoltan wrote:
On Sun, 16 Jan 2022, BALATON Zoltan wrote:
Hello,
I have these patches from last October when we've looked at what
causes
From: Lucas Coutinho
Signed-off-by: Lucas Coutinho
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 1 +
target/ppc/translate/vmx-impl.c.inc | 18 ++
2 files changed, 19 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
On Fri, 21 Jan 2022 13:08:41 -0300
Daniel Henrique Barboza wrote:
> cpu_interrupt_exittb() was introduced by commit 044897ef4a22
> ("target/ppc: Fix system lockups caused by interrupt_request state
> corruption") as a way to wrap cpu_interrupt() helper in BQL.
>
> After that, commit
From: Xiang Chen
Since the patchset ("Build ACPI Heterogeneous Memory Attribute Table (HMAT)"),
HMAT is supported, but only x86 is enabled. Enable HMAT on arm virt machine.
Signed-off-by: Xiang Chen
---
hw/arm/Kconfig | 1 +
hw/arm/virt-acpi-build.c | 7 +++
2 files changed, 8
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> This implements the zero page dection and handling.
>>
>> Signed-off-by: Juan Quintela
>>
>> ---
>>
>> Add comment for offset (dave)
>> }
>> }
>>
>> +for (int i = 0; i <
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> Signed-off-by: Juan Quintela
>
> Erm, why?
>
> Dave
>
I messed up.
We need to call this function on multifd.c for zero pages. But the code
that I sent don't have it. Will resend right now.
Later, Juan.
Vladimir Sementsov-Ogievskiy writes:
> 1. Add --no-trace-events to suppress trace events generation in some
>cases, and make trace events be generated by default.
> 2. Add corresponding .trace-events files as outputs in qapi_files
>custom target
> 3. Define global qapi_trace_events list
On Wed, Jan 19, 2022 at 04:41:54PM -0500, Jagannathan Raman wrote:
> Signed-off-by: Elena Ufimtseva
> Signed-off-by: John G Johnson
> Signed-off-by: Jagannathan Raman
> ---
> include/hw/qdev-core.h | 5 +
> softmmu/qdev-monitor.c | 35 +++
> 2 files
On 1/19/22 12:05, Cédric Le Goater wrote:
On 1/16/22 17:45, Peter Maydell wrote:
On Fri, 7 Jan 2022 at 07:29, Alexey Kardashevskiy wrote:
"PowerPC Processor binding to IEEE 1275" says in
"8.2.1. Initial Register Values" that the initial state is defined as
32bit so do it for both SLOF and
On Wed, Jan 19, 2022 at 04:41:55PM -0500, Jagannathan Raman wrote:
> Allow hotplugging of PCI(e) devices to remote machine
>
> Signed-off-by: Elena Ufimtseva
> Signed-off-by: John G Johnson
> Signed-off-by: Jagannathan Raman
> ---
> hw/remote/machine.c | 29 +
> 1
On Tue, 25 Jan 2022 at 08:27, Juan Quintela wrote:
>
> Peter Maydell wrote:
> > The migration code will not look at a VMStateDescription's
> > minimum_version_id_old field unless that VMSD has set the
> > load_state_old field to something non-NULL. (The purpose of
> > minimum_version_id_old is
On 1/24/22 20:33, Philippe Mathieu-Daudé wrote:
> On 1/24/22 20:16, Alex Bennée wrote:
>>
>> Philippe Mathieu-Daudé writes:
>>
>>> On 1/24/22 11:55, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
> This is my last respin on this series which is fully reviewed.
>
Philippe Mathieu-Daudé wrote:
> On 1/25/22 09:50, Juan Quintela wrote:
>> Mark Burton wrote:
>>> All, I believe we will have a followup meeting this coming Tuesday
>>> 25th January, at 15:00 (presumably using the same link:
>>> https://redhat.bluejeans.com/5402697718).
>>>
>>> We
On Mon, 24 Jan 2022, Eric DeVolder wrote:
> This builds the ACPI ERST table to inform OSPM how to communicate
> with the acpi-erst device.
>
> Signed-off-by: Eric DeVolder
> ---
> hw/acpi/erst.c | 188
> +
> 1 file changed, 188
25.01.2022 13:25, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
1. Add --no-trace-events to suppress trace events generation in some
cases, and make trace events be generated by default.
2. Add corresponding .trace-events files as outputs in qapi_files
custom target
3.
25.01.2022 14:03, Vladimir Sementsov-Ogievskiy wrote:
25.01.2022 13:25, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
1. Add --no-trace-events to suppress trace events generation in some
cases, and make trace events be generated by default.
2. Add corresponding
On 24/01/2022 23.03, Philippe Mathieu-Daudé via wrote:
Extract fuse_fallocate_punch_hole() to avoid #ifdef'ry
mixed within if/else statement.
Signed-off-by: Philippe Mathieu-Daudé
---
block/export/fuse.c | 59 +++--
1 file changed, 35 insertions(+),
On 1/21/22 22:38, Daniel Henrique Barboza wrote:
spapr_get_fw_dev_path() is an impl of
FWPathProviderClass::get_dev_path(). This interface is used by
hw/core/qdev-fw.c via fw_path_provider_try_get_dev_path() in two
functions:
- static char *qdev_get_fw_dev_path_from_handler(), which is used
Vladimir Sementsov-Ogievskiy writes:
> 25.01.2022 14:03, Vladimir Sementsov-Ogievskiy wrote:
>> 25.01.2022 13:25, Markus Armbruster wrote:
>>> Vladimir Sementsov-Ogievskiy writes:
>>>
1. Add --no-trace-events to suppress trace events generation in some
cases, and make trace events
On Tue, Jan 25, 2022 at 04:23:49PM +0530, Ani Sinha wrote:
>
>
> On Mon, 24 Jan 2022, Eric DeVolder wrote:
>
> > This builds the ACPI ERST table to inform OSPM how to communicate
> > with the acpi-erst device.
> >
> > Signed-off-by: Eric DeVolder
> > ---
> > hw/acpi/erst.c | 188
> >
On 1/24/22 19:46, Fabiano Rosas wrote:
Remove setting of BookE registers.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/excp_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
On 1/24/22 19:46, Fabiano Rosas wrote:
Differences from the generic powerpc_excp code:
- Not BookE, so some MSR bits are cleared at interrupt dispatch;
- Always uses HV_EMU if the CPU has MSR_HV;
- Exceptions always delivered in 64 bit.
Exceptions used:
POWERPC_EXCP_ALIGN
POWERPC_EXCP_DECR
From: Matheus Ferst
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 30 --
target/ppc/insn32.decode| 24
target/ppc/int_helper.c | 54 -
target/ppc/translate/vmx-impl.c.inc | 91 -
From: Matheus Ferst
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 4 ++
target/ppc/translate/vsx-impl.c.inc | 71 +
target/ppc/translate/vsx-ops.c.inc | 2 -
3 files changed, 36 insertions(+), 41 deletions(-)
diff --git
From: Matheus Ferst
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 8
target/ppc/translate/vmx-impl.c.inc | 32 +
2 files changed, 40 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index
From: Matheus Ferst
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 1 +
target/ppc/insn64.decode| 8 ++
target/ppc/int_helper.c | 42 ++
target/ppc/translate/vsx-impl.c.inc | 121
4 files changed, 172
From: Matheus Ferst
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 4 ++
target/ppc/insn32.decode| 10
target/ppc/int_helper.c | 84 +
target/ppc/translate/vsx-impl.c.inc | 29 ++
4 files changed, 127
To support reconnecting after restart or crash, VDUSE backend
might need to resubmit inflight I/Os. This stores the metadata
such as the index of inflight I/O's descriptors to a shm file so
that VDUSE backend can restore them during reconnecting.
Signed-off-by: Xie Yongji
---
From: Matheus Ferst
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 1 +
target/ppc/insn64.decode| 8
target/ppc/int_helper.c | 20
target/ppc/translate/vsx-impl.c.inc | 22 ++
4 files changed,
On Tue, Jan 25, 2022 at 07:46:43PM +0800, chenxiang (M) wrote:
> Hi Andrew,
>
>
> 在 2022/1/25 18:26, Andrew Jones 写道:
> > On Tue, Jan 25, 2022 at 05:15:34PM +0800, chenxiang via wrote:
> > > From: Xiang Chen
> > >
> > > Since the patchset ("Build ACPI Heterogeneous Memory Attribute Table
> >
From: Víctor Colombo
Signed-off-by: Víctor Colombo
Signed-off-by: Matheus Ferst
---
target/ppc/fpu_helper.c | 4
target/ppc/helper.h | 3 +++
target/ppc/insn32.decode| 3 +++
target/ppc/translate/vsx-impl.c.inc | 31 +
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