The GICv3 has some registers that support byte accesses, and some
that support 8-byte accesses. Our TCG implementation implements all
of this, switching on the 'size' argument and handling the registers
that must support reads of that size while logging an error for
attempted accesses to
From: Akihiko Odaki
This provides standard look and feel for the about panel and reduces
code.
Signed-off-by: Akihiko Odaki
Message-id: 20220227042241.1543-1-akihiko.od...@gmail.com
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
ui/cocoa.m | 112
The trace_gicv3_icv_hppir_read trace event takes an integer value
which it uses to form the register name, which should be either
ICV_HPPIR0 or ICV_HPPIR1. We were passing in the 'grp' variable for
this, but that is either GICV3_G0 or GICV3_G1NS, which happen to be 0
and 2, which meant that
From: Marc-André Lureau
The VssCoordinator & VssAdmin interfaces have been moved to vsadmin.h in
the Windows SDK.
Signed-off-by: Marc-André Lureau
Message-Id: <20220222194008.610377-3-marcandre.lur...@redhat.com>
Signed-off-by: Paolo Bonzini
---
meson.build| 3 +++
From: Jing Liu
Intel introduces XFD faulting mechanism for extended
XSAVE features to dynamically enable the features in
runtime. If CPUID (EAX=0Dh, ECX=n, n>1).ECX[2] is set
as 1, it indicates support for XFD faulting of this
state component.
Signed-off-by: Jing Liu
Signed-off-by: Yang Zhong
This is flaky and sometimes fails or hangs unexplicably.
Signed-off-by: Paolo Bonzini
---
.gitlab-ci.d/buildtest.yml | 2 --
1 file changed, 2 deletions(-)
diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml
index 0aa70213fb..0aea7ab84c 100644
--- a/.gitlab-ci.d/buildtest.yml
Signed-off-by: Paolo Bonzini
---
scripts/meson-buildoptions.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/meson-buildoptions.sh b/scripts/meson-buildoptions.sh
index 9ee684ef03..1e26f4571e 100644
--- a/scripts/meson-buildoptions.sh
+++
From: David Miller
Adds clobbers and merges remaining separate asm statements.
Signed-off-by: David Miller
Message-Id: <20220301214305.2778-1-dmiller...@gmail.com>
Reviewed-by: Richard Henderson
[thuth: dropped changes to mie3-compl.c, whitespace fixes]
Signed-off-by: Thomas Huth
---
The existing log type 'LOG_UNIMP' is being used as a way to indicate
that a certain feature is not implemented, and to indicate that a
feature is unsupported. Most of the time both cases are similar, until
you want to debug a guest that is running a not so common OS (e.g. AIX
guest in a pseries
Hi,
I got a lot of noise trying to debug an AIX guest in a pseries machine when
running with
'-d unimp'. The reason is that there is no distinction between features
(in my case, hypercalls) that are unimplemented because we never considered,
versus features that we made a design choice not to
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_hcall.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index f008290787..f6778d6857 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -865,7 +865,7 @@ static
Currently qemu_try_memalign()'s behaviour if asked to allocate
0 bytes is rather variable:
* on Windows, we will assert
* on POSIX platforms, we get the underlying behaviour of
the posix_memalign() or equivalent function, which may be
either "return a valid non-NULL pointer" or "return
For VLD1/VST1 (single element to one lane) we are only accessing one
register, and so the 'stride' is meaningless. The bits that would
specify stride (insn bit [4] for size=1, bit [6] for size=2) are
specified to be zero in the encoding (which would correspond to a
stride of 1 for VLD2/VLD3/VLD4
From: Richard Henderson
There is a Linux kernel bug present until v5.12 that prevents
booting with FEAT_LPA2 enabled. As a workaround for TCG, allow
the feature to be disabled from -cpu max.
Since this kernel bug is present in the Fedora 31 image that
we test in avocado, disable lpa2 on the
For VLD3 (single 3-element structure to one lane), there is no
alignment specification and the alignment bits in the instruction
must be zero. This is bit [4] for the size=0 and size=1 cases, and
bits [5:4] for the size=2 case. We do this check correctly in
VLDST_single(), but we write it a bit
On Sun, 6 Mar 2022 16:31:05 -0500
"Michael S. Tsirkin" wrote:
> On Sun, Mar 06, 2022 at 05:41:15PM +, Jonathan Cameron wrote:
> > From: Ben Widawsky
> >
> > CXL 2.0 specification adds 2 new dwords to the existing _OSC definition
> > from PCIe. The new dwords are accessed with a new uuid.
On Fri, Mar 04, 2022 at 03:27:04PM -0600, Eric Blake wrote:
> On Fri, Mar 04, 2022 at 07:36:10PM +, Daniel P. Berrangé wrote:
> > This validates that connections to an NBD server running on a UNIX
> > socket can use TLS with pre-shared keys (PSK).
> >
> > Reviewed-by: Eric Blake
> >
On 07.03.22 15:13, laokz wrote:
Some qemu-iotests(040 etc) use PCI disk to do test. Without the
mapping, RISC-V flavor use spike as default machine which has no
PCI bus, causing test failure.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/894
Signed-off-by: laokz
Hi!
Thank you for
On 2022-03-07 16:58, Tom Tromey wrote:
>> "Stefan" == Stefan Hajnoczi writes:
>
> Stefan> I hoped that "select-frame address ADDRESS" could be used instead so
> Stefan> this would work on coredumps too. Unfortunately "select-frame" only
> Stefan> searches stack frames that GDB is already
Something like:
https://patchew.org/QEMU?output=atom
Returns:
http://www.w3.org/2005/Atom;>
Patchew Patches
for project:QEMU
http://patchew.org/QEMU?output=atom; rel="self" />
http://patchew.org/QEMU; />
urn:uuid:60a76c80-d399-11d9-b91C-0003939e0af6
On 3/7/22 04:19, Paolo Bonzini wrote:
This is flaky and sometimes fails or hangs unexplicably.
Signed-off-by: Paolo Bonzini
---
.gitlab-ci.d/buildtest.yml | 2 --
1 file changed, 2 deletions(-)
Reviewed-by: Richard Henderson
r~
The following changes since commit 99c53410bc9d50e556f565b0960673cccb566452:
Merge remote-tracking branch
'remotes/thuth-gitlab/tags/pull-request-2022-02-28' into staging (2022-03-01
13:25:54 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git
LA57/PKE/PKS is only relevant in 64-bit mode, and NXE is only relevant if
PAE is in use. Since there is code that checks PG_MODE_LA57 to determine
the canonicality of addresses, make sure that the bit is not set by
mistake in 32-bit mode. While it would not be a problem because 32-bit
addresses
From: "Longpeng(Mike)"
We invoke the kvm_irqchip_commit_routes() for each addition to MSI route
table, which is not efficient if we are adding lots of routes in some cases.
This patch lets callers invoke the kvm_irqchip_commit_routes(), so the
callers can decide how to optimize.
[1]
From: Zeng Guang
XFD(eXtended Feature Disable) allows to enable a
feature on xsave state while preventing specific
user threads from using the feature.
Support save and restore XFD MSRs if CPUID.D.1.EAX[4]
enumerate to be valid. Likewise migrate the MSRs and
related xsave state necessarily.
From: Maxim Levitsky
Even when the feature is not supported in guest CPUID,
still set the msr to the default value which will
be the only value KVM will accept in this case
Signed-off-by: Maxim Levitsky
Message-Id: <20220223115824.319821-1-mlevi...@redhat.com>
Signed-off-by: Paolo Bonzini
---
On 07/03/2022 13.50, Daniel P. Berrangé wrote:
On Mon, Feb 28, 2022 at 12:43:25PM +0100, Thomas Huth wrote:
The BootLinux tests are currently failing with an ugly python
stack trace on my RHEL8 system since they cannot get a free port
(likely due to the firewall settings on my system). Let's
On 3/6/22 16:03, David Miller wrote:
+static DisasJumpType op_vstrs(DisasContext *s, DisasOps *o)
+{
+const uint8_t es = get_field(s, m5);
+const uint32_t D = get_field(s, m6);
+
+if (es > ES_32) {
+gen_program_exception(s, PGM_SPECIFICATION);
+return DISAS_NORETURN;
This is another hcall that is part of the Partition Energy Management
(PEM) option. As with h_get_em_parms(), we do not support it.
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_hcall.c | 27 +++
include/hw/ppc/spapr.h | 1 +
2 files changed, 28
Yes, fixed.
On Fri, 4 Mar 2022 at 16:02, Philippe Mathieu-Daudé
wrote:
>
> On 2/3/22 02:50, Titus Rwantare wrote:
> > Signed-off-by: Titus Rwantare
> > ---
> > hw/i2c/pmbus_device.c | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/hw/i2c/pmbus_device.c
On 7/3/22 16:38, Stefan Hajnoczi wrote:
The coroutine implementation uses __thread variables internally. Compiler
optimizations may cache Thread-Local Storage values across
qemu_coroutine_yield(), leading to stale values being used after the coroutine
is re-entered from another thread.
Kevin
On [2022 Mar 04] Fri 12:09:20, Patrick Williams wrote:
> The w25q01jvq is a 128MB part. Support is being added to the kernel[1]
> and the two have been tested together.
>
> 1. https://lore.kernel.org/lkml/2022022209.23108-1-potin@quantatw.com/
>
> Signed-off-by: Patrick Williams
> Cc:
On 3/7/22 16:34, Akihiko Odaki wrote:
Thanks for this interesting suggestion. However I don't think this
improves the situation much. The main contribution of this change is
that elimination of display_init_sem but it is still necessary for
command line usage of the executable.
On Tue, Mar 8, 2022 at 1:39 AM Paolo Bonzini wrote:
>
> On 3/7/22 16:34, Akihiko Odaki wrote:
> > Thanks for this interesting suggestion. However I don't think this
> > improves the situation much. The main contribution of this change is
> > that elimination of display_init_sem but it is still
On Mon, 7 Mar 2022 at 17:06, Peter Maydell wrote:
>
> On Mon, 7 Mar 2022 at 10:01, Michael S. Tsirkin wrote:
> >
> > The following changes since commit 6629bf78aac7e53f83fd0bcbdbe322e2302dfd1f:
> >
> > Merge remote-tracking branch
> > 'remotes/pmaydell/tags/pull-target-arm-20220302' into
On 3/6/22 16:03, David Miller wrote:
Signed-off-by: David Miller
---
target/s390x/helper.h | 4 +++
target/s390x/tcg/translate_vx.c.inc | 44 ++---
target/s390x/tcg/vec_fpu_helper.c | 31
3 files changed, 75 insertions(+), 4
From: Vitaly Kuznetsov
5-level EPT is present in Icelake Server CPUs and is supported by QEMU
('vmx-page-walk-5').
Signed-off-by: Vitaly Kuznetsov
Message-Id: <20220221145316.576138-2-vkuzn...@redhat.com>
Signed-off-by: Paolo Bonzini
---
scripts/kvm/vmxcap | 1 +
1 file changed, 1
From: Ivan Shcherbakov
Make sure that pausing the VM while in 64-bit mode will set the
HF_CS64_MASK flag in env->hflags (see x86_update_hflags() in
target/i386/cpu.c).
Without it, the code in gdbstub.c would only use the 32-bit register values
when debugging 64-bit targets, making debugging
The old image did not have python3 yet, and thus was not usable
for compiling QEMU anymore.
Suggested-by: Alexander von Gluck IV
Message-Id: <20220216154208.2985103-1-kallis...@unixzen.com>
Signed-off-by: Thomas Huth
---
tests/vm/haiku.x86_64 | 8
1 file changed, 4 insertions(+), 4
The exrl-trt* tests use two pre-initialized variables for the
results of the assembly code:
uint64_t r1 = 0xull;
uint64_t r2 = 0xull;
But then the assembly code copies over the full contents
of the register into the output variable, without taking
care of
On Mon, Mar 07, 2022 at 07:31:50PM +0100, Thomas Huth wrote:
> On 07/03/2022 13.50, Daniel P. Berrangé wrote:
> > On Mon, Feb 28, 2022 at 12:43:25PM +0100, Thomas Huth wrote:
> > > The BootLinux tests are currently failing with an ugly python
> > > stack trace on my RHEL8 system since they cannot
The instruction description says "It is loaded without rounding
errors." which implies we should have the widest rounding mode
possible.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/888
Signed-off-by: Alex Bennée
---
target/i386/tcg/fpu_helper.c | 4
1 file changed, 4
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_hcall.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index f6778d6857..5839b6a749 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -873,7 +873,7 @@ static
On Tue, Mar 8, 2022 at 2:21 AM Paolo Bonzini wrote:
>
> On 3/7/22 17:41, Akihiko Odaki wrote:
> >> That series doesn't remove the general design that has quite a bit
> >> of "we know some other thread holds the lock and waits for us" code.
> > Well, I don't think so. main no longer calls back
This hcall is part of the Partition Energy Management (PEM) option,
described in PAPR+ V2.89 section 14.14.2. We do not support any form of
energy management in QEMU, so instead of logging this hcall as
unimplemented let's log it as unsupported.
This hcall is popular with AIX 7.2. The terminal
On Sat, Mar 5, 2022 at 5:57 AM Peter Maydell wrote:
>
> We use the nsis.py script to write out an installer script Section
> for each emulator executable, so the exact set of Sections depends on
> which executables were built. However the part of qemu.nsi which
> specifies mouse-over
From: Richard Henderson
There is a Linux kernel bug present until v5.12 that prevents
booting with FEAT_LPA2 enabled. As a workaround for TCG,
disable this feature for machine versions prior to 7.0.
Cc: Daniel P. Berrangé
Signed-off-by: Richard Henderson
Signed-off-by: Peter Maydell
Instead of assuming that all CONFIG_BSD have valloc() and anything
else is memalign(), explicitly check for those functions in
meson.build and use the "is the function present" define. Tests for
specific functionality are better than which-OS checks; this also
lets us give a helpful error message
We forgot a space in some log messages, so the output ended
up looking like
gicv3_dist_write: invalid guest write at offset 8000size 8
with a missing space before "size". Add the missing spaces.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id:
On Mon, 7 Mar 2022 at 10:01, Michael S. Tsirkin wrote:
>
> The following changes since commit 6629bf78aac7e53f83fd0bcbdbe322e2302dfd1f:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20220302' into staging (2022-03-03
> 14:46:48 +)
>
> are available in the Git
On Sun, Mar 6, 2022 at 6:19 PM Philippe Mathieu-Daudé <
philippe.mathieu.da...@gmail.com> wrote:
> From: Gustavo Noronha Silva
>
> Applications such as Gnome may use Alt-Tab and Super-Tab for different
> purposes, some use Ctrl-arrows so we want to allow qemu to handle
> everything when it
> "Stefan" == Stefan Hajnoczi writes:
Stefan> I hoped that "select-frame address ADDRESS" could be used instead so
Stefan> this would work on coredumps too. Unfortunately "select-frame" only
Stefan> searches stack frames that GDB is already aware of, so it cannot be used
Stefan> to backtrace
From: Yang Zhong
Kernel allocates 4K xstate buffer by default. For XSAVE features
which require large state component (e.g. AMX), Linux kernel
dynamically expands the xstate buffer only after the process has
acquired the necessary permissions. Those are called dynamically-
enabled XSAVE features
From: Jing Liu
The extended state subleaves (EAX=0Dh, ECX=n, n>1).ECX[1]
indicate whether the extended state component locates
on the next 64-byte boundary following the preceding state
component when the compacted format of an XSAVE area is
used.
Right now, they are all zero because no
This reverts commits d316859f4e28c74ab8b618895d2a5e0a865d3cf1
and 308c8475bc9d7e352125dea42950afbaf9daadfe.
The TAP output is inferior in that it does not include the diff for
failed tests; there are also cases (for skipped tests) where
the TAP output is incorrect.
Reported-by: Peter Maydell
The BootLinux tests are currently failing with an ugly python
stack trace on my RHEL8 system since they cannot get a free port
(likely due to the firewall settings on my system). Let's properly
check the return value of find_free_port() instead and cancel the
test gracefully if it cannot get a
On Mon, 7 Mar 2022 at 15:34, Akihiko Odaki wrote:
>
> On 2022/03/08 0:10, Paolo Bonzini wrote:
> > Simplify the initialization dance by running qemu_init() in the main
> > thread before the Cocoa event loop starts. The cocoa_display_init()
> > code that is post-applicationDidFinishLaunching:
On Tue, Mar 8, 2022 at 1:14 AM Peter Maydell wrote:
>
> On Mon, 7 Mar 2022 at 15:34, Akihiko Odaki wrote:
> >
> > On 2022/03/08 0:10, Paolo Bonzini wrote:
> > > Simplify the initialization dance by running qemu_init() in the main
> > > thread before the Cocoa event loop starts. The
We implement qemu_memalign() in both oslib-posix.c and oslib-win32.c,
but the two versions are essentially the same: they call
qemu_try_memalign(), and abort() after printing an error message if
it fails. The only difference is that the win32 version prints the
GetLastError() value whereas the
Currently we incorrectly think that posix_memalign() exists on
Windows. This is because of a combination of:
* the msys2/mingw toolchain/libc claim to have a
__builtin_posix_memalign when there isn't a builtin of that name
* meson will assume that if you have a __builtin_foo that
counts
On Sun, Mar 6, 2022 at 6:19 PM Philippe Mathieu-Daudé <
philippe.mathieu.da...@gmail.com> wrote:
> From: Gustavo Noronha Silva
>
> On Mac OS X the Option key maps to Alt and Command to Super/Meta. This
> change
> swaps them around so that Alt is the key closer to the space bar and
> Meta/Super
>
On 3/1/22 04:46, marcandre.lur...@redhat.com wrote:
Replace the global variables with inlined helper functions. getpagesize() is
very
likely annotated with a "const" function attribute (at least with glibc), and
thus
optimization should apply even better.
This avoids the need for a
From: Marc-André Lureau
The headers are now all available in MinGW master branch.
(commit 13390dbbf885f and earlier) aiming for 10.0.
Signed-off-by: Marc-André Lureau
Message-Id: <20220222194008.610377-4-marcandre.lur...@redhat.com>
Signed-off-by: Paolo Bonzini
---
qga/meson.build | 2 +-
1
From: "Longpeng(Mike)"
Paolo suggested adding the new API to support route changes [1]. We should
invoke
kvm_irqchip_begin_route_changes() before changing the routes, increasing the
KVMRouteChange.changes if the routes are changed, and commit the changes at
last.
[1]
Signed-off-by: Paolo Bonzini
---
linux-headers/asm-x86/kvm.h | 3 +++
linux-headers/linux/kvm.h | 4
2 files changed, 7 insertions(+)
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index 2da3316bb5..bf6e96011d 100644
--- a/linux-headers/asm-x86/kvm.h
+++
From: Rohit Kumar
Qemu might crash when provided incomplete '-global' option.
For example:
qemu-system-x86_64 -global driver=isa-fdc
qemu-system-x86_64: ../../devel/qemu/qapi/string-input-visitor.c:394:
string_input_visitor_new: Assertion `str' failed.
Aborted (core dumped)
The FreeBSD CI definitions now reside in other files than .cirrs.yml.
Update the entry in MAINTAINERS accordingly.
Message-Id: <20220217141138.917292-1-th...@redhat.com>
Signed-off-by: Thomas Huth
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS
On Mon, 7 Mar 2022 at 10:35, Hanna Reitz wrote:
>
> The following changes since commit 9d662a6b22a0838a85c5432385f35db2488a33a5:
>
> Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220305' into
> staging (2022-03-05 18:03:15 +)
>
> are available in the Git repository at:
>
>
Some qemu-iotests(040 etc) use PCI disk to do test. Without the
mapping, RISC-V flavor use spike as default machine which has no
PCI bus, causing test failure.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/894
Signed-off-by: laokz
---
tests/qemu-iotests/testenv.py | 2 ++
1 file
On Tue, Mar 8, 2022 at 12:32 AM Paolo Bonzini wrote:
>
> On 3/7/22 14:49, Akihiko Odaki wrote:
> > ui/cocoa: Create menus in iothread
> >
> > Commit 0439c5a4623d674efa0c72abd62ca6e98bb7cf87 introduced an
> > assertion that blk_all_next is called in the main thread. The function
> > is called in
Hi,
Hope this mail finds you well. I have updated the code as required and
request you to review and suggest changes that are needed to be
implemented. In case no change is required, please do let me know the
next steps for the same.
Regards,
Kshitij Suri
On 01/03/22 12:14 pm, Kshitij
On Tue, Mar 8, 2022 at 1:35 AM Peter Maydell wrote:
>
> On Mon, 7 Mar 2022 at 16:27, Akihiko Odaki wrote:
> > On Tue, Mar 8, 2022 at 1:14 AM Peter Maydell
> > wrote:
> > > The main benefit of Paolo's suggestion from my point of view is
> > > that it entirely eliminates the odd situation where
For debugging guest use of the ITS, it can be helpful to trace
when the ITS reads and writes the in-memory tables.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20220303202341.2232284-3-peter.mayd...@linaro.org
---
hw/intc/arm_gicv3_its.c | 37
qemu_vfree() is the companion free function to qemu_memalign(); put
it in memalign.c so the allocation and free functions are together.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20220226180723.1706285-9-peter.mayd...@linaro.org
Reviewed-by: Philippe Mathieu-Daudé
On 3/7/22 16:10, Paolo Bonzini wrote:
+COCOA_DEBUG("Second thread: calling qemu_main()\n");
+qemu_main_loop();
This should do qemu_mutex_lock_iothread() before calling qemu_main_loop().
Paolo
On 3/7/22 17:41, Akihiko Odaki wrote:
That series doesn't remove the general design that has quite a bit
of "we know some other thread holds the lock and waits for us" code.
Well, I don't think so. main no longer calls back QEMU code (and it
should never do so in my opinion).
That's an
The Fedora 29 kernel is quite old and importantly fails when running
in LPA2 scenarios. As it's not really exercising much of the CPU space
replace it with a custom 5.16.12 kernel with all the architecture
options turned on. There is a minimal buildroot initramfs included in
the kernel which has a
Hi Marc-Andre,
>
> Hi Vivek
>
> On Mon, Mar 7, 2022 at 8:39 AM Vivek Kasireddy
> wrote:
> >
> > Since not all listeners (i.e VirtualConsoles) of GL events have
> > a valid EGL context, make sure that there is a valid context
> > before making EGL calls.
> >
> > This fixes the following crash
Florian> I'm a bit surprised by this. Conceptually, why would GDB need to know
Florian> about stack boundaries? Is there some heuristic to detect broken
Florian> frames?
Yes, the infamous "previous frame inner to this frame" error message. I
think this is primarily intended to detect stack
From: Marc-André Lureau
This is a left-over, despite requesting the change before the merge.
Fixes: commit 8821a389 ("configure, meson: replace VSS SDK checks and options
with --enable-vss-sdk")
Signed-off-by: Marc-André Lureau
Message-Id: <20220222194008.610377-2-marcandre.lur...@redhat.com>
From: Jing Liu
When dynamic xfeatures (e.g. AMX) are used by the guest, the xsave
area would be larger than 4KB. KVM_GET_XSAVE2 and KVM_SET_XSAVE
under KVM_CAP_XSAVE2 works with a xsave buffer larger than 4KB.
Always use the new ioctls under KVM_CAP_XSAVE2 when KVM supports it.
Signed-off-by:
From: Jing Liu
The AMX TILECFG register and the TMMx tile data registers are
saved/restored via XSAVE, respectively in state component 17
(64 bytes) and state component 18 (8192 bytes).
Add AMX feature bits to x86_ext_save_areas array to set
up AMX components. Add structs that define the layout
From: Vitaly Kuznetsov
Windows 11 with WSL2 enabled (Hyper-V) fails to boot with Icelake-Server
{-v5} CPU model but boots well with '-cpu host'. Apparently, it expects
5-level paging and 5-level EPT support to come in pair but QEMU's
Icelake-Server CPU model lacks the later. Introduce
Hi Peter!
The following changes since commit 9d662a6b22a0838a85c5432385f35db2488a33a5:
Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220305' into
staging (2022-03-05 18:03:15 +)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git
These instructions use addressing with a "base address", meaning
that if register r0 is used, it is always treated as zero, no matter
what value is stored in the register. So we have to make sure not
to use register r0 for these instructions in our tests. There was
no problem with GCC so far since
H_GET_PPP is a SPLPAR hcall that we aren't able to support because, at
least for now, we can't retrieve any performance metrics of the
partition.
Mark it as unsupported.
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_hcall.c | 16
1 file changed, 16 insertions(+)
On Sat, Mar 5, 2022 at 5:57 AM Peter Maydell wrote:
>
> We currently list the emulators in the Windows installer's dialog
> in an essentially random order (it's whatever glob.glob() returns
> them to, which is filesystem-implementation-dependent). Add a
> call to sorted() so they appear in
On 3/7/22 08:44, Alex Bennée wrote:
The instruction description says "It is loaded without rounding
errors." which implies we should have the widest rounding mode
possible.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/888
Signed-off-by: Alex Bennée
---
target/i386/tcg/fpu_helper.c
add self to MAINTAINERS for the PMBus subsystem and related sensors,
and set PMBus as maintained.
Signed-off-by: Titus Rwantare
Reviewed-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Signed-off-by: Titus Rwantare
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i2c/pmbus_device.c | 47 ---
include/hw/i2c/pmbus_device.h | 2 ++
2 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c
Signed-off-by: Titus Rwantare
Reviewed-by: Hao Wu
Reviewed-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 3 +
hw/arm/Kconfig | 1 +
hw/sensor/Kconfig| 5 +
hw/sensor/isl_pmbus_vr.c | 211 +
Signed-off-by: Titus Rwantare
Reviewed-by: Hao Wu
Reviewed-by: Philippe Mathieu-Daudé
---
hw/sensor/isl_pmbus_vr.c | 50 ++
include/hw/sensor/isl_pmbus_vr.h | 1 +
tests/qtest/isl_pmbus_vr-test.c | 72
3 files changed, 123
On Mon, Mar 7, 2022 at 5:24 PM Cédric Le Goater wrote:
>
> Currently, the allocation of the flash devices uses the number of
> slave selects configured in the SoC realize routine. It is simpler to
> use directly the number of FMC devices defined in the machine class
> and 1 for spi devices (which
Up to now the virt-machine node only contains a virtio-mmio
driver node but no driver that eventually produces any pci-bus
interface.
Hence, PCI libqos tests cannot be run with aarch64 binary.
This series brings the pieces needed to be able to run PCI tests
with the aarch64 binary: a
Up to now the virt-machine node contains a virtio-mmio node.
However no driver produces any PCI interface node. Hence, PCI
tests cannot be run with aarch64 binary.
Add a GPEX driver node that produces a pci interface node. This latter
then can be consumed by all the pci tests. One of the first
As part of disentangling the monolithic nature of _do_accept(), split
out the incoming callback to prepare for factoring out the "wait for a
peer" step. Namely, this means using an event signal we can wait on from
outside of this method.
Signed-off-by: John Snow
Acked-by: Kevin Wolf
legacy.py provides a synchronous model. iotests frequently uses this
paradigm:
- create QMP client object
- start QEMU process
- await connection from QEMU process
In the switch from sync to async QMP, the QMP client object stopped
calling bind() and listen() during the QMP object creation
Mea culpa. Dan's patch wound up with the wrong import path because I
re-ordered my most recent pull request and missed that this needed a fix
on rebase.
Fixes: 43912529
Reported-by: Kashyap Chamarthy
Signed-off-by: John Snow
Tested-by: Kashyap Chamarthy
Message-id:
From: Ani Sinha
The current smbios table implementation splits the main memory in 16 GiB
(DIMM like) chunks. With the current smbios table assignment code, we can have
only 512 such chunks before the 16 bit handle numbers in the header for tables
17 and 19 conflict. A guest with more than 8 TiB
From: Viresh Kumar
VIRTIO_I2C_F_ZERO_LENGTH_REQUEST is a mandatory feature, that must be
implemented by everyone. Add its support.
Reviewed-by: Alex Bennée
Signed-off-by: Viresh Kumar
Message-Id:
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
301 - 400 of 567 matches
Mail list logo
