Re: [PATCH v4 25/54] block/vvfat: Unify the mkdir() call

Hi Kevin, On Tue, Sep 27, 2022 at 7:07 PM Bin Meng wrote: > > From: Bin Meng > > There is a difference in the mkdir() call for win32 and non-win32 > platforms, and currently is handled in the codes with #ifdefs. > > glib provides a portable g_mkdir() API and we can use it to unify > the codes

Re: [PATCH v4 02/54] semihosting/arm-compat-semi: Avoid using hardcoded /tmp

Hi Alex, On Tue, Sep 27, 2022 at 7:06 PM Bin Meng wrote: > > From: Bin Meng > > Use g_get_tmp_dir() to get the directory to use for temporary files. > > Signed-off-by: Bin Meng > Reviewed-by: Alex Bennée > --- > > (no changes since v1) > Would you pick up this patch in your queue? Regards,

Question about RISC-V brom register a1 set value

Hi, qemu As I know, brom will pass 3 parameters to the next stage bootloader, ex: openSBI. a0 will pass hartid, a2 will pass fw_dynamic_info start address. although a1 doesn't use directly in openSBI. a1 read value is determined in compile time rather than read from the original a1 that passes

Re: [PATCH v4 04/54] util/qemu-sockets: Use g_get_tmp_dir() to get the directory for temporary files

Hi Daniel, On Tue, Sep 27, 2022 at 7:06 PM Bin Meng wrote: > > From: Bin Meng > > Replace the existing logic to get the directory for temporary files > with g_get_tmp_dir(), which works for win32 too. > > Signed-off-by: Bin Meng > Reviewed-by: Marc-André Lureau > --- > > (no changes since v1)

Re: [PATCH v2 23/23] target/i386: Enable TARGET_TB_PCREL

On 9/21/22 06:31, Paolo Bonzini wrote: On Tue, Sep 6, 2022 at 12:10 PM Richard Henderson wrote: static void gen_update_eip_cur(DisasContext *s) { gen_jmp_im(s, s->base.pc_next - s->cs_base); +s->pc_save = s->base.pc_next; s->pc_save is not valid after all gen_jmp_im() calls. Is

Re: [PATCH v4 26/54] fsdev/virtfs-proxy-helper: Use g_mkdir()

Hi Christian, On Tue, Sep 27, 2022 at 7:07 PM Bin Meng wrote: > > From: Bin Meng > > Use g_mkdir() to create a directory on all platforms. > > Signed-off-by: Bin Meng > Reviewed-by: Christian Schoenebeck > --- > > (no changes since v2) > > Changes in v2: > - Change to use g_mkdir() > >

Re: [PATCH v4 27/54] hw/usb: dev-mtp: Use g_mkdir()

Hi Gerd, On Tue, Sep 27, 2022 at 7:07 PM Bin Meng wrote: > > From: Bin Meng > > Use g_mkdir() to create a directory on all platforms. > > Signed-off-by: Bin Meng > Acked-by: Gerd Hoffmann > --- > > (no changes since v2) > > Changes in v2: > - Change to use g_mkdir() > > hw/usb/dev-mtp.c | 4

Re: [PATCH v4 03/54] tcg: Avoid using hardcoded /tmp

Hi Alex, Richard, On Tue, Sep 27, 2022 at 7:06 PM Bin Meng wrote: > > From: Bin Meng > > Use g_get_tmp_dir() to get the directory to use for temporary files. > > Signed-off-by: Bin Meng > Reviewed-by: Marc-André Lureau > Reviewed-by: Alex Bennée > --- > > (no changes since v2) > > Changes in

[PATCH] pci-ids: sync docs + header

docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, fix that. Try improve the comment which points to pci-ids.txt. Also drop the list of modern virtio devices and explain how they are calculated instead. Signed-off-by: Gerd Hoffmann --- docs/specs/pci-ids.txt | 19

Re: [PATCH] tests/migration: remove the unused local variable

On a Wednesday in 2022, dinglimin wrote: From: "dingli...@cmss.chinamobile.com" Remove the unused local variable "records". Signed-off-by: dinglimin --- tests/migration/guestperf/engine.py | 1 - 1 file changed, 1 deletion(-) Unused since its introduction in

Re: [PATCH] pci-ids: sync docs + header

Hi Gerd, On 9/30/22 09:35, Gerd Hoffmann wrote: > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > fix that. Try improve the comment which points to pci-ids.txt. > > Also drop the list of modern virtio devices and explain how they > are calculated instead. > > Signed-off-by:

[PULL v2 09/15] meson: -display dbus and CFI are incompatible

The generated skeletons for DBus call the finalize method of the parent type using code like G_OBJECT_CLASS (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object); However, the finalize method is defined in a shared library that is not compiled with CFI. Do not enable

Re: [PATCH 5/6] rx: re-randomize rng-seed on reboot

On Fri, Sep 30, 2022 at 7:24 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we

Re: [PATCH] docs: add firmware feature flags

On Fri, Sep 30, 2022 at 11:18:33AM +0200, Gerd Hoffmann wrote: > Add new firmware feature flags for the recently added confidential > computing operating modes by amd and intel. > > Signed-off-by: Gerd Hoffmann > --- > docs/interop/firmware.json | 17 ++--- > 1 file changed, 14

Re: [PATCH] meson: -display dbus and CFI are incompatible

Hi On Fri, Sep 30, 2022 at 11:53 AM Paolo Bonzini wrote: > The generated skeletons for DBus call the finalize method of the parent > type using code like > > G_OBJECT_CLASS > (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object); > > However, the finalize method is defined

Re: [PATCH] meson: -display dbus and CFI are incompatible

On Fri, Sep 30, 2022 at 9:59 AM Marc-André Lureau wrote: > > Hi > > On Fri, Sep 30, 2022 at 11:53 AM Paolo Bonzini wrote: >> >> The generated skeletons for DBus call the finalize method of the parent >> type using code like >> >> G_OBJECT_CLASS >>

[PATCH v4 0/2] Add memmap and fix bugs for LoongArch

This series add memmap table and fix extioi, ipi device emulation for LoongArch virt machine. Changes for v4: Add 'reviewed-by' tag in fixing ipi patch, and other changes are the same as v3. 1. Remove the memmap table patch in this series, it will apply until we have more than one

[PATCH v3 1/2] hw/intc: Fix LoongArch extioi function

1.When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_type and id to get the cpu index. 2.Remove the unused extioi system memory region and we only support the extioi iocsr memory

[PATCH v3 2/2] hw/intc: Fix LoongArch ipi device emulation

In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called

[PATCH v3 0/2] Add memmap and fix bugs for LoongArch

This series add memmap table and fix extioi, ipi device emulation for LoongArch virt machine. Changes for v3: 1. Remove the memmap table patch in this series, it will apply until we have more than one machinestate. 2. Using MemTxAttrs' requester_type and requester_id to get current cpu

Re: [Virtio-fs] virtiofsd: Any reason why there's not an "openat2" sandbox mode?

On Thu, Sep 29, 2022 at 7:03 PM Vivek Goyal wrote: > > On Thu, Sep 29, 2022 at 11:47:32AM -0400, Colin Walters wrote: > > > > > > On Thu, Sep 29, 2022, at 10:10 AM, Vivek Goyal wrote: > > > > > What's your use case. How do you plan to use virtiofs. > > > > At the current time, the Kubernetes that

Re: [PATCH v8 6/8] KVM: Update lpage info when private/shared memory are mixed

On Thu, Sep 29, 2022 at 09:52:06AM -0700, Isaku Yamahata wrote: > On Thu, Sep 15, 2022 at 10:29:11PM +0800, > Chao Peng wrote: > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > > index 08abad4f3e6f..a0f198cede3d 100644 > > --- a/arch/x86/kvm/mmu/mmu.c > > +++

Re: [PATCH 3/6] riscv: re-randomize rng-seed on reboot

On Fri, Sep 30, 2022 at 7:24 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we

Re: [PATCH v2] scsi-disk: support setting CD-ROM block size via device options

Queued, thanks. Sorry for the delay. Paolo

Re: [PATCH] pci-ids: sync docs + header

On Fri, Sep 30, 2022 at 09:35:53AM +0200, Gerd Hoffmann wrote: > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > fix that. Try improve the comment which points to pci-ids.txt. > > Also drop the list of modern virtio devices and explain how they > are calculated instead. > >

Re: [PATCH] pci-ids: sync docs + header

On Fri, Sep 30, 2022 at 05:22:33AM -0400, Michael S. Tsirkin wrote: > On Fri, Sep 30, 2022 at 09:35:53AM +0200, Gerd Hoffmann wrote: > > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > > fix that. Try improve the comment which points to pci-ids.txt. > > > > Also drop the list

[PATCH v4 1/2] hw/intc: Fix LoongArch extioi function

1.When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_type and id to get the cpu index. 2.Remove the unused extioi system memory region and we only support the extioi iocsr memory

[PATCH] meson: -display dbus and CFI are incompatible

The generated skeletons for DBus call the finalize method of the parent type using code like G_OBJECT_CLASS (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object); However, the finalize method is defined in a shared library that is not compiled with CFI. Do not enable

Re: [PATCH] meson: -display dbus and CFI are incompatible

On Fri, Sep 30, 2022 at 11:59:34AM +0400, Marc-André Lureau wrote: > Hi > > On Fri, Sep 30, 2022 at 11:53 AM Paolo Bonzini wrote: > > > The generated skeletons for DBus call the finalize method of the parent > > type using code like > > > > G_OBJECT_CLASS > >

Re: [PATCH 5/7] qga: Add support for user password setting in FreeBSD

Hi On Thu, Sep 29, 2022 at 6:29 PM Alexander Ivanov < alexander.iva...@virtuozzo.com> wrote: > > On 29.09.2022 13:22, Marc-André Lureau wrote: > > > > > > Caution: This is an external email and has a suspicious subject or > > content. Please take care when clicking links or opening attachments.

[PATCH v4 2/2] hw/intc: Fix LoongArch ipi device emulation

In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called

Re: [PATCH 4/5] configure, meson: move C++ compiler detection to meson.build

On Wed, Sep 28, 2022 at 11:08 PM Richard Henderson wrote: > > On 9/28/22 12:21, Paolo Bonzini wrote: > > Heh, I wanted to get it in for exactly that reason, so that a future revert > > would not > > introduce the test in configure. But I guess having the patch out there on > > the archives > >

Re: [PATCH 2/6] arm: re-randomize rng-seed on reboot

On Fri, Sep 30, 2022 at 7:26 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we

Re: [PATCH 6/6] mips: re-randomize rng-seed on reboot

On Fri, Sep 30, 2022 at 7:28 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we

[PATCH] docs: add firmware feature flags

Add new firmware feature flags for the recently added confidential computing operating modes by amd and intel. Signed-off-by: Gerd Hoffmann --- docs/interop/firmware.json | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/docs/interop/firmware.json

Re: [PATCH 1/2] vvfat: allow some writes to bootsector

Am 29.09.2022 um 21:53 hat Hervé Poussineau geschrieben: > Le 29/09/2022 à 16:10, Kevin Wolf a écrit : > > Am 03.09.2022 um 18:23 hat Hervé Poussineau geschrieben: > > > 'reserved1' field in bootsector is used to mark volume dirty, or need to > > > verify. > > > Allow writes to bootsector which

Re: [PATCH] win32: set threads name

Hi On Thu, Sep 29, 2022 at 9:53 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 9/29/22 06:41, marcandre.lur...@redhat.com wrote: > > void qemu_thread_naming(bool enable) > > { > > /* But note we don't actually name them on Windows yet */ > > name_threads =

Re: [PATCH v3] virtio-scsi: Send "REPORTED LUNS CHANGED" sense data upon disk hotplug events.

On Fri, Sep 30, 2022 at 12:31 AM Venu Busireddy wrote: > > >*/ > > > !(buf[0] == REQUEST_SENSE && d->sense_is_ua))) { > > > ops = _unit_attention; > > > +d->clear_reported_luns_changed = true; > > > > Any reason to have this flag, and not just clear > >

Re: [PATCH 1/6] device-tree: add re-randomization helper function

On Fri, Sep 30, 2022 at 7:24 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Several > architectures require this functionality, so export a function for > injecting a new seed into the given

[PULL v2 00/15] x86 + misc changes for 2022-09-29

The following changes since commit 99d6b11b5b44d7dd64f4cb1973184e40a4a174f8: Merge tag 'pull-target-arm-20220922' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-09-26 13:38:26 -0400) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git

Re: [PATCH 4/6] openrisc: re-randomize rng-seed on reboot

On Fri, Sep 30, 2022 at 7:26 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we

Re: [PATCH v1 4/7] util: Add write-only "node-affinity" property for ThreadContext

On 29.09.22 13:13, Markus Armbruster wrote: David Hildenbrand writes: Let's make it easier to pin threads created via a ThreadContext to all current CPUs belonging to given NUMA nodes. As "node-affinity" is simply a shortcut for setting "cpu-affinity", that property cannot be read and if the

Re: [PATCH] pci-ids: sync docs + header

On Fri, 30 Sept 2022 at 08:35, Gerd Hoffmann wrote: > > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > fix that. Try improve the comment which points to pci-ids.txt. > > Also drop the list of modern virtio devices and explain how they > are calculated instead. > >

Re: [PATCH 1/2] linux-aio: use LinuxAioState from the running thread

Am 29/09/2022 um 16:52 schrieb Kevin Wolf: > Am 09.06.2022 um 15:44 hat Emanuele Giuseppe Esposito geschrieben: >> From: Paolo Bonzini >> >> Remove usage of aio_context_acquire by always submitting asynchronous >> AIO to the current thread's LinuxAioState. >> >> Signed-off-by: Paolo Bonzini

Re: [PATCHv3 0/2] qemu direct io alignment fix

Am 29.09.2022 um 22:05 hat Keith Busch geschrieben: > From: Keith Busch > > Changes from v2: > > Split the patch so that the function move is separate from the > functional change. This makes it immediately obvious what criteria is > changing. (Kevin Wolf) > > Added received Tested-by

Re: [PATCH 2/2] thread-pool: use ThreadPool from the running thread

Am 29/09/2022 um 17:30 schrieb Kevin Wolf: > Am 09.06.2022 um 15:44 hat Emanuele Giuseppe Esposito geschrieben: >> Remove usage of aio_context_acquire by always submitting work items >> to the current thread's ThreadPool. >> >> Signed-off-by: Paolo Bonzini >> Signed-off-by: Emanuele Giuseppe

[PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field

PLIC spec [1] requires interrupt source priority registers are WARL field and the number of supported priority is power-of-2 to simplify SW discovery. Existing QEMU RISC-V machine (e.g. shakti_c) don't strictly follow PLIC spec, whose number of supported priority is not power-of-2. Just change

Re: [PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

Hi Peter, On 9/30/22 13:38, Peter Maydell wrote: > Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though > there is no pending signal to be taken. In commit 94ccff13382055 > we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the > generic KVM code. Adopt the same approach

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

Peter Maydell writes: > On Sun, 25 Sept 2022 at 12:15, Richard Henderson > wrote: >> >> Prepare for targets to be able to produce TBs that can >> run in more than one virtual context. > >> -/* Similarly, but for logs. */ >> +/* >> + * Similarly, but for logs. In this case, when the virtual pc

[PULL 06/10] hw/arm/virt: Fix devicetree warning about the root node

From: Jean-Philippe Brucker The devicetree specification requires a 'model' property in the root node. Fix the corresponding dt-validate warning: /: 'model' is a required property From schema: dtschema/schemas/root-node.yaml Use the same name for model as for compatible. The specification

Re: [PATCH] win32: set threads name

On 9/30/22 01:08, Marc-André Lureau wrote: Hi On Thu, Sep 29, 2022 at 9:53 PM Richard Henderson > wrote: On 9/29/22 06:41, marcandre.lur...@redhat.com wrote: >   void qemu_thread_naming(bool enable) >   {

Re: [PATCH v7 3/5] module: add Error arguments to module_load and module_load_qom

Claudio Fontana writes: > On 9/28/22 13:31, Markus Armbruster wrote: >> Claudio Fontana writes: >> >>> improve error handling during module load, by changing: >>> >>> bool module_load(const char *prefix, const char *lib_name); >>> void module_load_qom(const char *type); >>> >>> to: >>> >>> int

Re: [PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

On Fri, Sep 30, 2022 at 12:38:24PM +0100, Peter Maydell wrote: > Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though > there is no pending signal to be taken. In commit 94ccff13382055 > we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the > generic KVM code. Adopt the

Re: [PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

On Fri, 30 Sep 2022 12:38:24 +0100, Peter Maydell wrote: > > Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though > there is no pending signal to be taken. In commit 94ccff13382055 > we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the > generic KVM code. Adopt the same

Re: [PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field

Hi Jim, On Fri, Sep 30, 2022 at 2:32 PM Jim Shu wrote: > > PLIC spec [1] requires interrupt source priority registers are WARL > field and the number of supported priority is power-of-2 to simplify SW > discovery. > > Existing QEMU RISC-V machine (e.g. shakti_c) don't strictly follow PLIC >

Re: [PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field

hi Clément, Thank you very much. I'll fix it in the next version patch. Thanks, Jim Shu On Fri, Sep 30, 2022 at 8:58 PM Clément Chigot wrote: > > Hi Jim, > > On Fri, Sep 30, 2022 at 2:32 PM Jim Shu wrote: > > > > PLIC spec [1] requires interrupt source priority registers are WARL > > field

Re: Commit 'iomap: add support for dma aligned direct-io' causes qemu/KVM boot failures

TWIMC: this mail is primarily send for documentation purposes and for regzbot, my Linux kernel regression tracking bot. These mails usually contain '#forregzbot' in the subject, to make them easy to spot and filter. [TLDR: I'm adding this regression report to the list of tracked regressions; all

[PATCH v2 1/2] hw/intc: sifive_plic: fix hard-coded max priority level

The maximum priority level is hard-coded when writing to interrupt priority register. However, when writing to priority threshold register, the maximum priority level is from num_priorities Property which is configured by platform. Also change interrupt priority register to use num_priorities

Re: [PATCH 5/7] qga: Add support for user password setting in FreeBSD

Hi On 30.09.2022 10:19, Marc-André Lureau wrote: Caution: This is an external email and has a suspicious subject or content. Please take care when clicking links or opening attachments. When in doubt, contact your IT Department Hi On Thu, Sep 29, 2022 at 6:29 PM Alexander Ivanov

[PULL 00/10] target-arm queue

'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into staging (2022-09-28 17:04:11 -0400) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220930 for you to fetch changes up to beeec926d24aac28f95cc7694ef3837d7a4cd3bb

[PULL 05/10] hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers

From: Francisco Iglesias Connect ZynqMP's USB controllers. Signed-off-by: Francisco Iglesias Acked-by: Alistair Francis Message-id: 20220920081517.25401-1-frasse.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-zynqmp.h | 3 +++

[PULL 04/10] target/arm: Rearrange cpu64.c so all the CPU initfns are together

cpu64.c has ended up in a slightly odd order -- it starts with the initfns for most of the models-real-hardware CPUs; after that comes a bunch of support code for SVE, SME, pauth and LPA2 properties. Then come the initfns for the 'host' and 'max' CPU types, and then after that one more

[PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though there is no pending signal to be taken. In commit 94ccff13382055 we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the generic KVM code. Adopt the same approach for the use of the ioctl in the Arm-specific KVM code (where

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

On Sun, 25 Sept 2022 at 12:15, Richard Henderson wrote: > > Prepare for targets to be able to produce TBs that can > run in more than one virtual context. > -/* Similarly, but for logs. */ > +/* > + * Similarly, but for logs. In this case, when the virtual pc > + * is not available, use the

[PATCH v2 0/2] Enhance maximum priority support of PLIC

This patchset fixes hard-coded maximum priority of interrupt priority register and also changes this register to WARL field to align the PLIC spec. Changelog: v2: * change interrupt priority register to WARL field. Jim Shu (2): hw/intc: sifive_plic: fix hard-coded max priority level

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

On Fri, 30 Sept 2022 at 14:23, Alex Bennée wrote: > > > Peter Maydell writes: > > This is going to break previously working setups involving > > the "filter logging to a particular address range" and also > > anybody post-processing logfiles and expecting to see > > the virtual address in -d

[PULL 07/10] hw/arm/virt: Fix devicetree warning about the GIC node

From: Jean-Philippe Brucker The GICv3 bindings requires a #msi-cells property for the ITS node. Fix the corresponding dt-validate warning: interrupt-controller@800: msi-controller@808: '#msi-cells' is a required property From schema:

[PULL 03/10] target/arm: Update SDCR_VALID_MASK to include SCCD

Our SDCR_VALID_MASK doesn't include all of the bits which are defined by the current architecture. In particular in commit 0b42f4fab9d3 we forgot to add SCCD, which meant that an AArch32 guest couldn't actually use the SCCD bit to disable counting in Secure state. Add all the currently defined

[PULL 01/10] target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO

In commit 01765386a888 we made some system register write functions call pmu_op_start()/pmu_op_finish(). This means that they now touch timers, so for icount to work these registers must have the ARM_CP_IO flag set. This fixes a bug where when icount is enabled a guest that touches MDCR_EL3,

[PULL 09/10] hw/arm/virt: Fix devicetree warning about the SMMU node

From: Jean-Philippe Brucker The SMMUv3 node isn't expected to have clock properties (unlike the SMMUv2). Fix the corresponding dt-validate warning: smmuv3@905: 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' From schema:

[PULL 08/10] hw/arm/virt: Use "msi-map" devicetree property for PCI

From: Jean-Philippe Brucker The "msi-parent" property can be used on the PCI node when MSIs do not contain sideband data (device IDs) [1]. In QEMU, MSI transactions contain the requester ID, so the PCI node should use the "msi-map" property instead of "msi-parent". In our case the property

Re: [PATCH v2 17/23] target/i386: Create gen_jmp_rel

On 9/21/22 06:06, Paolo Bonzini wrote: On Tue, Sep 6, 2022 at 12:09 PM Richard Henderson wrote: Create a common helper for pc-relative branches. The jmp jb insn was missing a mask for CODE32. Signed-off-by: Richard Henderson (Oops, my remark the previous patch should still have pointed to

Re: [PATCH v2 19/23] target/i386: Use gen_jmp_rel for gen_jcc

On 9/21/22 06:09, Paolo Bonzini wrote: On Tue, Sep 6, 2022 at 12:09 PM Richard Henderson wrote: -static inline void gen_jcc(DisasContext *s, int b, - target_ulong val, target_ulong next_eip) +static void gen_jcc(DisasContext *s, MemOp ot, int b, int diff) { -

[PULL 02/18] block/qcow2-bitmap: Add missing cast to silent GCC error

From: Philippe Mathieu-Daudé Commit d1258dd0c8 ("qcow2: autoloading dirty bitmaps") added the set_readonly_helper() GFunc handler, correctly casting the gpointer user_data in both the g_slist_foreach() caller and the handler. Few commits later (commit 1b6b0562db), the handler is reused in

[PULL 05/18] block: add missed block_acct_setup with new block device init procedure

From: "Denis V. Lunev" Commit 5f76a7aac156ca75680dad5df4a385fd0b58f6b1 is looking harmless from the first glance, but it has changed things a lot. 'libvirt' uses it to detect that it should follow new initialization way and this changes things considerably. With this procedure followed,

[PULL 08/18] gluster: stop using .bdrv_needs_filename

From: Stefan Hajnoczi The gluster protocol driver used to parse URIs (filenames) but was extended with a richer JSON syntax in commit 6c7189bb29de ("block/gluster: add support for multiple gluster servers"). The gluster drivers that have JSON parsing set .bdrv_needs_filename to false. The

[PULL 10/18] block/qed: Keep auto_backing_file if possible

From: Hanna Reitz Just like qcow2, qed invokes its open function in its .bdrv_co_invalidate_cache() implementation. Therefore, just like done for qcow2 in HEAD^, update auto_backing_file only if the backing file string in the image header differs from the one we have read before.

[PULL 03/18] qemu-img: Wean documentation and help output off '?' for help

From: Markus Armbruster '?' for help is deprecated since commit c8057f951d "Support 'help' as a synonym for '?' in command line options", v1.2.0. We neglected to update output of qemu-img --help and the manual. Do that now. Signed-off-by: Markus Armbruster Message-Id:

[PULL 01/18] qcow2: fix memory leak in qcow2_read_extensions

From: lu zhipeng Free feature_table if it is failed in bdrv_pread. Signed-off-by: lu zhipeng Message-Id: <20220921144515.1166-1-luzhip...@cestc.cn> Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf --- block/qcow2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/block/qcow2.c

[PULL 17/18] tests/qtest/ide-test: Verify that DIAGNOSTIC clears DEV to zero

From: Lev Kujawski Verify correction of EXECUTE DEVICE DIAGNOSTIC introduced in commit 72423831c3 (hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC, 2022-05-28). Signed-off-by: Lev Kujawski Message-Id: <20220707031140.158958-4-lku...@member.fsf.org> Signed-off-by: Kevin Wolf

[PULL 13/18] block: use the request length for iov alignment

From: Keith Busch An iov length needs to be aligned to the logical block size, which may be larger than the memory alignment. Tested-by: Jens Axboe Signed-off-by: Keith Busch Message-Id: <20220929200523.3218710-3-kbu...@meta.com> Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf ---

[PULL 09/18] block/qcow2: Keep auto_backing_file if possible

From: Hanna Reitz qcow2_do_open() is used by qcow2_co_invalidate_cache(), i.e. may be run on an image that has been opened before. When reading the backing file string from the image header, compare it against the existing bs->backing_file, and update bs->auto_backing_file only if they differ.

[PULL 14/18] piix_ide_reset: Use pci_set_* functions instead of direct access

From: Lev Kujawski Eliminate the remaining TODOs in hw/ide/piix.c by: * Using pci_set_{size} functions to write the PIIX PCI configuration space instead of manipulating it directly as an array; and * Documenting the default register values by reference to the controlling specification.

[PULL 18/18] hw/ide/core.c: Implement ATA INITIALIZE_DEVICE_PARAMETERS command

From: Lev Kujawski CHS-based disk utilities and operating systems may adjust the logical geometry of a hard drive to cope with the expectations or limitations of software using the ATA INITIALIZE_DEVICE_PARAMETERS command. Prior to this patch, INITIALIZE_DEVICE_PARAMETERS was a nop that always

[PULL 16/18] hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC

From: Lev Kujawski Prior to this patch, cmd_exec_dev_diagnostic relied upon ide_set_signature to clear the device register. While the preservation of the drive bit by ide_set_signature is necessary for the DEVICE RESET, IDENTIFY DEVICE, and READ SECTOR commands, ATA/ATAPI-6 specifies that "DEV

[PATCH] Revert "qapi: fix examples of blockdev-add with qcow2"

This reverts commit b6522938327141235b97ab38e40c6c4512587373. Kevin Wolf NAKed this patch, because: 'file' is a required member (defined in BlockdevOptionsGenericFormat), removing it makes the example invalid. 'data-file' is only an additional optional member to be used for external

Re: [PULL 00/10] QAPI patches patches for 2022-09-07

Markus Armbruster writes: > Markus Armbruster writes: > >> Gentle reminder, Victor :) >> >> Markus Armbruster writes: >> >>> Markus Armbruster writes: >>> Kevin Wolf writes: > Am 07.09.2022 um 17:03 hat Markus Armbruster geschrieben: >> The following changes since commit

Re: [PATCH v2 for-7.2 0/6] Drop libslirp submodule

On 30/09/2022 18.50, Christian Schoenebeck wrote: On Mittwoch, 24. August 2022 17:11:16 CEST Thomas Huth wrote: At the point in time we're going to release QEMU 7.2, all supported host OS distributions will have a libslirp package available, so there is no need anymore for us to ship the slirp

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

On 9/30/22 06:25, Peter Maydell wrote: On Fri, 30 Sept 2022 at 14:23, Alex Bennée wrote: Peter Maydell writes: This is going to break previously working setups involving the "filter logging to a particular address range" and also anybody post-processing logfiles and expecting to see the

[PATCH 1/2] target/arm: Don't allow guest to use unimplemented granule sizes

Arm CPUs support some subset of the granule (page) sizes 4K, 16K and 64K. The guest selects the one it wants using bits in the TCR_ELx registers. If it tries to program these registers with a value that is either reserved or which requests a size that the CPU does not implement, the architecture

[PULL v2 1/3] Hexagon (target/hexagon) add instruction attributes from archlib

The imported files from the architecture library have added some instruction attributes. Some of these will be used in a subsequent patch for determing the size of a store. Signed-off-by: Taylor Simpson Acked-by: Richard Henderson Message-Id: <20220920080746.26791-2-tsimp...@quicinc.com> ---

[PULL 04/18] block: pass OnOffAuto instead of bool to block_acct_setup()

From: "Denis V. Lunev" We would have one more place for block_acct_setup() calling, which should not corrupt original value. Signed-off-by: Denis V. Lunev Reviewed-by: Vladimir Sementsov-Ogievskiy CC: Peter Krempa CC: Markus Armbruster CC: John Snow CC: Kevin Wolf CC: Hanna Reitz

Re: [PATCH v2 for-7.2 0/6] Drop libslirp submodule

On Mittwoch, 24. August 2022 17:11:16 CEST Thomas Huth wrote: > At the point in time we're going to release QEMU 7.2, all supported > host OS distributions will have a libslirp package available, so > there is no need anymore for us to ship the slirp submodule. Thus > let's clean up the related

[PULL 06/18] block: use bdrv_is_sg() helper instead of raw bs->sg reading

From: "Denis V. Lunev" I believe that if the helper exists, it must be used always for reading of the value. It breaks expectations in the other case. Signed-off-by: Denis V. Lunev CC: Kevin Wolf CC: Hanna Reitz CC: Stefan Hajnoczi CC: Fam Zheng CC: Ronnie Sahlberg CC: Paolo Bonzini CC:

[PULL 07/18] block: make serializing requests functions 'void'

From: "Denis V. Lunev" Return codes of the following functions are never used in the code: * bdrv_wait_serialising_requests_locked * bdrv_wait_serialising_requests * bdrv_make_request_serialising Signed-off-by: Denis V. Lunev CC: Kevin Wolf CC: Hanna Reitz CC: Stefan Hajnoczi CC: Fam Zheng

[PULL 12/18] block: move bdrv_qiov_is_aligned to file-posix

From: Keith Busch There is only user of bdrv_qiov_is_aligned(), so move the alignment function to there and make it static. Signed-off-by: Keith Busch Message-Id: <20220929200523.3218710-2-kbu...@meta.com> Reviewed-by: Kevin Wolf Signed-off-by: Kevin Wolf --- include/block/block-io.h | 1 -

[PULL 11/18] iotests/backing-file-invalidation: Add new test

From: Hanna Reitz Add a new test to see what happens when you migrate a VM with a backing chain that has json:{} backing file strings, which, when opened, will be resolved to plain filenames. Signed-off-by: Hanna Reitz Message-Id: <2022080316.20723-4-hre...@redhat.com> Reviewed-by: Kevin

[PULL 00/18] Block layer patches

The following changes since commit c8de6ec63d766ca1998c5af468483ce912fdc0c2: Merge tag 'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into staging (2022-09-28 17:04:11 -0400) are available in the Git repository at: git://repo.or.cz/qemu/kevin.git tags/for-upstream for you to

[PULL 15/18] tests/qtest/ide-test.c: Create disk image for use as a secondary

From: Lev Kujawski Change 'tmp_path' into an array of two members to accommodate another disk image of size TEST_IMAGE_SIZE. This facilitates testing ATA protocol aspects peculiar to secondary devices on the same controller. Signed-off-by: Lev Kujawski Message-Id:

[PATCH 0/2] target/arm: Enforce implemented granule size limits

Arm CPUs support some subset of the granule (page) sizes 4K, 16K and 64K. The guest selects the one it wants using bits in the TCR_ELx registers. If it tries to program these registers with a value that is either reserved or which requests a size that the CPU does not implement, the architecture

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