When QEMU is started with `-daemonize`, all stdio descriptors get
redirected to `/dev/null`. This basically means that anything
printed with `error_report()` and friends is lost.
One could hope that passing `-D ${logfile}` would cause the messages
to go to `${logfile}`, as the documentation tends
From: "Jason A. Donenfeld"
Rather than poking directly into RAM, add the bootinfo block as a proper
ROM, so that it's restored when rebooting the system. This way, if the
guest corrupts any of the bootinfo items, but then tries to reboot,
it'll still be restored back to normal as expected.
From: "Jason A. Donenfeld"
Following a change on the kernel side (see link), pass BI_RNG_SEED
instead of BI_VIRT_RNG_SEED. This should have no impact on
compatibility, as there will simply be no effect if it's an old kernel,
which is how things have always been. We then use this as an
On 10/14/22 08:08, Greg Kurz wrote:
+need_to_open_file = log_flags && !per_thread;
Pre-existing, but I think this should check log_per_thread instead of
per_thread.
+} else if (filename) {
+/*
+ * If we are daemonized, we will only log if there is a filename.
+
On 10/14/22 10:13, Alex Bennée wrote:
@@ -1866,6 +1866,15 @@ probe_target_compiler() {
container_cross_ranlib=
container_cross_strip=
+ # We shall skip configuring the target compiler if the user didn't
+ # bother enabling an appropriate guest. This avoids building
+ # extraneous
From: David Daney
Most other virtio-pci devices allow MSI-X, let's have it for rng too.
Signed-off-by: David Daney
Reviewed-by: Marcin Nowakowski
Signed-off-by: Philippe Mathieu-Daudé
---
hw/virtio/virtio-rng-pci.c | 14 ++
1 file changed, 14 insertions(+)
diff --git
On Fri, 14 Oct 2022 10:51:36 +0200
Paolo Bonzini wrote:
> On 10/14/22 08:08, Greg Kurz wrote:
> >
> > +need_to_open_file = log_flags && !per_thread;
>
> Pre-existing, but I think this should check log_per_thread instead of
> per_thread.
>
Yes I agree, and also check qemu_loglevel
On Sun, Oct 09, 2022 at 01:48:35PM +0800, Jason Wang wrote:
> This patch introduce ECAP_PASID via "x-pasid-mode". Based on the
> existing support for scalable mode, we need to implement the following
> missing parts:
>
> 1) tag VTDAddressSpace with PASID and support IOMMU/DMA translation
>
smilatency tests does not reliably pass every time it is run from QEMU. This
change adds the test file unchanged from bits so that the next change can
disable the test.
The test has an extension .py2 just like other tests so that they are excluded
from loading by avocado framework.
Cc: Daniel P.
On Mon, 10 Oct 2022 at 16:32, Alex Bennée wrote:
>
> QEMU doesn't model micro-architectural details which includes most
> chip errata. The ARM_ERRATA_798181 work around in the Linux
> kernel (see erratum_a15_798181_init) currently detects QEMU's
> cortex-a15 as broken and triggers additional
On Tue, 11 Oct 2022 at 04:24, Richard Henderson
wrote:
>
> Compare only the VMID field when considering whether we need to flush.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On 10/15/22 04:53, Peter Maydell wrote:
On Thu, 6 Oct 2022 at 04:55, Richard Henderson
wrote:
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
@@ -296,7 +301,8 @@ TCGv_i32
Matheus Ferst writes:
> Move the interrupt masking logic out of cpu_has_work_POWER7 in a new
> method, p7_interrupt_powersave, that only returns an interrupt if it can
> wake the processor from power-saving mode.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
On 10/14/22 11:28, Peter Maydell wrote:
In spapr_phb_children_reset() we call device_legacy_reset() to reset any
QOM children of the SPAPR PCI host bridge device. This will not reset
any qbus such a child might own. Switch to device_cold_reset(), which will
reset both the device and its
In the case that size1 was zero, because of the explicit
'end1 > addr' check, the range check would fail and the error
message would read as shown below. The correct comparison
is 'end1 >= addr' (or 'addr <= end1').
EDU: DMA range 0x4-0x3 out of bounds (0x4-0x3)!
At the opposite
Please see the README file in patch 9 for more details.
Sample runs are as follows:
Passed tests:
$ ./tests/venv/bin/avocado run -t acpi tests/avocado
Fetching asset from
tests/avocado/acpi-bits.py:AcpiBitsTest.test_acpi_smbios_bits
JOB ID : e95c7413e996bfb59389839e5ca5105464ef098f
JOB LOG
Added the SPDX license identifiers for biosbits tests.
Also added a comment on each of the test scripts to indicate that they run
from within the biosbits environment and hence are not subjected to the regular
maintanance acivities for QEMU and is excluded from the dependency management
challenges
I wrote the biosbits avocado tests for testing QEMU's ACPI/SMBIOS implementation
and all the related changes including fixes in biosbits software itself. Making
myself as the maintainer for QEMU's biosbits related files and test scripts.
Cc: Daniel P. Berrangé
Cc: Paolo Bonzini
Cc: Maydell
On Tue, 4 Oct 2022 at 20:27, Richard Henderson
wrote:
>
> On 10/4/22 09:23, Peter Maydell wrote:
> >> @@ -347,16 +354,22 @@ static void gen_exception_internal(int excp)
> >>
> >> static void gen_exception_internal_insn(DisasContext *s, int excp)
> >> {
> >> +target_ulong pc_save =
On Thu, 6 Oct 2022 at 11:20, Baruch Siach wrote:
>
> The PL011 TRM says that "UARTIBRD = 0 is invalid and UARTFBRD is ignored
> when this is the case". But the code looks at FBRD for the invalid case.
> Fix this.
>
> Signed-off-by: Baruch Siach
> ---
> hw/char/pl011.c | 2 +-
> 1 file changed,
Il ven 14 ott 2022, 18:07 Greg Kurz ha scritto:
> 2) and 3) can certainly be preparatory work but I think 1)
> should be squashed in my patch. Because of the !per_thread
> check in need_to_open_file, the existing code in
> qemu_set_log_internal() doesn't even open the global file
> and
Matheus Ferst writes:
> The new method is identical to ppc_deliver_interrupt, processor-specific
> code will be added/removed in the following patches.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
From: Huai-Cheng Kuo
The CDAT can be specified in two ways. One is to add ",cdat="
in "-device cxl-type3"'s command option. The file is required to provide
the whole CDAT table in binary mode. The other is to use the default
that provides some 'reasonable' numbers based on type of memory and
This will be used by several upcoming patch sets so break it out
such that it doesn't matter which one lands first.
Signed-off-by: Jonathan Cameron
---
hw/mem/cxl_type3.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index
Matheus Ferst writes:
> This new method will check if any pending interrupt was unmasked and
> then call cpu_interrupt/cpu_reset_interrupt accordingly. Code that
> raises/lowers or masks/unmasks interrupts should call this method to
> keep CPU_INTERRUPT_HARD coherent with
Matheus Ferst writes:
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
> ---
> target/ppc/excp_helper.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 055f1de20e..1c373c1a7c 100644
> ---
Matheus Ferst writes:
> Export p7_interrupt_powersave and use it in p7_next_unmasked_interrupt.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
On Wed, Oct 12, 2022 at 12:34:48PM -0400, Eric Auger wrote:
> In theory the virtio-iommu-pci could be plugged anywhere in the PCIe
> topology and as long as the dt/acpi info are properly built this should
> work. However at the moment we fail to do that because the
> virtio-iommu-pci BDF is not
On 10/14/22 16:28, Peter Maydell wrote:
In spapr_phb_children_reset() we call device_legacy_reset() to reset any
QOM children of the SPAPR PCI host bridge device. This will not reset
any qbus such a child might own. Switch to device_cold_reset(), which will
reset both the device and its buses.
PSS tests in acpi test suite seems to be failing in biosbits. This is because
the test is unable to find PSS support in QEMU bios. Let us disable
them for now so that make check does not fail. We can fix the tests and
re-enable them later.
Example failure:
ACPI _PSS (Pstate) table
This is initial commit of cpuid, acpi and smbios python test scripts for
biosbits to execute. No change has been made to them from the original code
written by the biosbits author Josh Triplett. They are required to be installed
into the bits iso file and then run from within the virtual machine
On Thu, 6 Oct 2022 at 04:55, Richard Henderson
wrote:
>
> In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> @@ -296,7 +301,8 @@ TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int
> ofs)
>
On Tue, 11 Oct 2022 at 04:26, Richard Henderson
wrote:
>
> We had been marking this ARM_MMU_IDX_NOTLB, move it to a real tlb.
> Flush the tlb when invalidating stage 1+2 translations. Re-use
> alle1_tlbmask() for other instances of EL1&0 + Stage2.
>
> Signed-off-by: Richard Henderson
> ---
>
From: Huai-Cheng Kuo
Emulation of PCIe Data Object Exchange (DOE)
PCIE Base Specification r6.0 6.3 Data Object Exchange
Supports multiple DOE PCIe Extended Capabilities for a single PCIe
device. For each capability, a static array of DOEProtocol should be passed
to pcie_doe_init(). The
From: Huai-Cheng Kuo
The Data Object Exchange implementation of CXL Coherent Device Attribute
Table (CDAT). This implementation is referring to "Coherent Device
Attribute Table Specification, Rev. 1.03, July. 2022" and "Compute
Express Link Specification, Rev. 3.0, July. 2022"
This patch adds
Matheus Ferst writes:
> Writes to LPCR are hypervisor privileged.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
On Thu, 13 Oct 2022 15:40:47 -0400
Gregory Price wrote:
> > > /* For now, no memory side cache, plausiblish numbers */
> > > -*dslbis_nonvolatile1 = (CDATDslbis) {
> > > +*dslbis1 = (CDATDslbis) {
> > > .header = {
> > > .type = CDAT_TYPE_DSLBIS,
> > > -
Ping?
smilatency test is latency sensitive and does not pass deterministically when
run in QEMU environment under biosbits. Disable the test suite for now.
Example failure:
SMI latency test
Warning: touching the keyboard can affect the results of this test.
Starting test. Wait here, I will
On Thu, Sep 15, 2022, Chao Peng wrote:
> diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> index a0f198cede3d..81ab20003824 100644
> --- a/arch/x86/kvm/mmu/mmu.c
> +++ b/arch/x86/kvm/mmu/mmu.c
> @@ -3028,6 +3028,9 @@ int kvm_mmu_max_mapping_level(struct kvm *kvm,
>
On 10/15/22 04:49, Peter Maydell wrote:
On Tue, 4 Oct 2022 at 20:27, Richard Henderson
wrote:
On 10/4/22 09:23, Peter Maydell wrote:
@@ -347,16 +354,22 @@ static void gen_exception_internal(int excp)
static void gen_exception_internal_insn(DisasContext *s, int excp)
{
+
Matheus Ferst writes:
> Remove the following unused interrupts from the POWER7 interrupt masking
> method:
> - PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970 and POWER5p;
> - Hypervisor Virtualization: introduced in Power ISA v3.0;
> - Hypervisor Doorbell and Event-Based Branch: introduced
Matheus Ferst writes:
> Remove the following unused interrupts from the POWER7 interrupt
> processing method:
> - PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970 and POWER5p;
> - Hypervisor Virtualization: introduced in Power ISA v3.0;
> - Hypervisor Doorbell and Event-Based Branch:
This Data Object Exchange Mailbox allows software to query the
latency and bandwidth between ports on the switch. For now
only provide information on routes between the upstream port and
each downstream port (not p2p).
Signed-off-by: Jonathan Cameron
--
Changes since v8: Mostly to match the
This change adds initial biosbits config file that instructs biosbits to run
bios test suits in batch mode. Additionally acpi and smbios structures are also
dumped.
Cc: Daniel P. Berrangé
Cc: Paolo Bonzini
Cc: Maydell Peter
Cc: John Snow
Cc: Thomas Huth
Cc: Alex Bennée
Cc: Igor Mammedov
On Fri, 14 Oct 2022 at 12:10, Philippe Mathieu-Daudé
wrote:
>
> From: David Daney
>
> Most other virtio-pci devices allow MSI-X, let's have it for rng too.
>
> Signed-off-by: David Daney
> Reviewed-by: Marcin Nowakowski
> Signed-off-by: Philippe Mathieu-Daudé
> ---
>
On Thu, Oct 13, 2022 at 01:25:10PM +0100, Joao Martins wrote:
> It would allow supporting both the (current UAPI) case where you need to
> transfer the state to get device state size (so checking against
> threshold_size
> pending_pre constantly would allow to not violate the SLA) as well as any
On Fri, 14 Oct 2022, BALATON Zoltan wrote:
On Fri, 14 Oct 2022, Mark Cave-Ayland wrote:
On 03/10/2022 21:13, BALATON Zoltan wrote:
By slight reorganisation we can avoid an else branch and some code
duplication which makes it easier to follow the code.
Signed-off-by: BALATON Zoltan
---
Ping?
Add a README file that describes the purpose of the various test files and gives
guidance to developers on where and how to make changes.
Cc: Daniel P. Berrange"
Cc: Paolo Bonzini
Cc: Maydell Peter
Cc: John Snow
Cc: Thomas Huth
Cc: Alex Bennée
Cc: Igor Mammedov
Cc: Michael Tsirkin
Added the SPDX license identifier for smilatency tests.
Also added a comment indicating that smilatency test is run from within the
biosbits environment/VM and hence is not subjected to QEMU build/test
environment dependency fulfilments or QEMU maintanance activities.
Cc: Daniel P. Berrangé
Cc:
This introduces QEMU acpi/smbios biosbits avocado test which is run
from within the python virtual environment. When the bits tests are run, bits
binaries are downloaded from an external repo/location, bios bits iso is
regenerated containing the acpi/smbios bits tests that are maintained as a part
On 10/14/22 22:23, Philippe Mathieu-Daudé wrote:
From: David Daney
disas/mips.c got added in commit 6643d27ea0 ("MIPS disas support")
apparently based on binutils tag 'gdb_6_1-branchpoint' [1].
Back then, MIPSr6 was not supported (added in binutils commit
7361da2c952 during 2014 [2]).
Binutils
Am 10.10.22 um 19:29 schrieb Michael S. Tsirkin:
From: Alex Bennée
All the boilerplate virtio code does the same thing (or should at
least) of checking to see if the VM is running before attempting to
start VirtIO. Push the logic up to the common function to avoid
getting a copy and paste
When determining the endiandness of the target architecture we're
building for a small program is compiled, which in an obfuscated
way declares two strings. Then, we look which string is in
correct order (using strings binary) and deduct the endiandness.
But using the strings binary is
Queued, thanks.
Paolo
Am 14.10.22 um 10:37 schrieb Alex Bennée:
Christian Borntraeger writes:
Am 10.10.22 um 19:29 schrieb Michael S. Tsirkin:
From: Alex Bennée
All the boilerplate virtio code does the same thing (or should at
least) of checking to see if the VM is running before attempting to
start VirtIO.
On 03/10/2022 21:13, BALATON Zoltan wrote:
Map regions in ascending order and reorganise code a bit to avoid some
casts and move Uninorth parts together.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 38 ++
1 file changed, 18 insertions(+),
On Thu, Oct 13, 2022 at 9:26 PM Richard Henderson
wrote:
> On 10/14/22 07:52, Philippe Mathieu-Daudé wrote:
> > +/* Sign extend the displacement with 21 bits. */
> > +delta = l & 0x1F;
> > +if (delta & 0x10) {
> > +delta
Daniel P. Berrangé writes:
> On Fri, Oct 14, 2022 at 11:31:13AM +0200, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>>
>> > On Thu, Oct 13, 2022 at 05:00:26PM +0200, Markus Armbruster wrote:
>> >> Denis Plotnikov writes:
>> >>
>> >> > Add "start" & "end" time values to qmp command
Markus Armbruster writes:
> Mark Cave-Ayland writes:
>
>> On 12/10/2022 13:11, Alex Bennée wrote:
>
> [...]
>
>>> +Becoming a maintainer
>>> +-
>>> +
>>> +Maintainers are volunteers who put themselves forward to keep an eye
>>> +on an area of code. They are generally
Cédric Le Goater writes:
> I am not active anymore on the PPC maintainership, degrade my self as
> standard Reviewer. Also degrade PowerNV and XIVE status since I am not
> funded for this work.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Alex Bennée
--
Alex Bennée
Markus Armbruster writes:
> Mark Cave-Ayland writes:
>
>> On 12/10/2022 13:11, Alex Bennée wrote:
>>
>>> Hi,
>>> This is an attempt to improve our processes documentation by:
>>> - adding an explicit section on maintainers
>>> - reducing the up-front verbiage in patch submission
>>> -
Let's allow for specifying a thread context via the "prealloc-context"
property. When set, preallcoation threads will be crated via the
thread context -- inheriting the same CPU affinity as the thread
context.
Pinning preallcoation threads to CPUs can heavily increase performance
in NUMA setups,
Changes to the build files are a bit special in that they usually go
through other maintainer trees. However considering the build system
is the root of everything a developer is likely to do we should at
least set it out in MAINTAINERS.
I'm going to nominate Paolo for meson stuff given the
The only use of intel_hda_reset() is after its definition, so we
don't need to separately declare its prototype at the top of the
file; drop the unnecessary line.
Signed-off-by: Peter Maydell
---
hw/audio/intel-hda.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/audio/intel-hda.c
In spapr_phb_children_reset() we call device_legacy_reset() to reset any
QOM children of the SPAPR PCI host bridge device. This will not reset
any qbus such a child might own. Switch to device_cold_reset(), which will
reset both the device and its buses. (If the child has no qbuses then
there will
Matheus Ferst writes:
> Remove the following unused interrupts from the POWER8 interrupt
> processing method:
> - PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970 and POWER5p;
> - Debug Interrupt: removed in Power ISA v2.07;
> - Hypervisor Virtualization: introduced in Power ISA v3.0;
> -
Matheus Ferst writes:
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
> ---
> target/ppc/excp_helper.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 662daad796..aaf1c95087 100644
> ---
Currently the hcd-xhci-pci and hcd-xhci-sysbus devices, which are
mostly wrappers around the TYPE_XHCI device, which is a direct
subclass of TYPE_DEVICE. Since TYPE_DEVICE devices are not on any
qbus and do not get automatically reset, the wrapper devices both
reset the TYPE_XHCI device in their
During migration the virtio device state can be restored before we
restart the VM. As no devices can be running while the VM is paused it
makes sense to bail out early in that case.
This returns the order introduced in:
9f6bcfd99f (hw/virtio: move vm_running check to virtio_device_started)
to
This is a follow-up on "util: NUMA aware memory preallocation" [1] by
Michal.
Setting the CPU affinity of threads from inside QEMU usually isn't
easily possible, because we don't want QEMU -- once started and running
guest code -- to be able to mess up the system. QEMU disallows relevant
syscalls
... and implement it under POSIX. When a ThreadContext is provided,
create new threads via the context such that these new threads obtain a
properly configured CPU affinity.
Reviewed-by: Michal Privoznik
Signed-off-by: David Hildenbrand
---
backends/hostmem.c | 5 +++--
Fix a regression that was introduced with the edk2 202202 upgrade
(commit e2f3137c7344).
Upstream changed TPM_ENABLE to TPM1_ENABLE and TPM2_ENABLE. This led to
TPM 2.0 (which is needed for windows 11) silently got disabled.
Ref:
Matheus Ferst writes:
> Remove the following unused interrupts from the POWER8 interrupt masking
> method:
> - PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970, and POWER5p;
> - Debug Interrupt: removed in Power ISA v2.07;
> - Hypervisor Virtualization: introduced in Power ISA v3.0;
> -
On Sun, Oct 09, 2022 at 01:48:34PM +0800, Jason Wang wrote:
> We used to have a macro for VTD_PE_GET_FPD_ERR() but it has an
> internal goto which prevents it from being reused. This patch convert
> that macro to a dedicated function and let the caller to decide what
> to do (e.g using goto or
Although an input is routed depending on the console,
qemu_input_is_absolute() had no mechanism to specify the console.
Accept QemuConsole as an argument for qemu_input_is_absolute, and let
the display know the absolute/relative state for a particular console.
Signed-off-by: Akihiko Odaki
---
Usually, we let upper layers handle CPU pinning, because
pthread_setaffinity_np() (-> sched_setaffinity()) is blocked via
seccomp when starting QEMU with
-sandbox enable=on,resourcecontrol=deny
However, we want to configure and observe the CPU affinity of threads
from QEMU directly in some
Let's
* give the function a "qemu_*" style name
* make sure the parameters in the implementation match the prototype
* rename smp_cpus to max_threads, which makes the semantics of that
parameter clearer
... and add a function documentation.
Reviewed-by: Michal Privoznik
Signed-off-by: David
Currently, there is no way to configure a CPU affinity inside QEMU when
the sandbox option disables it for QEMU as a whole, for example, via:
-sandbox enable=on,resourcecontrol=deny
While ThreadContext objects can be created on the QEMU commandline and
the CPU affinity can be configured
Matheus Ferst writes:
> The new method is identical to ppc_next_unmasked_interrupt_generic,
> processor-specific code will be added/removed in the following patches.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
On Tue, 11 Oct 2022 13:17:30 +0200
Julia Suvorova wrote:
> The new test is run with a large number of cpus and checks if the
> core_count field in smbios_cpu_test (structure type 4) is correct.
>
> Choose q35 as it allows to run with -smp > 255.
>
> Signed-off-by: Julia Suvorova
> Message-Id:
On 14/10/2022 12:28, Juan Quintela wrote:
> Joao Martins wrote:
>> On 13/10/2022 17:08, Juan Quintela wrote:
>>> Oops. My understanding was that once the guest is stopped you can say
>>> how big is it.
>
> Hi
>
>> It's worth keeping in mind that conceptually a VF won't stop (e.g. DMA) until
On Fri, Oct 14, 2022 at 02:57:06PM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > On Fri, Oct 14, 2022 at 11:31:13AM +0200, Markus Armbruster wrote:
> >> Daniel P. Berrangé writes:
> >>
> >> > On Thu, Oct 13, 2022 at 05:00:26PM +0200, Markus Armbruster wrote:
> >> >> Denis
Let's make it easier to pin threads created via a ThreadContext to
all host CPUs currently belonging to a given set of host NUMA nodes --
which is the common case.
"node-affinity" is simply a shortcut for setting "cpu-affinity" manually
to the list of host CPUs belonging to the set of host nodes.
Setting the CPU affinity of QEMU threads is a bit problematic, because
QEMU doesn't always have permissions to set the CPU affinity itself,
for example, with seccomp after initialized by QEMU:
-sandbox enable=on,resourcecontrol=deny
General information about CPU affinities can be found in the
This patchset removes a use of device_legacy_reset() from the
intel-hda audio device, and removes a duplicated reset of the
codec devices.
Currently the intel-hda device has a reset method which manually
resets all the codecs by calling device_legacy_reset() on them. This
means they get reset
Matheus Ferst writes:
> Export p8_interrupt_powersave and use it in p8_next_unmasked_interrupt.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
Matheus Ferst writes:
> Move the interrupt masking logic out of cpu_has_work_POWER8 in a new
> method, p8_interrupt_powersave, that only returns an interrupt if it can
> wake the processor from power-saving mode.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
Changes since v8:
- Take the entry enums out of the functions and prefix them
appropriately.
- Use the visibility of *_NUM_ENTRIES to allocate the cdat_table
- Fix volatile_mr -> nonvolatile_mr
V7 Cover letter - lightly edited.
Whilst I have carried on Huai-Cheng Kuo's series version
Matheus Ferst writes:
> The new method is identical to ppc_next_unmasked_interrupt_generic,
> processor-specific code will be added/removed in the following patches.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
Fiona Ebner wrote:
> in the error case. The documentation in include/io/channel.h states
> that -1 or QIO_CHANNEL_ERR_BLOCK should be returned upon error. Simply
> passing along the return value from the bdrv-functions has the
> potential to confuse the call sides. Non-blocking mode is not
>
Am 14.10.22 um 13:07 schrieb Alex Bennée:
Christian Borntraeger writes:
Am 14.10.22 um 09:30 schrieb Christian Borntraeger:
Am 10.10.22 um 19:29 schrieb Michael S. Tsirkin:
From: Alex Bennée
All the boilerplate virtio code does the same thing (or should at
least) of checking to see if
When virtio_net_flush_tx() reaches the tx_burst value all the queue is
not flushed and nothing restart the timer or the bottom half function.
For BH, this is only missing in the virtio_net_tx_complete() function.
For the timer, the same fix is needed in virtio_net_tx_complete() but
it must be
Matheus Ferst writes:
> The new method is identical to ppc_deliver_interrupt, processor-specific
> code will be added/removed in the following patches.
>
> Signed-off-by: Matheus Ferst
Reviewed-by: Fabiano Rosas
On Sun, Oct 09, 2022 at 01:48:32PM +0800, Jason Wang wrote:
> We use to warn on wrong rid2pasid entry. But this error could be
> triggered by the guest and could happens during initialization. So
> let's don't warn in this case.
>
> Signed-off-by: Jason Wang
Reviewed-by: Peter Xu
--
Peter Xu
On Fri, 14 Oct 2022, Mark Cave-Ayland wrote:
On 03/10/2022 21:13, BALATON Zoltan wrote:
By slight reorganisation we can avoid an else branch and some code
duplication which makes it easier to follow the code.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 6 +++---
When virtio-net is used with the socket netdev backend, the backend
can be busy and not able to collect new packets.
In this case, net_socket_receive() returns 0 and registers a poll function
to detect when the socket is ready again.
In virtio_net_tx_bh(), virtio_net_flush_tx() forwards the 0,
When virtio_net_flush_tx() reaches the tx_burst value all
the queue is not flushed and nothing restart the timer.
Fix that by doing for TX timer as we do for bottom half TX:
rearming the timer if we find any packet to send during the
virtio_net_flush_tx() call.
Fixes: e3f30488e5f8 ("virtio-net:
Am 14.10.22 um 15:21 schrieb Alex Bennée:
During migration the virtio device state can be restored before we
restart the VM. As no devices can be running while the VM is paused it
makes sense to bail out early in that case.
This returns the order introduced in:
9f6bcfd99f (hw/virtio: move
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