On Thu, Dec 15, 2022 at 9:50 PM Longpeng(Mike) wrote:
>
> From: Longpeng
>
> Signed-off-by: Longpeng
> ---
> .../devices/vhost-vdpa-generic-device.rst | 68 +++
> 1 file changed, 68 insertions(+)
> create mode 100644 docs/system/devices/vhost-vdpa-generic-device.rst
>
>
On Wed, Dec 14, 2022 at 5:43 PM Fiona Ebner wrote:
>
> Am 25.08.22 um 11:29 schrieb Fiona Ebner:
> > Currently, VMXNET3_MAX_MTU itself (being 9000) is not considered a
> > valid value for the MTU, but a guest running ESXi 7.0 might try to
> > set it and fail the assert [0].
> >
> > In the Linux
On Thu, Dec 15, 2022 at 11:23 PM Thomas Huth wrote:
>
> On 10/11/2022 13.52, Thomas Huth wrote:
> > Running QEMU with "-nic help" used to work in QEMU 5.2 and earlier
> > versions, but since QEMU 6.0 it just complains that "help" is not
> > a valid value here. This patch series fixes this problem
On Thu, Dec 15, 2022 at 7:32 PM Eugenio Pérez wrote:
>
> Currently iova range is requested once per queue pair in the case of
> net. Reduce the number of ioctls asking it once at initialization and
> reusing that value for each vhost_vdpa.
>
> Signed-off-by: Eugenio Pérez
> ---
>
On Thu, Dec 15, 2022 at 7:32 PM Eugenio Pérez wrote:
>
> Isolate control virtqueue in its own group, allowing to intercept control
> commands but letting dataplane run totally passthrough to the guest.
>
> Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
Thanks
> ---
> v9:
> * Reuse
4-v2' of https://repo.or.cz/qemu/armbru into
> staging (2022-12-14 22:42:14 +)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20221215-1
>
> for you to fetch changes up to 9e406eea309bbe44c
The current logic attempts to shift the VS-level bits into their correct
position in mip while leaving the remaining bits in-tact. This is both
pointless and likely incorrect since one would expect that any new, future
VS-level interrupts will get their own position in mip rather than sharing
with
Per the AIA specification, writes to stimecmp from VS level should
trap when hvictl.VTI is set since the write may cause vsip.STIP to
become unset.
Fixes: 3ec0fe18a31f ("target/riscv: Add vstimecmp support")
Signed-off-by: Andrew Bresticker
---
target/riscv/csr.c | 6 ++
1 file changed, 6
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 32
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 15 +++
3 files changed, 49 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c
From: Joao Martins
Specifically XENMEM_add_to_physmap with space XENMAPSPACE_shared_info to
allow the guest to set its shared_info page.
Signed-off-by: Joao Martins
[dwmw2: Use the xen_overlay device, add compat support]
Signed-off-by: David Woodhouse
---
target/i386/kvm/trace-events | 1 +
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 40 +++
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 12
3 files changed, 54 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c
From: Joao Martins
Additionally set XEN_INTERFACE_VERSION to most recent in order to
exercise the "new" event_channel_op.
Signed-off-by: Joao Martins
[dwmw2: Ditch event_channel_op_compat which was never available to HVM guests]
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c |
From: Joao Martins
This means handling the new exit reason for Xen but still
crashing on purpose. As we implement each of the hypercalls
we will then return the right return code.
Signed-off-by: Joao Martins
[dwmw2: Add CPL to hypercall tracing, disallow hypercalls from CPL > 0]
Signed-off-by:
From: Joao Martins
This is just meant to serve as an example on how we can implement
hypercalls. xen_version specifically since Qemu does all kind of
feature controllability. So handling that here seems appropriate.
Signed-off-by: Joao Martins
[dwmw2: Implement kvm_gva_rw() safely]
From: David Woodhouse
This just initializes the basic Xen support in KVM for now.
Signed-off-by: David Woodhouse
---
accel/kvm/kvm-all.c | 1 +
include/sysemu/kvm_int.h| 1 +
target/i386/kvm/kvm.c | 53 +
target/i386/kvm/meson.build | 2
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 77 +++
hw/i386/kvm/xen_evtchn.h | 2 +
target/i386/kvm/xen-emu.c | 15
3 files changed, 94 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c
On Fri, Dec 9, 2022 at 12:58 AM Mayuresh Chitale
wrote:
>
> Currently the ISA string for a CPU is generated from two different
> arrays, one for single letter extensions and another for multi letter
> extensions. Add all the single letter extensions to the isa_ext_data
> array and use it for
Hello Andreas,
Am 15.12.22 um 08:36 schrieb andschl...@freenet.de:
Hello dear Qemu community,
I installed qemu under Windows 11 home and downloaded the following
file. kali-linux-2022.4-qemu-amd64.qcow2 and started it with the
following command. unfortunately without sound what kind of
From: Leandro Lupori
And this address bounces for me, FWIW:
eldorado-org-br.mail.protection.outlook.com[104.47.70.110] said:
550 5.4.1 Recipient address rejected: Access denied. AS(201806281)
/mjt
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 24
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 12
3 files changed, 38 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen_evtchn.c
From: David Woodhouse
This finally comes with a mechanism for actually injecting events into
the guest vCPU, with all the atomic-test-and-set that's involved in
setting the bit in the shinfo, then the index in the vcpu_info, and
injecting either the lapic vector as MSI, or letting KVM inject the
From: Joao Martins
Allow guest to setup the vcpu runstates which is used as
steal clock.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/cpu.h | 1 +
target/i386/kvm/kvm.c | 9 +
target/i386/kvm/xen-emu.c | 42
When vIOMMU is enabled, the vq->used_phys is actually the IOVA not
GPA. So we need to translate it to GPA before the syncing otherwise we
may hit the following crash since IOVA could be out of the scope of
the GPA log size. This could be noted when using virtio-IOMMU with
vhost using 1G memory.
> On Dec 15, 2022, at 4:56 AM, Cédric Le Goater wrote:
>
> On 11/9/22 00:13, John Johnson wrote:
>>
>> +DEFINE_PROP_UINT32("x-msg-timeout", VFIOUserPCIDevice, wait_time, 0),
>
> I see that patch 9 introduced :
>
> +static int wait_time = 5000; /* wait up to 5 sec for busy servers */
>
vmem->bitmap indexes the memory region of the virtio-mem backend at a
granularity of block_size. To calculate the index of target section offset,
the block_size should be divided instead of the bitmap_size.
Fixes: 2044969f0b ("virtio-mem: Implement RamDiscardManager interface")
Signed-off-by:
On 2022/12/15 16:46, Elta wrote:
Should be cpu->cfg.elen in range [8, 64].
Signed-off-by: Dongxue Zhang
---
target/riscv/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d14e95c9dc..1e8032c969 100644
---
Hi all,
I would like to ping a patch
https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg04568.html
https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg04570.html
> -Original Messages-From:"Dongdong Zhang"
> Sent Time:2022-11-30 09:53:57
>
On Mon, 2022-12-12 at 16:39 +, Paul Durrant wrote:
> On 12/12/2022 16:26, David Woodhouse wrote:
> > On Mon, 2022-12-12 at 16:16 +, Paul Durrant wrote:
> > > On 09/12/2022 09:56, David Woodhouse wrote:
> > > > From: Ankur Arora
> > > > The HVM_PARAM_CALLBACK_IRQ parameter controls the
On 12/15/22 15:30, James Bottomley wrote:
On Thu, 2022-12-15 at 15:22 -0500, Stefan Berger wrote:
On 12/15/22 15:07, James Bottomley wrote:
[...]
don't really have much interest in the migration use case, but I
knew it should work like the passthrough case, so that's what I
tested.
I
The downtime should be displayed during postcopy phase because the
switchover phase is done. OTOH it's weird to show "expected downtime"
which can confuse what does that mean if the switchover has already
happened anyway.
This is a slight ABI change on QMP, but I assume it shouldn't affect
From: David Woodhouse
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-compat.h | 24 +
target/i386/kvm/xen-emu.c| 70
2 files changed, 94 insertions(+)
diff --git a/target/i386/kvm/xen-compat.h b/target/i386/kvm/xen-compat.h
index
From: Ankur Arora
The HVMOP_set_evtchn_upcall_vector hypercall sets the per-vCPU upcall
vector, to be delivered to the local APIC just like an MSI (with an EOI).
This takes precedence over the system-wide delivery method set by the
HVMOP_set_param hypercall with HVM_PARAM_CALLBACK_IRQ. It's
From: David Woodhouse
This adds the basic structure for maintaining the port table and reporting
the status of ports therein.
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 108 +-
hw/i386/kvm/xen_evtchn.h | 4 ++
From: Joao Martins
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
hw/xen/xen-legacy-backend.c | 40 +
include/hw/xen/xen-legacy-backend.h | 3 +++
2 files changed, 32 insertions(+), 11 deletions(-)
diff --git a/hw/xen/xen-legacy-backend.c
From: Joao Martins
Such that PCI passthrough devices work for Xen emulated guests.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
hw/i386/xen/xen_platform.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/hw/i386/xen/xen_platform.c
From: David Woodhouse
The GSI callback (and later PCI_INTX) is a level triggered interrupt. It
is asserted when an event channel is delivered to vCPU0, and is supposed
to be cleared when the vcpu_info->evtchn_upcall_pending field for vCPU0
is cleared again.
Thankfully, Xen does *not* assert the
From: Joao Martins
Handle the hypercall to set a per vcpu info, and also wire up the default
vcpu_info in the shared_info page for the first 32 vCPUs.
To avoid deadlock within KVM a vCPU thread must set its *own* vcpu_info
rather than it being set from the context in which the hypercall is
From: Joao Martins
Introduce support for emulating CPUID for Xen HVM guests. It doesn't make
sense to advertise the KVM leaves to a Xen guest, so do it unconditionally
when the xen-version machine property is set.
Signed-off-by: Joao Martins
[dwmw2: Obtain xen_version from machine property,
Reviewed-by: Frank Chang
On Thu, Dec 15, 2022 at 11:09 PM Elta <503386...@qq.com> wrote:
> Should be cpu->cfg.elen in range [8, 64].
>
> Signed-off-by: Dongxue Zhang
> ---
> target/riscv/cpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c
Host!
r~
On Thu, 15 Dec 2022, 12:58 Philippe Mathieu-Daudé,
wrote:
> On 15/12/22 16:58, Richard Henderson wrote:
> > On 12/14/22 23:58, Philippe Mathieu-Daudé wrote:
> >>> --- a/linux-user/alpha/target_mman.h
> >>> +++ b/linux-user/alpha/target_mman.h
> >>> @@ -3,6 +3,10 @@
> >>>
> >>>
It's also has a race condition.
Please see
https://lore.kernel.org/qemu-devel/20221206041715.314209-18-richard.hender...@linaro.org/
r~
On Thu, 15 Dec 2022, 13:33 Michael Tokarev, wrote:
> 04.10.2022 22:52, Richard Henderson wrote:
> > From: Leandro Lupori
> >
> > PowerPC64 processors
From: David Woodhouse
Just a dummy implementation which will sched_yield(), but it's enough to
stop the Linux guest panicking when running on a host kernel which doesn't
intercept SCHEDOP_poll and lets it reach userspace.
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 11
From: Joao Martins
In order to support Linux vdso in Xen.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/cpu.h | 1 +
target/i386/kvm/kvm.c | 9
target/i386/kvm/xen-emu.c | 86 +--
target/i386/machine.c |
From: David Woodhouse
The xen_overlay device (and later similar devices for event channels and
grant tables) need to be instantiated. Do this from a kvm_type method on
the PC machine derivatives, since KVM is only way to support Xen emulation
for now.
Signed-off-by: David Woodhouse
---
Xen guests actually boot now. No PV drivers, as there's no grant table
or xenstore yet. But event channel IPIs are working, as are in-kernel
vCPU timers.
Moderately unhappy with having to poll for the GSI callback going down,
because we don't have a hook on the PIC EOI. If I can fix that for VFIO
From: David Woodhouse
Also check for XEN_ATTACH mode in xen_init()
Suggested-by: Paolo Bonzini
Signed-off-by: David Woodhouse
---
accel/xen/xen-all.c | 4
include/hw/xen/xen.h | 5 +++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/accel/xen/xen-all.c
From: David Woodhouse
The guest is permitted to specify an arbitrary domain/bus/device/function
and INTX pin from which the callback IRQ shall appear to have come.
In QEMU we can only easily do this for devices that actually exist, and
even that requires us "knowing" that it's a PCMachine in
From: David Woodhouse
Add the array of virq ports to each vCPU so that we can deliver timers,
debug ports, etc. Global virqs are allocated against vCPU 0 initially,
but can be migrated to other vCPUs (when we implement that).
The kernel needs to know about VIRQ_TIMER in order to accelerate
From: David Woodhouse
For the shared info page and for grant tables, Xen shares its own pages
from the "Xen heap" to the guest. The guest requests that a given page
from a certain address space (XENMAPSPACE_shared_info, etc.) be mapped
to a given GPA using the XENMEM_add_to_physmap hypercall.
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 67 +++
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 15 +
3 files changed, 84 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c
From: Joao Martins
It allows to shutdown itself via hypercall with any of the 3 reasons:
1) self-reboot
2) shutdown
3) crash
Implementing SCHEDOP_shutdown sub op let us handle crashes gracefully rather
than leading to triple faults if it remains unimplemented.
Signed-off-by: Joao Martins
From: David Woodhouse
The XEN_EMU option will cover core Xen support in target/, which exists
only for x86 with KVM today but could theoretically also be implemented
on Arm/Aarch64 and with TCG or other accelerators. It will also cover
the support for architecture-independent grant table and
From: Joao Martins
The only thing we need to handle on KVM side is to change the
pfn from R/W to R/O.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
hw/i386/xen/xen_platform.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git
From: Ankur Arora
The HVM_PARAM_CALLBACK_IRQ parameter controls the system-wide event
channel upcall method. The vector support is handled by KVM internally,
when the evtchn_upcall_pending field in the vcpu_info is set.
The GSI and PCI_INTX delivery methods are not supported. yet; those
need
From: Joao Martins
This is simply when guest tries to register a vcpu_info
and since vcpu_info placement is optional in the minimum ABI
therefore we can just fail with -ENOSYS
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 25
From: Joao Martins
This is when guest queries for support for HVMOP_pagetable_dying.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/target/i386/kvm/xen-emu.c
Hi, Lei
Could you please review this series?
On 11/22/22 22:07, zhenwei pi wrote:
v1 -> v2:
- fix coding style and use 'g_strjoin()' instead of 'char services[128]'
(suggested by Dr. David Alan Gilbert)
- wrapper function 'cryptodev_backend_account' to record statistics, and
allocate
On 15/12/22 16:58, Richard Henderson wrote:
On 12/14/22 23:58, Philippe Mathieu-Daudé wrote:
--- a/linux-user/alpha/target_mman.h
+++ b/linux-user/alpha/target_mman.h
@@ -3,6 +3,10 @@
#define TARGET_MADV_DONTNEED 6
+#define TARGET_MS_ASYNC 1
+#define TARGET_MS_SYNC 2
+#define
This test currently fails when run on a host for which the QEMU target
has no default machine set:
ERROR| Output: qemu-system-aarch64: No machine specified, and there is
no default
Signed-off-by: Fabiano Rosas
---
tests/avocado/version.py | 1 +
1 file changed, 1 insertion(+)
diff --git
From: David Woodhouse
It calls an internal close_port() helper which will also be used from
EVTCHNOP_reset and will actually do the work to disconnect/unbind a port
once any of that is actually implemented in the first place.
That in turn calls a free_port() internal function which will be in
From: Joao Martins
Specifically add listing, injection of event channels.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
hmp-commands.hx | 30 +++
hw/i386/kvm/xen_evtchn.c | 83
hw/i386/kvm/xen_evtchn.h | 3 ++
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 162 ++
hw/i386/kvm/xen_evtchn.h | 2 +
target/i386/kvm/xen-emu.c | 12 +++
3 files changed, 176 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c
04.10.2022 22:52, Richard Henderson wrote:
From: Leandro Lupori
PowerPC64 processors handle direct branches better than indirect
ones, resulting in less stalled cycles and branch misses.
However, PPC's tb_target_set_jmp_target() was only using direct
branches for 16-bit jumps, while
From: David Woodhouse
Xen will "latch" the guest's 32-bit or 64-bit ("long mode") setting when
the guest writes the MSR to fill in the hypercall page, or when the guest
sets the event channel callback in HVM_PARAM_CALLBACK_IRQ.
KVM handles the former and sets the kernel's long_mode flag
On Thu, 2022-12-15 at 13:46 -0500, Stefan Berger wrote:
>
>
> On 12/15/22 13:01, James Bottomley wrote:
> > From: James Bottomley
> >
> > The Microsoft Simulator (mssim) is the reference emulation platform
> > for the TCG TPM 2.0 specification.
> >
> >
On 12/15/22 14:22, James Bottomley wrote:
On Thu, 2022-12-15 at 13:46 -0500, Stefan Berger wrote:
On 12/15/22 13:01, James Bottomley wrote:
From: James Bottomley
The Microsoft Simulator (mssim) is the reference emulation platform
for the TCG TPM 2.0 specification.
On Thu, 2022-12-15 at 14:35 -0500, Stefan Berger wrote:
>
>
> On 12/15/22 14:22, James Bottomley wrote:
> > On Thu, 2022-12-15 at 13:46 -0500, Stefan Berger wrote:
> > >
> > >
> > > On 12/15/22 13:01, James Bottomley wrote:
> > > > From: James Bottomley
> > > >
> > > > The Microsoft
On 12/15/22 23:51, Richard Henderson wrote:
On 12/14/22 23:50, Philippe Mathieu-Daudé wrote:
On 6/12/22 05:40, Richard Henderson wrote:
Regenerate with ADDU16I included.
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-insn-defs.c.inc | 10 +-
1 file changed, 9
On 12/15/22 14:40, James Bottomley wrote:
On Thu, 2022-12-15 at 14:35 -0500, Stefan Berger wrote:
On 12/15/22 14:22, James Bottomley wrote:
On Thu, 2022-12-15 at 13:46 -0500, Stefan Berger wrote:
On 12/15/22 13:01, James Bottomley wrote:
From: James Bottomley
The Microsoft Simulator
On 12/15/22 11:50, WANG Xuerui wrote:
So do you need the addu16i.d marked as @qemu now?
Soonish. I made the change locally, but merging back to your repo seems to be
disabled.
I can push the change into
loongarch-opcodes tomorrow if so wanted.
Or that; it's probably easier.
Of course
On Thu, 2022-12-15 at 14:57 -0500, Stefan Berger wrote:
> On 12/15/22 14:40, James Bottomley wrote:
> > On Thu, 2022-12-15 at 14:35 -0500, Stefan Berger wrote:
[...]
> > > You should also add a description to docs/specs/tpm.rst.
> >
> > Description of what? It functions exactly like passthrough
On 12/15/22 15:07, James Bottomley wrote:
On Thu, 2022-12-15 at 14:57 -0500, Stefan Berger wrote:
On 12/15/22 14:40, James Bottomley wrote:
On Thu, 2022-12-15 at 14:35 -0500, Stefan Berger wrote:
[...]
You should also add a description to docs/specs/tpm.rst.
Description of what? It
On Thu, 2022-12-15 at 15:22 -0500, Stefan Berger wrote:
> On 12/15/22 15:07, James Bottomley wrote:
[...]
> > don't really have much interest in the migration use case, but I
> > knew it should work like the passthrough case, so that's what I
> > tested.
>
> I think your device needs to block
On Thu, 15 Dec 2022 at 09:39, Juan Quintela wrote:
>
> The following changes since commit 5204b499a6cae4dfd9fe762d5e6e82224892383b:
>
> mailmap: Fix Stefan Weil author email (2022-12-13 15:56:57 -0500)
>
> are available in the Git repository at:
>
> https://gitlab.com/juan.quintela/qemu.git
On Thu, Dec 15, 2022 at 05:16:33PM +, Jonathan Cameron wrote:
> On Wed, 14 Dec 2022 12:54:11 -0800
> Ira Weiny wrote:
>
> > The Flex Bus Port DVSEC was missing on type 3 devices which was blocking
> > RAS checks.[1]
> >
> > Add the Flex Bus Port DVSEC to type 3 devices as per CXL 3.0
Hi, this is your Linux kernel regression tracker. Top-posting for once,
to make this easily accessible to everyone.
Was there some progress to get this regression resolved? From here it
looks stalled, but maybe I missed something.
Ciao, Thorsten (wearing his 'the Linux kernel's regression
On 15/12/22 15:09, Alex Bennée wrote:
This aids subsystems (like gdbstub) that want to trigger a flush
without pulling target specific headers.
[AJB: RFC because this is part of a larger gdbstub series but I wanted
to post for feedback in case anyone wants to suggest better naming].
in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20221215-1
for you to fetch changes up to 9e406eea309bbe44c7fb17f6af112d2b756854ad:
target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator (2022-12-15
17:37:48 +
From: Alberto Faria
Add more annotations to functions, describing valid and invalid
calls from coroutine to non-coroutine context.
When applied to a function, no_coroutine_fn advertises that it should
not be called from coroutine_fn functions. This can be because the
function blocks or, in the
Richard Henderson writes:
> On 12/15/22 06:09, Alex Bennée wrote:
>> This aids subsystems (like gdbstub) that want to trigger a flush
>> without pulling target specific headers.
>> [AJB: RFC because this is part of a larger gdbstub series but I
>> wanted
>> to post for feedback in case anyone
On 12/15/22 08:46, Alex Bennée wrote:
I'll rename and include when I send the gdbstub stuff. I don't know how
far you want to go to eliminate target specific handling from the rest
of TB maintenance - indeed I'm not sure anything else is possible?
I can't think that anything else is possible.
On Tue, 13 Dec 2022 at 13:36, Chuang Xu wrote:
>
> Before using any flatview, sanity check we're not during a memory
> region transaction or the map can be invalid.
>
> Signed-off-by: Chuang Xu
> ---
> include/exec/memory.h | 9 +
> softmmu/memory.c | 1 -
> 2 files changed, 9
On Wed, 14 Dec 2022 12:54:11 -0800
Ira Weiny wrote:
> The Flex Bus Port DVSEC was missing on type 3 devices which was blocking
> RAS checks.[1]
>
> Add the Flex Bus Port DVSEC to type 3 devices as per CXL 3.0 8.2.1.3.
>
> [1]
>
On Thu, Dec 15, 2022 at 09:40:41AM +, Daniel P. Berrangé wrote:
> On Wed, Dec 14, 2022 at 04:30:48PM -0500, Peter Xu wrote:
> > On Wed, Dec 14, 2022 at 09:14:09AM +, Daniel P. Berrangé wrote:
> > > On Tue, Dec 13, 2022 at 04:38:46PM -0500, Peter Xu wrote:
> > > > From: "manish.mishra"
> >
On Thu, 15 Dec 2022 08:14:52 +0100
Markus Armbruster wrote:
> Jonathan Cameron writes:
>
> > On Fri, 9 Dec 2022 14:47:58 +0100
> > Markus Armbruster wrote:
> >
> > Hi Markus,
> >
> > One comment on the CXL ones. Others CXL related changes
> > all looks fine to me.
> >
> > Thanks for
Clang has a generic __annotate__ attribute that can be used by
static analyzers to understand properties of functions and
analyze the control flow.
Unlike TSA annotations, the __annotate__ attribute applies to function
pointers as well, which is very fortunate because many BlockDriver
function
From: Alberto Faria
Clang has a generic __annotate__ attribute that can be used by
static analyzers to understand properties of functions and
analyze the control flow. Furthermore, unlike TSA annotations, the
__annotate__ attribute applies to function pointers as well.
As a first step towards
On Thu, 15 Dec 2022 08:34:10 +0100
Markus Armbruster wrote:
> Jonathan Cameron writes:
>
> > On Sat, 10 Dec 2022 08:09:06 +0100
> > Markus Armbruster wrote:
> >
> >> Markus Armbruster writes:
> >>
> >> > hw/cxl/cxl_pci.h and hw/cxl/cxl_cdat.h include each other. Neither
> >> > header
在 2022/12/15 下午3:29, Philippe Mathieu-Daudé 写道:
Hi,
On 2/12/22 11:25, Song Gao wrote:
The following changes since commit
c4ffd91aba1c3d878e99a3e7ba8aad4826728ece:
Update VERSION for v7.2.0-rc3 (2022-11-29 18:15:26 -0500)
are available in the Git repository at:
On 12/15/22 08:58, Philippe Mathieu-Daudé wrote:
On 15/12/22 08:27, Helge Deller wrote:
msync() uses the flags MS_ASYNC, MS_INVALIDATE and MS_SYNC, which differ
between platforms, specifcally on alpha and hppa.
Add a target to host translation for those and wire up a nicer strace
output.
This
Signed-off-by: Juan Quintela
Reviewed-by: Leonardo Bras
---
migration/ram.h | 1 +
migration/ram.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/migration/ram.h b/migration/ram.h
index e844966f69..038d52f49f 100644
--- a/migration/ram.h
+++ b/migration/ram.h
@@ -66,6
From: Peter Xu
With the new code to send pages in rp-return thread, there's little help to
keep lots of the old code on maintaining the preempt state in migration
thread, because the new way should always be faster..
Then if we'll always send pages in the rp-return thread anyway, we don't
need
From: Peter Xu
We used to allocate PSS structure on the stack for precopy when sending
pages. Make it static, so as to describe per-channel ram migration status.
Here we declared RAM_CHANNEL_MAX instances, preparing for postcopy to use
it, even though this patch has not yet to start using the
Am 14.12.2022 um 23:35 hat Peter Maydell geschrieben:
> On Wed, 14 Dec 2022 at 13:45, Kevin Wolf wrote:
> >
> > The following changes since commit 5204b499a6cae4dfd9fe762d5e6e82224892383b:
> >
> > mailmap: Fix Stefan Weil author email (2022-12-13 15:56:57 -0500)
> >
> > are available in the Git
Hi; I see this migration qtest failure on my x86 macos box:
▶ 32/591
ERROR:../../tests/qtest/migration-helpers.c:151:migrate_query_not_failed:
assertion fail
ed: (!g_str_equal(status, "failed")) ERROR
32/591 qemu:qtest+qtest-aarch64 / qtest-aarch64/migration-test
ERROR
From: Xiaojuan Yang
Add cfi01 pflash device for LoongArch virt machine
Signed-off-by: Xiaojuan Yang
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20221130100647.398565-1-yangxiaoj...@loongson.cn>
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig| 1 +
hw/loongarch/acpi-build.c
From: Peter Xu
Now with rs->pss we can already cache channels in pss->pss_channels. That
pss_channel contains more infromation than rs->f because it's per-channel.
So rs->f could be replaced by rss->pss[RAM_CHANNEL_PRECOPY].pss_channel,
while rs->f itself is a bit vague now.
Note that vanilla
From: Peter Xu
The major change is to replace "!save_page_use_compression()" with
"xbzrle_enabled" to make it clear.
Reasonings:
(1) When compression enabled, "!save_page_use_compression()" is exactly the
same as checking "xbzrle_enabled".
(2) When compression disabled,
From: Peter Xu
To prepare for thread-safety on page accountings, at least below counters
need to be accessed only atomically, they are:
ram_counters.transferred
ram_counters.duplicate
ram_counters.normal
ram_counters.postcopy_bytes
There are a lot of other
From: Peter Xu
Migration code has a lot to do with host pages. Teaching PSS core about
the idea of host page helps a lot and makes the code clean. Meanwhile,
this prepares for the future changes that can leverage the new PSS helpers
that this patch introduces to send host page in another
1 - 100 of 223 matches
Mail list logo
