Re: [PATCH 10/11] alsaaudio: change default playback settings

2022-12-29 Thread Volker Rümelin
Am 28.12.22 um 14:52 schrieb Christian Schoenebeck: On Monday, December 26, 2022 4:08:37 PM CET Volker Rümelin wrote: Am 21.12.22 um 12:03 schrieb Christian Schoenebeck: On Sunday, December 18, 2022 6:15:38 PM CET Volker Rümelin wrote: The currently used default playback settings in the ALSA

[PATCH v2 04/12] hw/char: riscv_htif: Use conventional 's' for HTIFState

2022-12-29 Thread Bin Meng
QEMU source codes tend to use 's' to represent the hardware state. Let's use it for HTIFState. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- (no changes since v1) hw/char/riscv_htif.c | 64 ++-- 1 file

[PATCH v2 0/2] Hexagon: fix signal context save & restore bug

2022-12-29 Thread Mukilan Thiyagarajan
This patchset is to fix the issue discovered in this thread when hexagon toolchain was upgraded to a newer version. https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg01102.html Investigation revealed that the bug was not in the toolchain as suspected in the above thread, but in the

[PATCH v2 02/12] hw/char: riscv_htif: Drop {to, from}host_size in HTIFState

2022-12-29 Thread Bin Meng
These are not used anywhere. Drop them. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- (no changes since v1) include/hw/char/riscv_htif.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/hw/char/riscv_htif.h

[PATCH v2 1/2] linux-user/hexagon: fix signal context save & restore

2022-12-29 Thread Mukilan Thiyagarajan
This patch fixes the issue originally reported in this thread: https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg01102.html The root cause of the issue is a bug in the hexagon specific logic for saving & restoring context during signal delivery. The CPU state has two different

[PATCH v2 11/12] hw/riscv/boot.c: Introduce riscv_find_firmware()

2022-12-29 Thread Bin Meng
Rename previous riscv_find_firmware() to riscv_find_bios(), and introduce a new riscv_find_firmware() to implement the first half part of the work done in riscv_find_and_load_firmware(). This new API is helpful for machine that wants to know the final chosen firmware file name but does not want

Re: [PATCH v2 5/5] target/s390x/tcg/excp_helper: Restrict system headers to sysemu

2022-12-29 Thread Thomas Huth
On 17/12/2022 16.24, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/tcg/excp_helper.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index fe02d82201..bc767f0443

Re: [PATCH v2 3/5] hw/s390x/pv: Restrict Protected Virtualization to sysemu

2022-12-29 Thread Thomas Huth
On 17/12/2022 16.24, Philippe Mathieu-Daudé wrote: Protected Virtualization is irrelevant in user emulation. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu_features.c | 4 target/s390x/cpu_models.c | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) Reviewed-by:

RE: [PATCH 2/2] target/hexagon: rename aliased register HEX_REG_P3_0

2022-12-29 Thread Mukilan Thiyagarajan (QUIC)
> Not sure why you broke this comment into two lines, but ... I'm not sure if this issue is on my end or your mail client, but the formatting appears to be correct in the patchew:

Re: [PATCH 4/5] target/s390x: Restrict sysemu/reset.h to system emulation

2022-12-29 Thread Thomas Huth
On 20/12/2022 15.56, Philippe Mathieu-Daudé wrote: In user emulation, threads -- implemented as CPU -- are created/destroyed, but never reset. There is no point in allowing the user emulation access the sysemu/reset API. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu.c | 4 +++-

[PATCH v2 12/12] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading

2022-12-29 Thread Bin Meng
At present create_fdt() calls htif_uses_elf_symbols() to determine whether to insert a property for the HTIF. This unfortunately creates a hidden dependency to riscv_load_{firmware,kernel} that create_fdt() must be called after the ELF {firmware,kernel} image has been loaded. Decouple such

Re: [PATCH v3] hw/rtc/mc146818rtc: Make this rtc device target independent

2022-12-29 Thread Thomas Huth
On 16/12/2022 15.26, Bernhard Beschow wrote: Am 12. Dezember 2022 07:56:00 UTC schrieb Thomas Huth : The only reason for this code being target dependent is the apic-related code in rtc_policy_slew_deliver_irq(). Since these apic functions are rather simple, we can easily move them into a

[PATCH v5 05/14] vfio/migration: Allow migration without VFIO IOMMU dirty tracking support

2022-12-29 Thread Avihai Horon
Currently, if IOMMU of a VFIO container doesn't support dirty page tracking, migration is blocked. This is because a DMA-able VFIO device can dirty RAM pages without updating QEMU about it, thus breaking the migration. However, this doesn't mean that migration can't be done at all. In such case,

[PATCH v5 13/14] vfio: Alphabetize migration section of VFIO trace-events file

2022-12-29 Thread Avihai Horon
Sort the migration section of VFIO trace events file alphabetically and move two misplaced traces to common.c section. Signed-off-by: Avihai Horon --- hw/vfio/trace-events | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/vfio/trace-events

[PATCH v2] tests/tcg/hexagon: fix underspecifed asm constraints

2022-12-29 Thread Mukilan Thiyagarajan
There are two test cases where the inline asm doesn't have the correct constraints causing them to fail. In misc.c, the 'result' output needs the early clobber modifier since the rest of the inputs are read after assignment to the output register. In mem_noshuf.c, the register r7 is written to

[PATCH v2 03/12] hw/char: riscv_htif: Drop useless assignment of memory region

2022-12-29 Thread Bin Meng
struct HTIFState has 3 members for address space and memory region, and are initialized during htif_mm_init(). But they are actually useless. Drop them. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- (no changes since v1)

[PATCH v2 2/2] target/hexagon: rename aliased register HEX_REG_P3_0

2022-12-29 Thread Mukilan Thiyagarajan
The patch renames the identifier of the 32bit register HEX_REG_P3_0 to HEX_REG_P3_0_ALIASED. This change is to intended to provide some warning that HEX_REG_P3_0 is an aliased register which has multiple representations in CPU state and therefore might require special handling in some contexts.

Re: [PATCH v2 00/12] hw/riscv: Improve Spike HTIF emulation fidelity

2022-12-29 Thread Bin Meng
Hi Daniel, On Thu, Dec 29, 2022 at 6:25 PM Daniel Henrique Barboza wrote: > > Bin, > > Not sure if it's a problem on my side but I can't find patch 12/12. I didn't > received in my mailbox. I tried patchwork but didn't find in there: > >

Re: [PATCH v2 00/12] hw/riscv: Improve Spike HTIF emulation fidelity

2022-12-29 Thread Daniel Henrique Barboza
On 12/29/22 07:38, Bin Meng wrote: Hi Daniel, On Thu, Dec 29, 2022 at 6:25 PM Daniel Henrique Barboza wrote: Bin, Not sure if it's a problem on my side but I can't find patch 12/12. I didn't received in my mailbox. I tried patchwork but didn't find in there:

[PATCH v4] hw/rtc/mc146818rtc: Make this rtc device target independent

2022-12-29 Thread Thomas Huth
The only reason for this code being target dependent is the apic-related code in rtc_policy_slew_deliver_irq(). Since these apic functions are rather simple, we can easily move them into a new, separate file (apic_irqcount.c) which will always be compiled and linked if either APIC or the mc146818

[PATCH v5 09/14] vfio/migration: Rename functions/structs related to v1 protocol

2022-12-29 Thread Avihai Horon
To avoid name collisions, rename functions and structs related to VFIO migration protocol v1. This will allow the two protocols to co-exist when v2 protocol is added, until v1 is removed. No functional changes intended. Signed-off-by: Avihai Horon --- include/hw/vfio/vfio-common.h | 2 +-

[PATCH v5 06/14] migration/qemu-file: Add qemu_file_get_to_fd()

2022-12-29 Thread Avihai Horon
Add new function qemu_file_get_to_fd() that allows reading data from QEMUFile and writing it straight into a given fd. This will be used later in VFIO migration code. Signed-off-by: Avihai Horon Reviewed-by: Vladimir Sementsov-Ogievskiy --- migration/qemu-file.h | 1 + migration/qemu-file.c

[PATCH v5 02/14] migration: No save_live_pending() method uses the QEMUFile parameter

2022-12-29 Thread Avihai Horon
From: Juan Quintela So remove it everywhere. Signed-off-by: Juan Quintela Reviewed-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Dr. David Alan Gilbert --- include/migration/register.h | 3 +-- migration/savevm.h | 3 +-- hw/s390x/s390-stattrib.c | 2 +-

[PATCH v5 04/14] vfio/migration: Fix NULL pointer dereference bug

2022-12-29 Thread Avihai Horon
As part of its error flow, vfio_vmstate_change() accesses MigrationState->to_dst_file without any checks. This can cause a NULL pointer dereference if the error flow is taken and MigrationState->to_dst_file is not set. For example, this can happen if VM is started or stopped not during migration

[PATCH v5 03/14] migration: Simplify migration_iteration_run()

2022-12-29 Thread Avihai Horon
From: Juan Quintela Signed-off-by: Juan Quintela Signed-off-by: Avihai Horon --- migration/migration.c | 25 + 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/migration/migration.c b/migration/migration.c index 9795d0ec5c..61b9ce0fe8 100644 ---

Re: [PATCH 03/11] audio: rename hardware store to backend

2022-12-29 Thread Thomas Huth
On 18/12/2022 18.15, Volker Rümelin wrote: Use a consistent friendly name for the HWVoiceOut and HWVoiceIn structures. Signed-off-by: Volker Rümelin --- audio/audio_template.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/audio/audio_template.h

Re: [PATCH v2 00/12] hw/riscv: Improve Spike HTIF emulation fidelity

2022-12-29 Thread Daniel Henrique Barboza
Bin, Not sure if it's a problem on my side but I can't find patch 12/12. I didn't received in my mailbox. I tried patchwork but didn't find in there: https://patchwork.ozlabs.org/project/qemu-devel/list/?series=334352 And it's not in the ML archives as well:

Re: [PULL 17/21] target/hexagon: prepare input for the idef-parser

2022-12-29 Thread Thomas Huth
On 16/12/2022 21.48, Taylor Simpson wrote: From: Alessandro Di Federico Introduce infrastructure necessary to produce a file suitable for being parsed by the idef-parser. A build option is also added to fully disable the output of idef-parser, which is useful for debugging. Signed-off-by:

[PATCH v5 01/14] linux-headers: Update to v6.2-rc1

2022-12-29 Thread Avihai Horon
Update to commit 1b929c02afd3 ("Linux 6.2-rc1"). Signed-off-by: Avihai Horon --- include/standard-headers/drm/drm_fourcc.h | 63 +++- include/standard-headers/linux/ethtool.h | 81 - include/standard-headers/linux/fuse.h | 20 +- .../linux/input-event-codes.h

[PATCH v5 12/14] vfio/migration: Remove VFIO migration protocol v1

2022-12-29 Thread Avihai Horon
Now that v2 protocol implementation has been added, remove the deprecated v1 implementation. Signed-off-by: Avihai Horon --- include/hw/vfio/vfio-common.h | 5 - hw/vfio/common.c | 19 +- hw/vfio/migration.c | 701 +-

[PATCH v5 08/14] vfio/migration: Move migration v1 logic to vfio_migration_init()

2022-12-29 Thread Avihai Horon
Move vfio_dev_get_region_info() logic from vfio_migration_probe() to vfio_migration_init(). This logic is specific to v1 protocol and moving it will make it easier to add the v2 protocol implementation later. No functional changes intended. Signed-off-by: Avihai Horon --- hw/vfio/migration.c |

[PATCH v5 00/14] vfio/migration: Implement VFIO migration protocol v2

2022-12-29 Thread Avihai Horon
Hello, Now that QEMU 8.0 development cycle has started and MIG_DATA_SIZE ioctl is in kernel v6.2-rc1, I am sending v5 of this series with linux headers update and with the preview patches in v4 merged into this series. Following VFIO migration protocol v2 acceptance in kernel, this series

[PATCH v5 07/14] vfio/common: Change vfio_devices_all_running_and_saving() logic to equivalent one

2022-12-29 Thread Avihai Horon
vfio_devices_all_running_and_saving() is used to check if migration is in pre-copy phase. This is done by checking if migration is in setup or active states and if all VFIO devices are in pre-copy state, i.e. _SAVING | _RUNNING. In VFIO migration protocol v2 pre-copy support is made optional.

[PATCH v5 10/14] vfio/migration: Implement VFIO migration protocol v2

2022-12-29 Thread Avihai Horon
Implement the basic mandatory part of VFIO migration protocol v2. This includes all functionality that is necessary to support VFIO_MIGRATION_STOP_COPY part of the v2 protocol. The two protocols, v1 and v2, will co-exist and in the following patches v1 protocol code will be removed. There are

[PATCH v2 00/12] hw/riscv: Improve Spike HTIF emulation fidelity

2022-12-29 Thread Bin Meng
At present the 32-bit OpenSBI generic firmware image does not boot on Spike, only 64-bit image can. This is due to the HTIF emulation does not implement the proxy syscall interface which is required for the 32-bit HTIF console output. An OpenSBI bug fix [1] is also needed when booting the plain

[PATCH v2 05/12] hw/char: riscv_htif: Move registers from CPUArchState to HTIFState

2022-12-29 Thread Bin Meng
At present for some unknown reason the HTIF registers (fromhost & tohost) are defined in the RISC-V CPUArchState. It should really be put in the HTIFState struct as it is only meaningful to HTIF. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis ---

RE: [PATCH] tests/tcg/hexagon: fix underspecifed asm constraints

2022-12-29 Thread Mukilan Thiyagarajan (QUIC)
Thanks for the review, Taylor! > Good catch. However, the "p" argument is also modified, so we need to move > it to > the outputs list and use "+r"(p). This will also require swapping %1 and %2 > in the body. Ah, good point. I didn't account for memw(%2++#4) incrementing register %2. I've

RE: [PATCH 1/2] linux-user/hexagon: fix signal context save & restore

2022-12-29 Thread Mukilan Thiyagarajan (QUIC)
>> +: : : "r7", "p0", "p1", "p2", "p3"); } > Put the curly on the next line. Not sure if this issue is on my end or your mail client, but the formatting appears to be correct in the patchew:

Re: [PATCH 5/6] tests: add G_GNUC_PRINTF for various functions

2022-12-29 Thread Thomas Huth
On 19/12/2022 14.02, Daniel P. Berrangé wrote: Signed-off-by: Daniel P. Berrangé --- tests/qtest/ahci-test.c | 3 +++ tests/qtest/arm-cpu-features.c| 1 + tests/qtest/erst-test.c | 2 +- tests/qtest/ide-test.c| 3 ++- tests/qtest/ivshmem-test.c

[PATCH v5 14/14] docs/devel: Align VFIO migration docs to v2 protocol

2022-12-29 Thread Avihai Horon
Now that VFIO migration protocol v2 has been implemented and v1 protocol has been removed, update the documentation according to v2 protocol. Signed-off-by: Avihai Horon --- docs/devel/vfio-migration.rst | 68 --- 1 file changed, 30 insertions(+), 38 deletions(-)

[PATCH v5 11/14] vfio/migration: Optimize vfio_save_pending()

2022-12-29 Thread Avihai Horon
During pre-copy phase of migration vfio_save_pending() is called repeatedly and queries the VFIO device for its pending data size. As long as pending RAM size is over the threshold, migration can't converge and be completed. Therefore, during this time there is no point in querying the VFIO

Re: [PATCH v5 7/9] aspeed/soc : Add AST1030 support

2022-12-29 Thread Philippe Mathieu-Daudé
Hi, On 1/4/22 10:38, Jamin Lin wrote: From: Steven Lee The embedded core of AST1030 SoC is ARM Coretex M4. It is hard to be integrated in the common Aspeed Soc framework. We introduce a new ast1030 class with instance_init and realize handlers. Signed-off-by: Troy Lee Signed-off-by: Jamin

Re: [PATCH v3 01/10] tests/avocado: add RISC-V opensbi boot test

2022-12-29 Thread Bin Meng
Hi Daniel, On Thu, Dec 29, 2022 at 4:21 AM Daniel Henrique Barboza wrote: > > > > On 12/28/22 12:18, Bin Meng wrote: > > On Wed, Dec 28, 2022 at 9:38 PM Daniel Henrique Barboza > > wrote: > >> This test is used to do a quick sanity check to ensure that we're able > >> to run the existing QEMU

Re: [PATCH v2 1/5] exec/memory: Expose memory_region_access_valid()

2022-12-29 Thread Thomas Huth
On 17/12/2022 16.24, Philippe Mathieu-Daudé wrote: Instead of having hardware device poking into memory internal API, expose memory_region_access_valid(). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/s390-pci-inst.c | 2 +-

[PATCH v2 08/12] hw/riscv: spike: Remove the out-of-date comments

2022-12-29 Thread Bin Meng
Spike machine now supports OpenSBI plain binary bios image, so the comments are no longer valid. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- (no changes since v1) hw/riscv/spike.c | 5 - 1 file changed, 5 deletions(-) diff --git

[PATCH v2 01/12] hw/char: riscv_htif: Avoid using magic numbers

2022-12-29 Thread Bin Meng
The Spike HTIF is poorly documented. The only relevant info we can get from the internet is from Andrew Waterman at [1]. Add a comment block before htif_handle_tohost_write() to explain the tohost register format, and use meaningful macros instead of magic numbers in the codes. While we are

[PATCH v2 07/12] hw/char: riscv_htif: Support console output via proxy syscall

2022-12-29 Thread Bin Meng
At present the HTIF proxy syscall is unsupported. On RV32, only device 0 is supported so there is no console device for RV32. The only way to implement console funtionality on RV32 is to support the SYS_WRITE syscall. With this commit, the Spike machine is able to boot the 32-bit OpenSBI generic

[PATCH v2 09/12] hw/riscv/boot.c: make riscv_find_firmware() static

2022-12-29 Thread Bin Meng
From: Daniel Henrique Barboza The only caller is riscv_find_and_load_firmware(), which is in the same file. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Bin Meng Message-Id:

[PATCH v2 06/12] hw/char: riscv_htif: Remove forward declarations for non-existent variables

2022-12-29 Thread Bin Meng
There are forward declarations for 'vmstate_htif' and 'htif_io_ops' in riscv_htif.h however there are no definitions in the C codes. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- (no changes since v1) include/hw/char/riscv_htif.h | 3 --- 1

Re: [PATCH v2 2/5] hw/s390x/pv: Un-inline s390_pv_init()

2022-12-29 Thread Thomas Huth
On 17/12/2022 16.24, Philippe Mathieu-Daudé wrote: There is no point in having s390_pv_init() inlined. Directly call s390_pv_kvm_init() guarded by kvm_enabled() so the compiler can elide when CONFIG_KVM is not set. Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/pv.c | 4

Re: [PATCH 4/6] util/error: add G_GNUC_PRINTF for various functions

2022-12-29 Thread Thomas Huth
On 19/12/2022 14.02, Daniel P. Berrangé wrote: Signed-off-by: Daniel P. Berrangé --- util/error-report.c | 1 + util/error.c| 1 + 2 files changed, 2 insertions(+) diff --git a/util/error-report.c b/util/error-report.c index 5edb2e6040..6e44a55732 100644 --- a/util/error-report.c

[PATCH v2 10/12] hw/riscv/boot.c: introduce riscv_default_firmware_name()

2022-12-29 Thread Bin Meng
From: Daniel Henrique Barboza Some boards are duplicating the 'riscv_find_and_load_firmware' call because the 32 and 64 bits images have different names. Create a function to handle this detail instead of hardcoding it in the boards. Ideally we would bake this logic inside

Re: [PATCH v2 4/5] target/s390x/tcg/misc_helper: Remove unused "memory.h" include

2022-12-29 Thread Thomas Huth
On 17/12/2022 16.24, Philippe Mathieu-Daudé wrote: Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/tcg/misc_helper.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index

Re: [PATCH 04/11] audio: remove unused #define AUDIO_STRINGIFY

2022-12-29 Thread Thomas Huth
On 18/12/2022 18.15, Volker Rümelin wrote: Remove the unused #define AUDIO_STRINGIFY. It was last used before commit 470bcabd8f ("audio: Replace AUDIO_FUNC with __func__"). Signed-off-by: Volker Rümelin --- audio/audio_int.h | 3 --- 1 file changed, 3 deletions(-) diff --git

[PATCH v2] i386: Deprecate the -no-hpet QEMU command line option

2022-12-29 Thread Thomas Huth
The HPET setting has been turned into a machine property a while ago already, so we should finally do the next step and deprecate the legacy CLI option, too. Signed-off-by: Thomas Huth --- v2: - Rebased to current version from master branch / adjusted version info - Dropped the descrpition in

Re: [PATCH] fix gvtg cursor position if it is negative

2022-12-29 Thread qi zhou
To test, you need patch linux kernel too, I paste it here for convenience, and it have been sent to kernel devel mailling list also I have record two video for this patch, see https://1drv.ms/u/s!As-Ec5SPH0fuiy6ejq7TXOl8QenV?e=Lzh97y >From 8d2a0c2c265119cb481deab825ea59c9605f3bd8 Mon Sep 17

Re: [PATCH v3 07/10] hw/riscv/boot.c: use MachineState in riscv_load_initrd()

2022-12-29 Thread Alex Bennée
Daniel Henrique Barboza writes: > On 12/28/22 12:51, Philippe Mathieu-Daudé wrote: >> On 28/12/22 14:33, Daniel Henrique Barboza wrote: >>> 'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be >>> retrieved by the MachineState object for all callers. >>> >>> Cc: Palmer Dabbelt

[PATCH 1/9] hw/watchdog/wdt_aspeed: Map the whole MMIO range

2022-12-29 Thread Philippe Mathieu-Daudé
Avoid confusing two different things: - the WDT I/O region size ('iosize') - at which offset the SoC map the WDT ('offset') While it is often the same, we can map smaller region sizes at larger offsets. Here we are interested in the I/O region size. Rename as 'iosize' and map the whole range, not

[PATCH 5/9] hw/arm/aspeed_ast10x0: Map the secure SRAM

2022-12-29 Thread Philippe Mathieu-Daudé
Some SRAM appears to be used by the Secure Boot unit and crypto accelerators. Name it 'secure sram'. Note, the SRAM base address was already present but unused (the 'SBC' index is used for the MMIO peripheral). Interestingly using CFLAGS=-Winitializer-overrides reports:

[PATCH 7/9] hw/misc/aspeed_hace: Do not crash if address_space_map() failed

2022-12-29 Thread Philippe Mathieu-Daudé
address_space_map() can fail: uart:~$ hash test sha256_test tv[0]: Segmentation fault: 11 Thread 3 "qemu-system-arm" received signal SIGSEGV, Segmentation fault. gen_acc_mode_iov (req_len=0x718b7778, id=, iov=0x718b7780, s=0x56ce0bd0) at ../hw/misc/aspeed_hace.c:171

[PATCH 8/9] hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F

2022-12-29 Thread Philippe Mathieu-Daudé
This SoC uses a Cortex-M4F. QEMU only implements a M4, which is good enough. Add a TODO note in case the M4F is added. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed_ast10x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/aspeed_ast10x0.c

[PATCH 4/9] hw/arm/aspeed_ast10x0: Map I3C peripheral

2022-12-29 Thread Philippe Mathieu-Daudé
Since I don't have access to the datasheet, the relevant values were found in: https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed_ast10x0.c | 16 1 file changed, 16 insertions(+) diff

Re: [PATCH] riscv: do not set the rounding mode via `gen_set_rm`

2022-12-29 Thread Philippe Mathieu-Daudé
On 29/12/22 18:37, Saleem Abdulrasool wrote: From: Saleem Abdulrasool Setting the rounding mode via the `gen_set_rm` call would alter the state of the disassembler, resetting the `TransOp` in the assembler context. When we subsequently set the rounding mode to the desired value, we would

Re: [PATCH] ui/cocoa: user friendly characters for release mouse

2022-12-29 Thread Philippe Mathieu-Daudé
On 27/12/22 17:15, Christian Schoenebeck wrote: While mouse is grabbed, window title contains a hint for the user what keyboard keys to press to release the mouse. Make that hint text a bit more user friendly for a Mac user: - Replace "Ctrl" and "Alt" by appropriate symbols for those keyboard

Re: [PATCH v2 12/12] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading

2022-12-29 Thread Daniel Henrique Barboza
On 12/29/22 07:31, Bin Meng wrote: At present create_fdt() calls htif_uses_elf_symbols() to determine whether to insert a property for the HTIF. This unfortunately creates a hidden dependency to riscv_load_{firmware,kernel} that create_fdt() must be called after the ELF {firmware,kernel}

[PATCH 0/9] hw/arm/aspeed_ast10x0: Map more peripherals & few more fixes

2022-12-29 Thread Philippe Mathieu-Daudé
Trying to fix some bugs triggered running Zephyr. Still 2 bugs: 1/ uart:~$ sensor get SYSCLK [00:00:23.592,000] os: * USAGE FAULT * [00:00:23.593,000] os: Illegal use of the EPSR [00:00:23.593,000] os: r0/a1: 0x00033448 r1/a2: 0x r2/a3: 0x00047f50 [00:00:23.593,000]

[PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions

2022-12-29 Thread Philippe Mathieu-Daudé
IEC binary prefixes ease code review: the unit is explicit. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed_ast10x0.c | 3 ++- hw/arm/aspeed_ast2600.c | 3 ++- hw/arm/aspeed_soc.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/arm/aspeed_ast10x0.c

[PATCH] riscv: do not set the rounding mode via `gen_set_rm`

2022-12-29 Thread Saleem Abdulrasool
From: Saleem Abdulrasool Setting the rounding mode via the `gen_set_rm` call would alter the state of the disassembler, resetting the `TransOp` in the assembler context. When we subsequently set the rounding mode to the desired value, we would trigger an assertion in `decode_save_opc`. Instead

[PATCH v4 07/11] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()

2022-12-29 Thread Daniel Henrique Barboza
The sifive_u, spike and virt machines are writing the 'bootargs' FDT node during their respective create_fdt(). Given that bootargs is written only when '-append' is used, and this option is only allowed with the '-kernel' option, which in turn is already being check before executing

[PATCH v4 02/11] hw/riscv/spike: use 'fdt' from MachineState

2022-12-29 Thread Daniel Henrique Barboza
The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command. Remove the 'fdt' pointer from SpikeState and use MachineState::fdt instead. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe

[PATCH v4 04/11] hw/riscv/boot.c: exit early if filename is NULL in load_(kernel|initrd)

2022-12-29 Thread Daniel Henrique Barboza
riscv_load_kernel() and riscv_load_initrd() works under the assumption that 'kernel_filename' and 'filename' are not NULL. This is currently the case since all callers of both functions are checking for NULL before calling them. Put an assert in both to make sure that a NULL value for both cases

Re: [PATCH qemu] x86: don't let decompressed kernel image clobber setup_data

2022-12-29 Thread Borislav Petkov
On Wed, Dec 28, 2022 at 11:31:34PM -0800, H. Peter Anvin wrote: > As far as a crash... that sounds like a big and a pretty serious one at that. > > Could you let me know what kernel you are using and how *exactly* you are > booting it? Right, with CONFIG_X86_VERBOSE_BOOTUP=y in a guest here, it

[PATCH] fix gvtg cursor position if it is negative

2022-12-29 Thread qi zhou
>From 4f14d6216d3f05f01ffe419ff0baeebe416a3e58 Mon Sep 17 00:00:00 2001 From: Qi Zhou Date: Thu, 29 Dec 2022 20:25:06 +0800 Subject: [PATCH] fix gvtg cursor position if it is negative It is valid if position of cursor is negative(not hotspot coordinates). for example: precision section, resize,

RE: [PATCH 1/2] linux-user/hexagon: fix signal context save & restore

2022-12-29 Thread Taylor Simpson
Yes, the formatting is correct in patchew. I'll include these in my next PR. Thanks, Taylor > -Original Message- > From: Mukilan Thiyagarajan (QUIC) > Sent: Thursday, December 29, 2022 3:28 AM > To: Taylor Simpson ; Mukilan Thiyagarajan (QUIC) > ; qemu-devel@nongnu.org; >

[PATCH v4 08/11] hw/riscv/boot.c: use MachineState in riscv_load_initrd()

2022-12-29 Thread Daniel Henrique Barboza
'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be retrieved by the MachineState object for all callers. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/riscv/boot.c| 6 --

Re: [PATCH] fix gvtg cursor position if it is negative

2022-12-29 Thread qi zhou
To test, you need patch qemu too, I paste it here for convenience, and I it have been sent to qemu dev mailling list >From 4f14d6216d3f05f01ffe419ff0baeebe416a3e58 Mon Sep 17 00:00:00 2001 From: Qi Zhou Date: Thu, 29 Dec 2022 20:25:06 +0800 Subject: [PATCH] fix gvtg cursor position if it is

checkpoint/restore: Adding more "Getters" to the KVM API

2022-12-29 Thread scalingtree
Hi lists, We are in the process of using an external tool (CRIU) to checkpoint/restore a KVM-enabled virtual machine. Initially we target the hypervisor kvmtool but the extension, if done well, should allow to checkpoint any hypervisor: like Qemu or firecracker. CRIU can checkpoint and

[PATCH 9/9] tests/avocado: Test Aspeed Zephyr SDK v00.01.08 on AST1030 board

2022-12-29 Thread Philippe Mathieu-Daudé
Add a very quick test that runs some commands in a Zephyr shell: $ tests/venv/bin/avocado --show=app,console run -t os:zephyr tests/avocado (2/2) tests/avocado/machine_aspeed.py:AST1030Machine.test_ast1030_zephyros_1_07: console: *** Booting Zephyr OS build v00.01.07 *** console:

[PATCH 3/9] hw/arm/aspeed_ast10x0: Add various unimplemented peripherals

2022-12-29 Thread Philippe Mathieu-Daudé
Based on booting Zephyr demo from [1] running QEMU with '-d unimp' and checking missing devices in [2]. [1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07 [2] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Signed-off-by: Philippe

[PATCH 6/9] hw/arm/aspeed_ast10x0: Map HACE peripheral

2022-12-29 Thread Philippe Mathieu-Daudé
Since I don't have access to the datasheet, the relevant values were found in: https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Before on Zephyr: uart:~$ crypto aes256_cbc_vault aes256_cbc vault key 1 [00:00:06.699,000] hace_global:

[PATCH v4 06/11] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()

2022-12-29 Thread Daniel Henrique Barboza
riscv_load_initrd() returns the initrd end addr while also writing a 'start' var to mark the addr start. These informations are being used just to write the initrd FDT node. Every existing caller of riscv_load_initrd() is writing the FDT in the same manner. We can simplify things by writing the

[PATCH] riscv: do not set the rounding mode via `gen_set_rm`

2022-12-29 Thread Saleem Abdulrasool
From: Saleem Abdulrasool Setting the rounding mode via the `gen_set_rm` call would alter the state of the disassembler, resetting the `TransOp` in the assembler context. When we subsequently set the rounding mode to the desired value, we would trigger an assertion in `decode_save_opc`. Instead

[PATCH v4 00/11] riscv: OpenSBI boot test and cleanups

2022-12-29 Thread Daniel Henrique Barboza
Hi, This new version is still rebased on top of [1]: "[PATCH 00/12] hw/riscv: Improve Spike HTIF emulation fidelity" from Bin Meng. In this version there's a new patch, patch 4, where we added a g_assert() guard in both riscv_load_kernel() and riscv_load_initrd(), as proposed by Alex in the v3

[PATCH v4 05/11] hw/riscv/spike.c: load initrd right after riscv_load_kernel()

2022-12-29 Thread Daniel Henrique Barboza
This will make the code more in line with what the other boards are doing. We'll also avoid an extra check to machine->kernel_filename since we already checked that before executing riscv_load_kernel(). Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by:

[PATCH v4 01/11] tests/avocado: add RISC-V OpenSBI boot test

2022-12-29 Thread Daniel Henrique Barboza
This test is used to do a quick sanity check to ensure that we're able to run the existing QEMU FW image. 'sifive_u', 'spike' and 'virt' riscv64 machines, and 'sifive_u' and 'virt' 32 bit machines are able to run the default RISCV64_BIOS_BIN | RISCV32_BIOS_BIN firmware with minimal options. The

[PATCH v2 5/6] hw/net/igb: build support for igb/igbvf devices

2022-12-29 Thread Sriram Yagnaraman
Signed-off-by: Sriram Yagnaraman --- hw/i386/Kconfig| 1 + hw/net/Kconfig | 5 + hw/net/igb_core.c | 4 +--- hw/net/meson.build | 2 ++ 4 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index d22ac4a4b9..97a0b08842 100644 ---

[PATCH v2 3/6] hw/net/igb: register definitions

2022-12-29 Thread Sriram Yagnaraman
Signed-off-by: Sriram Yagnaraman --- hw/net/e1000_regs.h| 363 + hw/net/e1000x_common.c | 13 ++ hw/net/e1000x_common.h | 29 3 files changed, 376 insertions(+), 29 deletions(-) diff --git a/hw/net/e1000_regs.h b/hw/net/e1000_regs.h index

RE: [PATCH 0/5] hw/net/igb: emulated network device with SR-IOV

2022-12-29 Thread Sriram Yagnaraman
> -Original Message- > From: Jason Wang > Sent: Friday, 23 December 2022 04:24 > To: Sriram Yagnaraman > Cc: qemu-devel@nongnu.org; Dmitry Fleytman > ; Michael S . Tsirkin ; > Marcel Apfelbaum > Subject: Re: [PATCH 0/5] hw/net/igb: emulated network device with SR-IOV > > On Thu, Dec

Re: [PATCH 4/9] hw/arm/aspeed_ast10x0: Map I3C peripheral

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:20PM +0100, Philippe Mathieu-Daudé wrote: > Since I don't have access to the datasheet, the relevant > values were found in: > https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi > > Signed-off-by: Philippe Mathieu-Daudé > --- >

Re: [PATCH 1/9] hw/watchdog/wdt_aspeed: Map the whole MMIO range

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:17PM +0100, Philippe Mathieu-Daudé wrote: > Avoid confusing two different things: > - the WDT I/O region size ('iosize') > - at which offset the SoC map the WDT ('offset') > While it is often the same, we can map smaller region sizes at > larger offsets. > > Here we

Re: [PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:18PM +0100, Philippe Mathieu-Daudé wrote: > IEC binary prefixes ease code review: the unit is explicit. Oh, yeah, another good idea. Reviewed-by: Peter Delevoryas > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/aspeed_ast10x0.c | 3 ++- >

[PATCH v4 03/11] hw/riscv/sifive_u: use 'fdt' from MachineState

2022-12-29 Thread Daniel Henrique Barboza
The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command. Remove the 'fdt' pointer from SiFiveUState and use MachineState::fdt instead. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza

[PATCH v4 10/11] hw/riscv/boot.c: introduce riscv_load_kernel_and_initrd()

2022-12-29 Thread Daniel Henrique Barboza
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing the same steps when '-kernel' is used: - execute load_kernel() - load init_rd() - write kernel_cmdline in the fdt Let's fold everything inside riscv_load_kernel() to avoid code repetition. Every other board that uses

[PATCH v2 0/6] hw/net/igb: emulated network device with SR-IOV

2022-12-29 Thread Sriram Yagnaraman
A new attempt at adding support for Intel 82576 Gigabit Ethernet adapter with SR-IOV support. Start qemu with the following parameters. qemu-system-x86_64 -enable-kvm -M q35 \ ... -device pcie-root-port,slot=3,id=pcie_port.3 \ -netdev

[PATCH v2 1/6] pcie: add helper function to get number of VFs

2022-12-29 Thread Sriram Yagnaraman
Signed-off-by: Sriram Yagnaraman --- hw/pci/pcie_sriov.c | 6 ++ include/hw/pci/pcie_sriov.h | 5 + 2 files changed, 11 insertions(+) diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 8e3faf1f59..88ba642a20 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@

Re: [PATCH 0/9] hw/arm/aspeed_ast10x0: Map more peripherals & few more fixes

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:16PM +0100, Philippe Mathieu-Daudé wrote: > Trying to fix some bugs triggered running Zephyr. Yay! > > Still 2 bugs: > > 1/ > uart:~$ sensor get SYSCLK > [00:00:23.592,000] os: * USAGE FAULT * > [00:00:23.593,000] os: Illegal use of the EPSR >

Re: [PATCH 3/9] hw/arm/aspeed_ast10x0: Add various unimplemented peripherals

2022-12-29 Thread Peter Delevoryas
:n Thu, Dec 29, 2022 at 04:23:19PM +0100, Philippe Mathieu-Daudé wrote: > Based on booting Zephyr demo from [1] running QEMU with > '-d unimp' and checking missing devices in [2]. > > [1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07 > [2] >

Re: [PATCH 5/9] hw/arm/aspeed_ast10x0: Map the secure SRAM

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:21PM +0100, Philippe Mathieu-Daudé wrote: > Some SRAM appears to be used by the Secure Boot unit and > crypto accelerators. Name it 'secure sram'. > > Note, the SRAM base address was already present but unused > (the 'SBC' index is used for the MMIO peripheral). > >

Re: [PATCH 6/9] hw/arm/aspeed_ast10x0: Map HACE peripheral

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:22PM +0100, Philippe Mathieu-Daudé wrote: > Since I don't have access to the datasheet, the relevant > values were found in: > https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi > > Before on Zephyr: > > uart:~$ crypto

Re: [PATCH 9/9] tests/avocado: Test Aspeed Zephyr SDK v00.01.08 on AST1030 board

2022-12-29 Thread Peter Delevoryas
On Thu, Dec 29, 2022 at 04:23:25PM +0100, Philippe Mathieu-Daudé wrote: > Add a very quick test that runs some commands in a Zephyr shell: > > $ tests/venv/bin/avocado --show=app,console run -t os:zephyr tests/avocado > (2/2) >

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