[PATCH v4] Emulate dip switch language layout settings on SUN keyboard

This is my fourth attempt to contribute the patch which allows the emulation of different keyboard layouts on sparc which uses a dip switch on the keyboard for those settings. After my third attempt I falsely thought that sourcehut stripped off my signed-off line, but it was me who forgot to

Re: [PATCH v7 3/3] hw/riscv: clear kernel_entry higher bits in load_elf_ram_sym()

On Sat, Jan 14, 2023 at 1:18 AM Daniel Henrique Barboza wrote: > > Recent hw/risc/boot.c changes caused a regression in an use case with > the Xvisor hypervisor. Running a 32 bit QEMU guest with '-kernel' > stopped working. The reason seems to be that Xvisor is using 64 bit to > encode the 32 bit

[PATCH v5] Emulate dip switch language layout settings on SUN keyboard

https://patchew.org/QEMU/20230114125029.7395a547.hc...@poolhem.se/ complains that "patch is empty", so here is my fifth attempt... regards Henrik SUN Type 4, 5 and 5c keyboards have dip switches to choose the language layout of the keyboard. Solaris makes an ioctl to query the value of the

Re: [PATCH] tests/vm: Update haiku test vm to R1/Beta3

January 13, 2023 7:30 AM, "Philippe Mathieu-Daudé" wrote: > On 13/1/23 12:05, Philippe Mathieu-Daudé wrote: > >> Per https://www.haiku-os.org/guides/daily-tasks/updating-system we >> can keep the box image in sync with its repo by using: >> # pkgman add

[PATCH v2] Windows installer: keep dependency cache

It should be possible to reuse cache built by previous iteration to process next executables. Processed dependencies are already skipped later based on dll name. Changes for v2: (1) changed variable name (2) changed wording in description Signed-off-by: Arthur Sengileyev Reviewed-by: Bin Meng

[PATCH v3 0/4] target/m68k: fix FPSR quotient byte for fmod and frem

This series is taken from my MacOS branch and fixes setting the FPSR quotient byte for the fmod and frem instructions which was causing the MacOS _Pack5 SANE trancendentals implementation to return incorrect values for sin() and cos(). The first 2 patches update make_quotient() to take separate

[PATCH v3 4/4] target/m68k: fix FPSR quotient byte for frem instruction

The FPSR quotient byte should be set to the value of the quotient and not the result. Manually calculate the quotient in the frem helper in round to nearest even mode (note this is different from the quotient calculated internally for fmod), and use it to set the quotient byte accordingly.

[PATCH] target/i386: Fix BZHI instruction

We did not correctly handle N >= operand size. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1374 Signed-off-by: Richard Henderson --- tests/tcg/i386/test-i386-bmi2.c | 3 +++ target/i386/tcg/emit.c.inc | 14 +++--- 2 files changed, 10 insertions(+), 7 deletions(-) diff

[PATCH v3 2/4] target/m68k: pass sign directly into make_quotient()

This enables the quotient parameter to be changed from int32_t to uint32_t and also allows the extra sign logic in make_quotient() to be removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Reviewed-by: Laurent Vivier --- target/m68k/fpu_helper.c | 23

[PATCH v3 3/4] target/m68k: fix FPSR quotient byte for fmod instruction

The FPSR quotient byte should be set to the value of the quotient and not the result. Switch from using floatx80_mod() to floatx80_modrem() which returns the quotient as a uint64_t which can be used for the quotient byte. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by:

Re: Display update issue on M1 Macs

On Sat, 14 Jan 2023, Akihiko Odaki wrote: On 2023/01/13 22:43, BALATON Zoltan wrote: On Thu, 5 Jan 2023, BALATON Zoltan wrote: Hello, I got reports from several users trying to run AmigaOS4 on sam460ex on Apple silicon Macs that they get missing graphics that I can't reproduce on x86_64.

[PATCH] target/i386: Fix C flag for BLSI, BLSMSK, BLSR

We forgot to set cc_src, which is used for computing C. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1370 Signed-off-by: Richard Henderson --- target/i386/tcg/emit.c.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc

[PATCH 1/2] tests/tcg/i386: Introduce and use reg_t consistently

Define reg_t based on the actual register width. Define the inlines using that type. This will allow input registers to 32-bit insns to be set to 64-bit values on x86-64, which allows testing various edge cases. Signed-off-by: Richard Henderson --- tests/tcg/i386/test-i386-bmi2.c | 182

[PATCH 0/2] target/i386: Fix BEXTR instruction [#1372]

Fix the instruction, and improve the test harness to better handle 32-bit insns with 64-bit inputs. r~ Richard Henderson (2): tests/tcg/i386: Introduce and use reg_t consistently target/i386: Fix BEXTR instruction tests/tcg/i386/test-i386-bmi2.c | 194 +---

[PATCH 2/2] target/i386: Fix BEXTR instruction

There were two problems here: not limiting the input to operand bits, and not correctly handling large extraction length. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1372 Signed-off-by: Richard Henderson --- tests/tcg/i386/test-i386-bmi2.c | 12

[PATCH v3 1/4] target/m68k: pass quotient directly into make_quotient()

Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 20 +++- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index fdc4937e29..0932c464fd

[PATCH 6/6] hw/arm/aspeed: Init fby35 BMC FRUID EEPROM

Signed-off-by: Peter Delevoryas --- hw/arm/aspeed.c | 49 + 1 file changed, 49 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index c929c61d582a..4ac8ff11a835 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -922,6 +922,52 @@

[PATCH 4/6] hw/arm/npcm7xx: Remove local copy of at24c_eeprom_init

Signed-off-by: Peter Delevoryas --- hw/arm/npcm7xx_boards.c | 20 +--- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index 6bc6f5d2fe29..9b31207a06e9 100644 --- a/hw/arm/npcm7xx_boards.c +++

[PATCH 2/6] hw/arm/aspeed: Remove local copy of at24c_eeprom_init

Signed-off-by: Peter Delevoryas --- hw/arm/aspeed.c | 10 +- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 55f114ef729f..1f9799d4321e 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -17,6 +17,7 @@ #include

[PATCH 0/6] hw/nvram/eeprom_at24c: Cleanup + FRUID EEPROM init example

This cleans up some of the code we have creating at24c-eeprom objects in the Aspeed and Nuvoton files, and adds an example of how to initialize a FRUID EEPROM with static data using I2C transfers. Initially I was going to propose a patch to update the at24c-eeprom realize function to incorporate

[PATCH 3/6] hw/arm/aspeed: Replace aspeed_eeprom_init with at24c_eeprom_init

Signed-off-by: Peter Delevoryas --- hw/arm/aspeed.c | 95 ++--- 1 file changed, 43 insertions(+), 52 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 1f9799d4321e..c929c61d582a 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@

[PATCH 5/6] hw/nvram/eeprom_at24c: Add I2C write helper

Signed-off-by: Peter Delevoryas --- hw/nvram/eeprom_at24c.c | 15 +++ include/hw/nvram/eeprom_at24c.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 0c27eae2b354..69565a420c28 100644 ---

[PATCH 1/6] hw/nvram/eeprom_at24c: Add header w/ init helper

Signed-off-by: Peter Delevoryas --- hw/nvram/eeprom_at24c.c | 10 ++ include/hw/nvram/eeprom_at24c.h | 10 ++ 2 files changed, 20 insertions(+) create mode 100644 include/hw/nvram/eeprom_at24c.h diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index

[PATCH v3 1/3] arm: move KVM breakpoints helpers

From: Francesco Cagnin These helpers will be also used for HVF. Aside from reformatting a couple of comments for 'checkpatch.pl' and updating meson to compile 'hyp_gdbstub.c', this is just code motion. Signed-off-by: Francesco Cagnin --- target/arm/hyp_gdbstub.c | 242

[PATCH v3 2/3] hvf: implement guest debugging on Apple Silicon hosts

From: Francesco Cagnin Support is added for single-stepping, software breakpoints, hardware breakpoints and watchpoints. The code has been structured like the KVM counterpart (and many parts are basically identical). Guests can be debugged through the gdbstub. While guest debugging is enabled,

[PATCH v3 3/3] hvf: handle singlestepping over instructions which trigger a VM exit

From: Francesco Cagnin Signed-off-by: Francesco Cagnin --- target/arm/hvf/hvf.c | 4 1 file changed, 4 insertions(+) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index c63e8da6a5..87c531508e 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1807,6 +1807,10 @@

[PATCH v3 0/3] Add gdbstub support to HVF

From: Francesco Cagnin This patch series aims to add gdbstub support to HVF (the 'QEMU accelerator on macOS that employs Hypervisor.framework') on Apple Silicon hosts. The proposed implementation, structured like the KVM counterpart, handles single-stepping, software breakpoints, hardware

Re: [PATCH 0/6] hw/nvram/eeprom_at24c: Cleanup + FRUID EEPROM init example

On Sat, Jan 14, 2023 at 09:01:45AM -0800, Peter Delevoryas wrote: > This cleans up some of the code we have creating at24c-eeprom objects in the > Aspeed and Nuvoton files, and adds an example of how to initialize a FRUID > EEPROM with static data using I2C transfers. > > Initially I was going to

[PATCH 3/7] hw/acpi/acpi_dev_interface: Resolve AcpiDeviceIfClass::madt_cpu

This class attribute was always set to pc_madt_cpu_entry(). pc_madt_cpu_entry() is architecture dependent and was assigned to the attribute even in architecture agnostic code such as in hw/acpi/piix4.c and hw/isa/lpc_ich9. Not having to set madt_cpu there resolves the assumption that these device

[PATCH 7/7] hw/isa/isa-bus: Remove now unused isa_build_aml()

Signed-off-by: Bernhard Beschow --- include/hw/isa/isa.h | 1 - hw/isa/isa-bus.c | 10 -- 2 files changed, 11 deletions(-) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 6c8a8a92cb..25acd5c34c 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -86,7

[PATCH 2/7] hw/acpi/acpi_dev_interface: Remove unused parameter from AcpiDeviceIfClass::madt_cpu

The only function ever assigned to AcpiDeviceIfClass::madt_cpu is pc_madt_cpu_entry() which doesn't use the AcpiDeviceIf parameter. Signed-off-by: Bernhard Beschow --- include/hw/acpi/acpi_dev_interface.h | 3 +-- include/hw/i386/pc.h | 6 ++ hw/acpi/acpi-x86-stub.c

[PATCH 4/7] hw/i386/acpi-build: Remove unused attributes

Ammends commit 3db119da7915 'pc: acpi: switch to AML API composed DSDT'. Signed-off-by: Bernhard Beschow --- hw/i386/acpi-build.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 0be3960a37..428328dc2d 100644 --- a/hw/i386/acpi-build.c +++

[PATCH 0/7] AML Housekeeping

This series resolves the AcpiDeviceIfClass::madt_cpu function pointer. It turns out that it isn't needed and it even frees the ACPI controllers from assigning it an x86 specific function. This is especially interesting for the PIIX4 PM which is also used in MIPS only contexts. Furthermore, the

[PATCH 6/7] hw/i386/acpi-microvm: Reuse qbus_build_aml()

Signed-off-by: Bernhard Beschow --- hw/i386/acpi-microvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c index d8a444d06c..fec22d85c1 100644 --- a/hw/i386/acpi-microvm.c +++ b/hw/i386/acpi-microvm.c @@ -26,6 +26,7 @@

[PATCH 5/7] hw/acpi/acpi_aml_interface: Extract qbus_build_aml()

Signed-off-by: Bernhard Beschow --- include/hw/acpi/acpi_aml_interface.h | 11 +++ hw/i2c/smbus_ich9.c | 5 + hw/isa/lpc_ich9.c| 5 + hw/isa/piix3.c | 5 + 4 files changed, 14 insertions(+), 12 deletions(-) diff

[PATCH 1/7] hw/acpi: Add missing includes

When removing the "hw/boards.h" include from hw/acpi/acpi_dev_interface.h, these include directives must be added to make the code compile again. Signed-off-by: Bernhard Beschow --- hw/acpi/hmat.h | 3 ++- hw/acpi/cpu.c| 2 ++ hw/acpi/hmat.c | 1 +

[PATCH] target/i386: Fix 32-bit AD[CO]X insns in 64-bit mode

Failure to truncate the inputs results in garbage for the carry-out. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1373 Signed-off-by: Richard Henderson --- tests/tcg/x86_64/adox.c | 69 target/i386/tcg/emit.c.inc | 2 +

Re: [PATCH v2 00/22] tcg: exit_tb tidy, goto_tb reorg

Ping. r~ On 1/8/23 15:42, Richard Henderson wrote: Small patch for exit_tb. Large reorg for goto_tb, primarily aimed at fixing a race condition in which a host thread gets suspended in the middle of executing a two insn sequence, and the sequence is updated. The updated second insn does not

Re: [RFC] Reducing NEED_CPU_H usage

On 1/12/23 05:28, Alessandro Di Federico wrote: fpu/softfloat.c Something I happened to notice while doing other triage: https://gitlab.com/qemu-project/qemu/-/issues/1375 This is an x86 problem that currently has no solution, but ought to be trivial with the changes to softfloat

Re: [PATCH v3 4/4] target/m68k: fix FPSR quotient byte for frem instruction

On 1/14/23 13:29, Mark Cave-Ayland wrote: The FPSR quotient byte should be set to the value of the quotient and not the result. Manually calculate the quotient in the frem helper in round to nearest even mode (note this is different from the quotient calculated internally for fmod), and use it

Re: [PATCH] linux-user: fix bug about incorrect base addresss of gdt on i386 and x86_64

On 1/3/23 01:38, fanwenjie wrote: On linux user mode, CPUX86State::gdt::base from Different CPUX86State Objects have same value, It is incorrect! Every CPUX86State::gdt::base Must points to independent memory space. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 Signed-off-by:

Re: [PATCH v4] tcg/arm: Use register pair allocation for qemu_{ld,st}_i64

Ping. r~ On 1/6/23 15:06, Richard Henderson wrote: Although we still can't use ldrd and strd for all operations, increase the chances by getting the register allocation correct. Signed-off-by: Richard Henderson --- v3 was patch 5 in a larger patch set: