[PATCH v4 15/57] accel/tcg: Use have_atomic16 in ldst_atomicity.c.inc

2023-05-03 Thread Richard Henderson
Hosts using Intel and AMD AVX cpus are quite common. Add fast paths through ldst_atomicity using this. Only enable with CONFIG_INT128; some older clang versions do not support __int128_t, and the inline assembly won't work on structures. Signed-off-by: Richard Henderson ---

[PATCH v4 01/54] tcg/i386: Rationalize args to tcg_out_qemu_{ld,st}

2023-05-03 Thread Richard Henderson
Interpret the variable argument placement in the caller. Pass data_type instead of is64 -- there are several places where we already convert back from bool to type. Clean things up by using type throughout. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson ---

[PATCH v4 23/54] tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}

2023-05-03 Thread Richard Henderson
Interpret the variable argument placement in the caller. Pass data_type instead of is64 -- there are several places where we already convert back from bool to type. Clean things up by using type throughout. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza

[PATCH v4 04/54] tcg/i386: Drop r0+r1 local variables from tcg_out_tlb_load

2023-05-03 Thread Richard Henderson
Use TCG_REG_L[01] constants directly. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc

[PATCH v4 43/54] tcg/s390x: Convert tcg_out_qemu_{ld,st}_slow_path

2023-05-03 Thread Richard Henderson
Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 35 ++- 1 file changed, 10 insertions(+), 25 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc

[PATCH v4 44/54] tcg/loongarch64: Simplify constraints on qemu_ld/st

2023-05-03 Thread Richard Henderson
The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 --

[PATCH v4 35/54] tcg/i386: Convert tcg_out_qemu_ld_slow_path

2023-05-03 Thread Richard Henderson
Use tcg_out_ld_helper_args and tcg_out_ld_helper_ret. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 71 +++ 1 file changed, 28 insertions(+), 43 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index

[PATCH v4 49/54] tcg/ppc: Adjust constraints on qemu_ld/st

2023-05-03 Thread Richard Henderson
The softmmu tlb uses TCG_REG_{TMP1,TMP2,R0}, not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target-con-set.h |

[PATCH v4 13/54] tcg/arm: Introduce prepare_host_addr

2023-05-03 Thread Richard Henderson
Merge tcg_out_tlb_load, add_qemu_ldst_label, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 351

[PATCH v4 54/54] tcg/s390x: Simplify constraints on qemu_ld/st

2023-05-03 Thread Richard Henderson
Adjust the softmmu tlb to use R0+R1, not any of the normally available registers. Since we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 2 -- tcg/s390x/tcg-target-con-str.h | 1 -

[PATCH v4 33/54] tcg: Widen helper_*_st[bw]_mmu val arguments

2023-05-03 Thread Richard Henderson
While the old type was correct in the ideal sense, some ABIs require the argument to be zero-extended. Using uint32_t for all such values is a decent compromise. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg-ldst.h | 10 +++--- accel/tcg/cputlb.c

[PATCH v4 28/54] tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return

2023-05-03 Thread Richard Henderson
In tcg_canonicalize_memop, we remove MO_SIGN from MO_32 operations with TCG_TYPE_I32. Thus this is never set. We already have an identical test just above which does not include is_64 Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.c.inc | 2 +-

[PATCH v4 08/54] tcg/aarch64: Rationalize args to tcg_out_qemu_{ld, st}

2023-05-03 Thread Richard Henderson
Rename the 'ext' parameter 'data_type' to make the use clearer; pass it to tcg_out_qemu_st as well to even out the interfaces. Rename the 'otype' local 'addr_type' to make the use clearer. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc |

[PATCH v4 12/54] tcg/arm: Introduce HostAddress

2023-05-03 Thread Richard Henderson
Collect the parts of the host address, and condition, into a struct. Merge tcg_out_qemu_*_{index,direct} and use it. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 248 ++- 1 file changed, 115 insertions(+), 133 deletions(-) diff --git

[PATCH v4 39/54] tcg/loongarch64: Convert tcg_out_qemu_{ld, st}_slow_path

2023-05-03 Thread Richard Henderson
Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 37 ++-- 1 file changed, 11 insertions(+), 26 deletions(-) diff --git a/tcg/loongarch64/tcg-target.c.inc

[PATCH v4 37/54] tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path

2023-05-03 Thread Richard Henderson
Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 40 +++- 1 file changed, 16 insertions(+), 24 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc

[PATCH v4 36/54] tcg/i386: Convert tcg_out_qemu_st_slow_path

2023-05-03 Thread Richard Henderson
Use tcg_out_st_helper_args. This eliminates the use of a tail call to the store helper. This may or may not be an improvement, depending on the call/return branch prediction of the host microarchitecture. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 57

[PATCH v4 15/54] tcg/loongarch64: Introduce HostAddress

2023-05-03 Thread Richard Henderson
Collect the 2 parts of the host address into a struct. Reorg tcg_out_qemu_{ld,st}_direct to use it. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 55 +--- 1 file changed, 30 insertions(+), 25 deletions(-)

[PATCH v4 30/54] tcg: Move TCGLabelQemuLdst to tcg.c

2023-05-03 Thread Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg.c | 13 + tcg/tcg-ldst.c.inc | 14 -- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index cfd3262a4a..6f5daaee5f 100644 --- a/tcg/tcg.c +++

[PATCH v4 10/54] tcg/aarch64: Introduce prepare_host_addr

2023-05-03 Thread Richard Henderson
Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 313

[PATCH v4 06/54] tcg/i386: Introduce prepare_host_addr

2023-05-03 Thread Richard Henderson
Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 344

[PATCH v4 20/54] tcg/ppc: Introduce HostAddress

2023-05-03 Thread Richard Henderson
Collect the parts of the host address into a struct. Reorg tcg_out_qemu_{ld,st} to use it. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 90 +--- 1 file changed, 47 insertions(+), 43 deletions(-) diff

[PATCH v4 27/54] tcg/s390x: Introduce prepare_host_addr

2023-05-03 Thread Richard Henderson
Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, tcg_prepare_user_ldst, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson ---

[PATCH v4 16/54] tcg/loongarch64: Introduce prepare_host_addr

2023-05-03 Thread Richard Henderson
Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, tcg_out_zext_addr_if_32_bit, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson ---

[PATCH v4 14/54] tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld, st}

2023-05-03 Thread Richard Henderson
Interpret the variable argument placement in the caller. Shift some code around slightly to share more between softmmu and user-only. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 100 +-- 1 file

[PATCH v4 02/54] tcg/i386: Generalize multi-part load overlap test

2023-05-03 Thread Richard Henderson
Test for both base and index; use datahi as a temporary, overwritten by the final load. Always perform the loads in ascending order, so that any (user-only) fault sees the correct address. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 31 +++ 1

Re: [PATCH 1/3] target/openrisc: Allow fpcsr access in user mode

2023-05-03 Thread Stafford Horne
On Tue, May 02, 2023 at 07:57:29PM +0100, Stafford Horne wrote: > As per OpenRISC spec 1.4 FPCSR can be read and written in user mode. > > Update mtspr and mfspr helpers to support this by moving the is_user > check into the helper. > > There is a logic change here to no longer throw an illegal

Re: [PULL v2 00/12] tcg patch queue

2023-05-03 Thread Richard Henderson
On 5/2/23 21:18, Richard Henderson wrote: The following changes since commit c586691e676214eb7edf6a468e84e7ce3b314d43: Merge tag 'pull-target-arm-20230502-2' ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-05-02 16:38:29 +0100) are available in the Git repository at:

Re: [PATCH RFC v2 9/9] target/loongarch: Add loongarch kvm into meson build

2023-05-03 Thread Richard Henderson
On 4/27/23 08:26, Tianrui Zhao wrote: Add kvm.c and kvm-stub.c into meson.build to compile it when kvm is configed. Meanwhile in meson.build, we set the kvm_targets to loongarch64-softmmu when the cpu is loongarch. Signed-off-by: Tianrui Zhao --- meson.build | 2 ++

Re: [PATCH RFC v2 7/9] target/loongarch: Implement kvm_arch_handle_exit

2023-05-03 Thread Richard Henderson
On 4/27/23 08:26, Tianrui Zhao wrote: Implement kvm_arch_handle_exit for loongarch. In this function, the KVM_EXIT_LOONGARCH_IOCSR is handled, we read or write the iocsr address space by the addr, length and is_write argument in kvm_run. Signed-off-by: Tianrui Zhao --- target/loongarch/kvm.c

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