[PATCH 3/4] hw/pci/pci: Simplify pci_bar_address() using MACHINE_GET_CLASS() macro

Remove unnecessary intermediate variables. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/pci.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 1cc7c89036..a2cb6071cb 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1444,9 +1444,7 @@

[PATCH 1/4] hw/core/cpu: Simplify realize() using MACHINE_GET_CLASS() macro

Signed-off-by: Philippe Mathieu-Daudé --- hw/core/cpu-common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 5ccc3837b6..620312e9a5 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -196,8 +196,7 @@ static

[PATCH 0/4] hw: Minor simplifications using proper QOM getter macros

Enforce QOM style. Besides, using the proper QOM macros slightly simplifies the code. Philippe Mathieu-Daudé (4): hw/core/cpu: Simplify realize() using MACHINE_GET_CLASS() macro hw/i386/microvm: Simplify using object_dynamic_cast() hw/pci/pci: Simplify pci_bar_address() using

[PATCH 4/4] hw/usb/hcd-ehci-pci: Simplify using DEVICE_GET_CLASS() macro

Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/hcd-ehci-pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c index 4c37c8e227..345444a573 100644 --- a/hw/usb/hcd-ehci-pci.c +++ b/hw/usb/hcd-ehci-pci.c @@ -74,7 +74,7 @@ static

Re: [PATCH 7/8] python/qemu: allow avocado to set logging name space

On Thu, May 18, 2023 at 04:15:03PM -0400, John Snow wrote: > On Thu, May 18, 2023 at 12:20 PM Alex Bennée wrote: > > > > Since the update to the latest version Avocado only automatically > > collects logging under the avocado name space. Tweak the QEMUMachine > > class to allow avocado to bring

[PULL 08/50] net/net_rx_pkt: Use iovec for net_rx_pkt_set_protocols()

From: Akihiko Odaki igb does not properly ensure the buffer passed to net_rx_pkt_set_protocols() is contiguous for the entire L2/L3/L4 header. Allow it to pass scattered data to net_rx_pkt_set_protocols(). Fixes: 3a977deebe ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki

[PULL 28/50] igb: Clear EICR bits for delayed MSI-X interrupts

From: Akihiko Odaki Section 7.3.4.1 says: > When auto-clear is enabled for an interrupt cause, the EICR bit is > set when a cause event mapped to this vector occurs. When the EITR > Counter reaches zero, the MSI-X message is sent on PCIe. Then the > EICR bit is cleared and enabled to be set by a

[PULL 05/50] igb: Fix Rx packet type encoding

From: Akihiko Odaki igb's advanced descriptor uses a packet type encoding different from one used in e1000e's extended descriptor. Fix the logic to encode Rx packet type accordingly. Fixes: 3a977deebe ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki Reviewed-by: Sriram

Re: [PATCH] bitops.h: Compile out asserts without --enable-debug

Richard Henderson writes: > On 5/22/23 15:26, BALATON Zoltan wrote: >> On Mon, 22 May 2023, Alex Bennée wrote: >>> (ajb: add Richard for his compiler-fu) >>> BALATON Zoltan writes: On Mon, 22 May 2023, Alex Bennée wrote: > BALATON Zoltan writes: > >> The low level extract

Re: [PATCH 0/3] hw: Fix abuse of QOM class internals modified by their instances

(posted too quickly) On 23/5/23 08:44, Philippe Mathieu-Daudé wrote: Bernhard warned for QOM class abuse here [*]: A realize method is supposed to modify a single instance only while we're modifying the behavior of whole classes here, i.e. will affect every instance of these classes. This

[PULL 06/50] igb: Do not require CTRL.VME for tx VLAN tagging

From: Akihiko Odaki While the datasheet of e1000e says it checks CTRL.VME for tx VLAN tagging, igb's datasheet has no such statements. It also says for "CTRL.VLE": > This register only affects the VLAN Strip in Rx it does not have any > influence in the Tx path in the 82576. (Appendix A. Changes

[PULL 12/50] tests/avocado: Remove unused imports

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- tests/avocado/netdev-ethtool.py | 1 - 1 file changed, 1 deletion(-) diff --git a/tests/avocado/netdev-ethtool.py b/tests/avocado/netdev-ethtool.py index f7e9464..8de118e 100644 ---

[PULL 14/50] hw/net/net_tx_pkt: Remove net_rx_pkt_get_l4_info

From: Akihiko Odaki This function is not used. Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- hw/net/net_rx_pkt.c | 5 - hw/net/net_rx_pkt.h | 9 - 2 files changed, 14 deletions(-) diff --git a/hw/net/net_rx_pkt.c b/hw/net/net_rx_pkt.c index 63be6e0..6125a06 100644

[PULL 07/50] igb: Clear IMS bits when committing ICR access

From: Akihiko Odaki The datasheet says contradicting statements regarding ICR accesses so it is not reliable to determine the behavior of ICR accesses. However, e1000e does clear IMS bits when reading ICR accesses and Linux also expects ICR accesses will clear IMS bits according to:

[PULL 02/50] hw/net/net_tx_pkt: Decouple implementation from PCI

From: Akihiko Odaki This is intended to be followed by another change for the interface. It also fixes the leak of memory mapping when the specified memory is partially mapped. Fixes: e263cd49c7 ("Packet abstraction for VMWARE network devices") Signed-off-by: Akihiko Odaki Signed-off-by: Jason

[PULL 13/50] tests/avocado: Remove test_igb_nomsi_kvm

From: Akihiko Odaki It is unlikely to find more bugs with KVM so remove test_igb_nomsi_kvm to save time to run it. Signed-off-by: Akihiko Odaki Reviewed-by: Thomas Huth Acked-by: Alex Bennée Signed-off-by: Jason Wang --- tests/avocado/netdev-ethtool.py | 12 +--- 1 file changed, 1

[PULL 09/50] e1000e: Always copy ethernet header

From: Akihiko Odaki e1000e_receive_internal() used to check the iov length to determine copy the iovs to a contiguous buffer, but the check is flawed in two ways: - It does not ensure that iovcnt > 0. - It does not take virtio-net header into consideration. The size of this copy is just 18

[PATCH v2] meson: move -no-pie from linker to compiler

The large comment in the patch says it all; the -no-pie flag is broken and this is why it was not included in QEMU_LDFLAGS before commit a988b4c5614 ("build: move remaining compiler flag tests to meson", 2023-05-18). And some distros made things even worse, so we have to add it to the compiler

[PULL 47/50] vmxnet3: Do not depend on PC

From: Akihiko Odaki vmxnet3 has no dependency on PC, and VMware Fusion actually makes it available on Apple Silicon according to: https://kb.vmware.com/s/article/90364 Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jason Wang --- hw/net/Kconfig | 2 +- 1

[PULL 43/50] igb: Implement Tx timestamp

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb_core.c | 7 +++ hw/net/igb_regs.h | 3 +++ 2 files changed, 10 insertions(+) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 43d23c7..49d1917 100644 ---

[PULL 27/50] igb: Fix igb_mac_reg_init coding style alignment

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jason Wang --- hw/net/igb_core.c | 96 +++ 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/hw/net/igb_core.c

[PULL 33/50] hw/net/net_rx_pkt: Enforce alignment for eth_header

From: Akihiko Odaki eth_strip_vlan and eth_strip_vlan_ex refers to ehdr_buf as struct eth_header. Enforce alignment for the structure. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/net_rx_pkt.c | 11 +++ 1 file changed, 7

[PULL 26/50] igb: Share common VF constants

From: Akihiko Odaki The constants need to be consistent between the PF and VF. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb.c| 10 +- hw/net/igb_common.h | 8

[PULL 46/50] igb: Clear-on-read ICR when ICR.INTA is set

From: Akihiko Odaki For GPIE.NSICR, Section 7.3.2.1.2 says: > ICR bits are cleared on register read. If GPIE.NSICR = 0b, then the > clear on read occurs only if no bit is set in the IMS or at least one > bit is set in the IMS and there is a true interrupt as reflected in > ICR.INTA. e1000e does

[PULL 38/50] igb: Implement Tx SCTP CSO

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb_core.c | 12 +++- hw/net/net_tx_pkt.c | 18 ++ hw/net/net_tx_pkt.h | 8 3 files changed, 33 insertions(+), 5 deletions(-) diff --git

Re: [PATCH] meson: remove -no-pie linker flag

22.05.2023 18:54, Richard Henderson wrote: .. -no-pie is a linker flag, but distro folk that didn't quite know what they were doing made local changes to gcc's specs file.  So it *is* a compiler command-line flag, but only for some builds of gcc. Which distros is that? Debian? Patching gcc

[PATCH] hw/ppc/openpic: Do not open-code ROUND_UP() macro

While reviewing, the ROUND_UP() macro is easier to figure out. Besides, the comment confirms we want to round up here. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ppc/openpic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/ppc/openpic.h

[PATCH 2/4] hw/i386/microvm: Simplify using object_dynamic_cast()

Use object_dynamic_cast() to determine if 'dev' is a TYPE_VIRTIO_MMIO. Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/microvm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index 3d606a20b4..7227a2156c 100644 ---

Re: [PATCH v3] target: ppc: Use MSR_HVB bit to get the target endianness for memory dump

On 5/22/23 23:50, Greg Kurz wrote: On Mon, 22 May 2023 12:02:42 -0400 Narayana Murty N wrote: Currently on PPC64 qemu always dumps the guest memory in Big Endian (BE) format even though the guest running in Little Endian (LE) mode. So crash tool fails to load the dump as illustrated below:

Re: [PATCH] meson: remove -no-pie linker flag

On Mon, May 22, 2023 at 4:39 PM Richard Henderson wrote: > > + # What about linker flags? For a static build, no PIE is implied by > > -static > > + # which we added above. > > Is it though? That was the major problem at the time: it wasn't. It's what configure was doing: if test "$static"

[PULL 04/50] e1000x: Fix BPRC and MPRC

From: Akihiko Odaki Before this change, e1000 and the common code updated BPRC and MPRC depending on the matched filter, but e1000e and igb decided to update those counters by deriving the packet type independently. This inconsistency caused a multicast packet to be counted twice. Updating BPRC

[PULL 21/50] igb: Remove goto

From: Akihiko Odaki The goto is a bit confusing as it changes the control flow only if L4 protocol is not recognized. It is also different from e1000e, and noisy when comparing e1000e and igb. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang ---

[PULL 50/50] rtl8139: fix large_send_mss divide-by-zero

From: Stefan Hajnoczi If the driver sets large_send_mss to 0 then a divide-by-zero occurs. Even if the division wasn't a problem, the for loop that emits MSS-sized packets would never terminate. Solve these issues by skipping offloading when large_send_mss=0. This issue was found by OSS-Fuzz

[PULL 25/50] igb: Add more definitions for Tx descriptor

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb_core.c | 4 ++-- hw/net/igb_regs.h | 32 +++- 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/hw/net/igb_core.c

[PULL 17/50] e1000x: Take CRC into consideration for size check

From: Akihiko Odaki Section 13.7.15 Receive Length Error Count says: > Packets over 1522 bytes are oversized if LongPacketEnable is 0b > (RCTL.LPE). If LongPacketEnable (LPE) is 1b, then an incoming packet > is considered oversized if it exceeds 16384 bytes. > These lengths are based on bytes

[PULL 35/50] igb: Implement MSI-X single vector mode

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb_core.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index c954369..6d55b43 100644 ---

[PULL 32/50] net/eth: Always add VLAN tag

From: Akihiko Odaki It is possible to have another VLAN tag even if the packet is already tagged. Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- hw/net/net_tx_pkt.c | 16 +++- include/net/eth.h | 4 ++-- net/eth.c | 22 ++ 3 files

[PATCH 3/3] hw/i2c/pmbus_device: Fix modifying QOM class internals from instance

QOM object instance should not modify its class state (because all other objects instanciated from this class get affected). Instead of modifying the PMBusDeviceClass 'device_num_pages' field the first time a instance is initialized (in pmbus_pages_alloc), introduce a new pmbus_pages_num() helper

[PATCH 0/3] hw: Fix abuse of QOM class internals modified by their instances

Bernhard warned for QOM class abuse here [*]: > A realize method is supposed to modify a single instance only > while we're modifying the behavior of whole classes here, i.e. > will affect every instance of these classes. This goes against > QOM design principles and will therefore be confusing

[PATCH 2/3] hw/ppc/e500plat: Fix modifying QOM class internal state from instance

QOM object instance should not modify its class state (because all other objects instanciated from this class get affected). Instead of modifying the PPCE500MachineClass 'mpic_version' field in the instance machine_init() handler, set it in the machine class init handler

[PATCH 1/3] hw/mips/jazz: Fix modifying QOM class internal state from instance

QOM object instance should not modify its class state (because all other objects instanciated from this class get affected). Instead of modifying the MIPSCPUClass 'no_data_aborts' field in the instance machine_init() handler, set it in the machine class_init handler. Since 2 machines require

[PULL 16/50] e1000x: Share more Rx filtering logic

From: Akihiko Odaki This saves some code and enables tracepoint for e1000's VLAN filtering. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/e1000.c | 35 +-- hw/net/e1000e_core.c | 47

[PULL 39/50] igb: Strip the second VLAN tag for extended VLAN

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- hw/net/e1000e_core.c | 3 ++- hw/net/igb_core.c| 14 -- hw/net/net_rx_pkt.c | 15 ++- hw/net/net_rx_pkt.h | 19 ++- include/net/eth.h| 4 ++-- net/eth.c

[PULL 03/50] hw/net/net_tx_pkt: Decouple interface from PCI

From: Akihiko Odaki This allows to use the network packet abstractions even if PCI is not used. Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- hw/net/e1000e_core.c | 13 - hw/net/igb_core.c| 13 ++--- hw/net/net_tx_pkt.c | 36

[PULL 31/50] net/eth: Use void pointers

From: Akihiko Odaki The uses of uint8_t pointers were misleading as they are never accessed as an array of octets and it even require more strict alignment to access as struct eth_header. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jason Wang ---

[PULL 37/50] igb: Implement Rx SCTP CSO

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/e1000e_core.c | 5 hw/net/igb_core.c | 15 +++- hw/net/igb_regs.h | 1 + hw/net/net_rx_pkt.c | 64 ++-

[PULL 30/50] igb: Rename a variable in igb_receive_internal()

From: Akihiko Odaki Rename variable "n" to "causes", which properly represents the content of the variable. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb_core.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff

[PULL 10/50] igb: Always copy ethernet header

From: Akihiko Odaki igb_receive_internal() used to check the iov length to determine copy the iovs to a contiguous buffer, but the check is flawed in two ways: - It does not ensure that iovcnt > 0. - It does not take virtio-net header into consideration. The size of this copy is just 22 octets,

[PULL 48/50] MAINTAINERS: Add a reviewer for network packet abstractions

From: Akihiko Odaki I have made significant changes for network packet abstractions so add me as a reviewer. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jason Wang --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS

[PULL 29/50] e1000e: Rename a variable in e1000e_receive_internal()

From: Akihiko Odaki Rename variable "n" to "causes", which properly represents the content of the variable. Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- hw/net/e1000e_core.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git

[PULL 41/50] igb: Implement igb-specific oversize check

From: Akihiko Odaki igb has a configurable size limit for LPE, and uses different limits depending on whether the packet is treated as a VLAN packet. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- hw/net/igb_core.c | 36

[PULL 34/50] tests/qtest/libqos/igb: Set GPIE.Multiple_MSIX

From: Akihiko Odaki GPIE.Multiple_MSIX is not set by default, and needs to be set to get interrupts from multiple MSI-X vectors. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman Signed-off-by: Jason Wang --- tests/qtest/libqos/igb.c | 1 + 1 file changed, 1 insertion(+) diff

[PULL 22/50] igb: Read DCMD.VLE of the first Tx descriptor

From: Akihiko Odaki Section 7.2.2.3 Advanced Transmit Data Descriptor says: > For frames that spans multiple descriptors, all fields apart from > DCMD.EOP, DCMD.RS, DCMD.DEXT, DTALEN, Address and DTYP are valid only > in the first descriptors and are ignored in the subsequent ones.

[PULL 19/50] e1000e: Always log status after building rx metadata

From: Akihiko Odaki Without this change, the status flags may not be traced e.g. if checksum offloading is disabled. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jason Wang --- hw/net/e1000e_core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)

[PULL 49/50] docs/system/devices/igb: Note igb is tested for DPDK

From: Akihiko Odaki Signed-off-by: Akihiko Odaki Signed-off-by: Jason Wang --- docs/system/devices/igb.rst | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/docs/system/devices/igb.rst b/docs/system/devices/igb.rst index 07d95dd..04e79df 100644 ---

The madness of ad hoc special IDs (was: [PATCH] machine: do not crash if default RAM backend name has been stollen)

Igor Mammedov writes: > QEMU aborts when default RAM backend should be used (i.e. no > explicit '-machine memory-backend=' specified) but user > has created an object which 'id' equals to default RAM backend > name used by board. > > $QEMU -machine pc \ >-object

Re: [PATCH] ui/cursor: incomplete check for integer overflow in cursor_alloc

On Tue, May 23, 2023 at 10:16 AM Daniel P. Berrangé wrote: > > On Mon, May 08, 2023 at 04:18:13PM +0200, Mauro Matteo Cascella wrote: > > The cursor_alloc function still accepts a signed integer for both the cursor > > width and height. A specially crafted negative width/height could make > >

[PATCH v4 06/10] trace: remove code that depends on setting vcpu

Now we no longer have any events that are for vcpus we can start excising the code from the trace control. As the vcpu parameter is encoded as part of QMP we just stub out the has_vcpu/vcpu parameters rather than alter the API. Message-Id: <20230420150009.1675181-7-alex.ben...@linaro.org>

[PATCH v4 08/10] tcg: remove the final vestiges of dstate

Now we no longer have dynamic state affecting things we can remove the additional fields in cpu.h and simplify the TB hash calculation. For the benchmark: hyperfine -w 2 -m 20 \ "./arm-softmmu/qemu-system-arm -cpu cortex-a15 \ -machine type=virt,highmem=off \ -display

[PATCH v4 04/10] scripts/qapi: document the tool that generated the file

This makes it a little easier for developers to find where things where being generated. Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20230505155336.137393-5-alex.ben...@linaro.org> --- v4 - expand out os.path.basename(sys.argv[0]) --- scripts/qapi/gen.py | 8

[PATCH v4 07/10] trace: remove control-vcpu.h

Now we no longer have vcpu controlled trace events we can excise the code that allows us to query its status. Message-Id: <20230420150009.1675181-8-alex.ben...@linaro.org> Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi Reviewed-by: Richard Henderson Message-Id:

[PATCH v4 09/10] hw/9pfs: use qemu_xxhash4

No need to pass zeros as we have helpers that do that for us. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Christian Schoenebeck Reviewed-by: Stefan Hajnoczi Reviewed-by: Richard Henderson Message-Id: <20230503091756.1453057-10-alex.ben...@linaro.org> Signed-off-by: Alex Bennée

[PATCH v4 00/10] tracing: remove dynamic vcpu state

Hi Stefan, The references dynamic vcpu tracing support was removed when the original TCG trace points where removed. However there was still a legacy of dynamic trace state to track this in cpu.h and extra hash variables to track TBs. While the removed vcpu tracepoints are not in generated code

Re: Help finding Coverity defects for generated Hexagon code

On 5/23/23 12:29, Paolo Bonzini wrote: On Tue, May 23, 2023 at 11:18 AM Peter Maydell wrote: On Mon, 22 May 2023 at 21:24, Anton Johansson wrote: Hi, coverity recently reported some defects in code generated by idef-parser (email attached). These defects are expected and we plan to emit a

Re: [PATCH 08/12] hw/char/pl011: Extract pl011_write_tx() from pl011_write()

Philippe Mathieu-Daudé writes: > When implementing FIFO, this code will become more complex. > Start by factoring it out to a new pl011_write_tx() function. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 07/12] hw/char/pl011: Split RX/TX path of pl011_reset_fifo()

Philippe Mathieu-Daudé writes: > To be able to reset the RX or TX FIFO separately, > split pl011_reset_fifo() in two. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 09/12] hw/char/pl011: Check if transmitter is enabled

Philippe Mathieu-Daudé writes: > Do not transmit characters when UART or transmitter are disabled. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

[PATCH v2 02/27] util: Add cpuinfo-i386.c

Add cpuinfo.h for i386 and x86_64, and the initialization for that in util/. Populate that with a slightly altered copy of the tcg host probing code. Other uses of cpuid.h will be adjusted one patch at a time. Reviewed-by: Juan Quintela Signed-off-by: Richard Henderson ---

[PATCH v2 06/27] migration/xbzrle: Shuffle function order

Place the CONFIG_AVX512BW_OPT block at the top, which will aid function selection in the next patch. Reviewed-by: Juan Quintela Signed-off-by: Richard Henderson --- migration/xbzrle.c | 244 ++--- 1 file changed, 122 insertions(+), 122 deletions(-) diff

[PATCH v2 21/27] accel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128

These symbols will shortly become dynamic runtime tests and therefore not appropriate for the preprocessor. Use the matching CONFIG_* symbols for that purpose. Signed-off-by: Richard Henderson --- host/include/aarch64/host/atomic128-cas.h | 2 ++ host/include/generic/host/atomic128-ldst.h | 2

[PATCH v2 15/27] target/s390x: Use tcg_gen_qemu_{ld, st}_i128 for LPQ, STPQ

No need to roll our own, as this is now provided by tcg. This was the last use of retxl, so remove that too. Signed-off-by: Richard Henderson --- Cc: qemu-s3...@nongnu.org Cc: David Hildenbrand Cc: Ilya Leoshkevich --- target/s390x/cpu.h | 3 -- target/s390x/helper.h

[PATCH v2 24/27] tcg: Split out tcg/debug-assert.h

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/debug-assert.h | 17 + include/tcg/tcg.h | 9 + MAINTAINERS| 1 + 3 files changed, 19 insertions(+), 8 deletions(-) create mode 100644

Re: [PATCH] fsl-imx6: Add SNVS support for i.MX6 boards

On Mon, 15 May 2023 at 10:50, Vitaly Cheptsov wrote: > > SNVS is supported on both i.MX6 and i.MX6UL and is needed > to support shutdown on the board. > > Cc: Peter Maydell (odd fixer:SABRELITE / i.MX6) > Cc: Jean-Christophe Dubois (reviewer:SABRELITE / i.MX6) > Cc: qemu-...@nongnu.org (open

[PATCH v2 09/27] util: Add cpuinfo-aarch64.c

Move the code from tcg/. The only use of these bits so far is with respect to the atomicity of tcg operations. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- host/include/aarch64/host/cpuinfo.h | 22 ++ tcg/aarch64/tcg-target.h| 6 ++-

Re: [PATCH v2] hw/arm/sbsa-ref: add GIC node into DT

On Wed, 17 May 2023 at 11:53, Marcin Juszkiewicz wrote: > > Let add GIC information into DeviceTree as part of SBSA-REF versioning. > > Trusted Firmware will read it and provide to next firmware level. > > Bumps platform version to 0.1 one so we can check is node is present. > > Signed-off-by:

[PATCH v2 20/27] accel/tcg: Remove prot argument to atomic_mmu_lookup

Now that load/store are gone, we're always passing PAGE_READ | PAGE_WRITE for RMW atomic operations. Signed-off-by: Richard Henderson --- accel/tcg/atomic_template.h | 32 ++ accel/tcg/cputlb.c | 85 ++--- accel/tcg/user-exec.c | 8

[PATCH v2 16/27] accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu

With the current structure of cputlb.c, there is no difference between the little-endian and big-endian entry points, aside from the assert. Unify the pairs of functions. The only use of the functions with explicit endianness was in target/sparc64, and that was only to satisfy the assert: the

[PATCH v2 25/27] qemu/atomic128: Improve cmpxchg fallback for atomic16_set

Use __sync_bool_compare_and_swap_16 to control the loop, rather than a separate comparison. Signed-off-by: Richard Henderson --- host/include/generic/host/atomic128-ldst.h | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/host/include/generic/host/atomic128-ldst.h

[PATCH v2 10/27] include/host: Split out atomic128-cas.h

Separates the aarch64-specific portion into its own file. Signed-off-by: Richard Henderson --- host/include/aarch64/host/atomic128-cas.h | 43 ++ host/include/generic/host/atomic128-cas.h | 43 ++ include/qemu/atomic128.h | 55

[PATCH v2 05/27] util/bufferiszero: Use i386 host/cpuinfo.h

Use cpuinfo_init() during init_accel(), and the variable cpuinfo during test_buffer_is_zero_next_accel(). Adjust the logic that cycles through the set of accelerators for testing. Signed-off-by: Richard Henderson --- util/bufferiszero.c | 126 1

[PATCH v2 19/27] accel/tcg: Remove cpu_atomic_{ld,st}o_*_mmu

Atomic load/store of 128-byte quantities is now handled by cpu_{ld,st}16_mmu. Signed-off-by: Richard Henderson --- accel/tcg/atomic_template.h | 61 +++ include/exec/cpu_ldst.h | 9 -- accel/tcg/atomic_common.c.inc | 14 3 files changed, 4

[PATCH v2 21/52] tcg: Pass TCGHelperInfo to tcg_gen_callN

In preparation for compiling tcg/ only once, eliminate the all_helpers array. Instantiate the info structs for the generic helpers in accel/tcg/, and the structs for the target-specific helpers in each translate.c. Since we don't see all of the info structs at startup, initialize at first use,

[PATCH v2 12/52] tcg: Split out tcg-target-reg-bits.h

Often, the only thing we need to know about the TCG host is the register size. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 12 +--- tcg/aarch64/tcg-target-reg-bits.h | 12 tcg/arm/tcg-target-reg-bits.h | 12

[PATCH v2 40/52] target/arm: Tidy helpers for translation

Move most includes from *translate*.c to translate.h, ensuring that we get the ordering correct. Ensure cpu.h is first. Use disas/disas.h instead of exec/log.h. Drop otherwise unused includes. Signed-off-by: Richard Henderson --- target/arm/tcg/translate.h| 3 +++

[PATCH v2 34/52] tcg: Remove USE_TCG_OPTIMIZATIONS

This is always defined, and the optimization pass is essential to producing reasonable code. Signed-off-by: Richard Henderson --- tcg/tcg.c | 5 - 1 file changed, 5 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index f7e61e736f..7d0449f6a9 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -22,9

[PATCH v2 29/52] tcg: Split tcg/tcg-op-gvec.h

Create tcg/tcg-op-gvec-common.h, moving everything that does not concern TARGET_LONG_BITS. Adjust tcg-op-gvec.c to use the new header. Signed-off-by: Richard Henderson --- include/tcg/tcg-op-gvec-common.h | 426 + include/tcg/tcg-op-gvec.h| 444

[PATCH v2 5/7] target/riscv: Use true diff for gen_pc_plus_diff

Reduce reliance on absolute values by using true pc difference for gen_pc_plus_diff() to prepare for PC-relative translation. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/insn_trans/trans_rvi.c.inc | 6 ++ target/riscv/insn_trans/trans_rvzce.c.inc | 2 +-

[PATCH v2 10/52] *: Add missing includes of tcg/debug-assert.h

This had been pulled in from tcg/tcg.h, via exec/cpu_ldst.h, via exec/exec-all.h, but the include of tcg.h will be removed. Signed-off-by: Richard Henderson --- target/avr/cpu.c | 1 + target/rx/cpu.c | 1 + target/rx/op_helper.c | 1 + target/tricore/cpu.c | 1 + 4 files changed, 4

Re: [RFC PATCH] softfloat: use QEMU_FLATTEN to avoid mistaken isra inlining

On Tue, 23 May 2023, Alex Bennée wrote: Balton discovered that asserts for the extract/deposit calls had a Missing an a in my name and my given name is Zoltan. (First name and last name is in the other way in Hungarian.) Maybe just add a Reported-by instead of here if you want to record it.

[PATCH v2 52/52] tcg: Build once for system and once for user-only

Create two static libraries for use by each execution mode. Signed-off-by: Richard Henderson --- tcg/meson.build | 30 +++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/tcg/meson.build b/tcg/meson.build index bdc185a485..565c60bc96 100644 ---

[PATCH v2 35/52] tcg: Spit out exec/translation-block.h

This is all that is required by tcg/ from exec-all.h. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 135 +-- include/exec/translation-block.h | 152 +++ tcg/tcg-op-ldst.c| 2 +- 3 files changed, 154

[PATCH v2 23/52] tcg: Split tcg_gen_callN

Make tcg_gen_callN a static function. Create tcg_gen_call[0-7] functions for use by helper-gen.h.inc. Removes a multiplicty of calls to __stack_chk_fail, saving up to 143kiB of .text space as measured on an x86_64 host. Old New Less%Change 680 8741816 146864 1.65%

[PATCH v2 47/52] tcg: Move env defines out of NEED_CPU_H in helper-head.h

Since the change to CPUArchState, we have a common typedef that can always be used. Signed-off-by: Richard Henderson --- include/exec/helper-head.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index

[PATCH v2 50/52] plugins: Drop unused headers from exec/plugin-gen.h

Two headers are not required for the rest of the contents of plugin-gen.h. Signed-off-by: Richard Henderson --- include/exec/plugin-gen.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/exec/plugin-gen.h b/include/exec/plugin-gen.h index e9a976f815..52828781bc 100644 ---

[PATCH v2 48/52] tcg: Remove target-specific headers from tcg.[ch]

This finally paves the way for tcg/ to be built once per mode. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 1 - accel/tcg/plugin-gen.c | 1 + tcg/region.c | 2 +- tcg/tcg-op.c | 2 +- tcg/tcg.c | 2 +- 5 files changed, 4 insertions(+), 4

[PATCH v2 32/52] exec-all: Widen TranslationBlock pc and cs_base to 64-bits

This makes TranslationBlock agnostic to the address size of the guest. Use vaddr for pc, since that's always a virtual address. Use uint64_t for cs_base, since usage varies between guests. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 4 ++-- accel/tcg/cpu-exec.c| 2 +- 2

[PATCH v2 49/52] plugins: Move plugin_insn_append to translator.c

This function is only used in translator.c, and uses a target-specific typedef, abi_ptr. Signed-off-by: Richard Henderson --- include/exec/plugin-gen.h | 22 -- accel/tcg/translator.c| 21 + 2 files changed, 21 insertions(+), 22 deletions(-) diff

Re: [PATCH 1/1] hw/ide/core.c: fix handling of unsupported commands

On Mon, May 22, 2023 at 5:16 PM Mateusz Albecki wrote: > > Certainly seems like my patch is wrong as it will make the abort path execute ide_cmd_done twice. During debug I came to the conclusion that ide_cmd_done is not called at all as I was getting timeouts on the driver side while waiting for

Re: [PATCH 2/2] hw/intc: riscv_imsic: Refresh the CSRs xml after updating the state of the cpu.

On 2023/5/23 19:44, Tommy Wu wrote: Originally, when we set the ext_smaia to true, we still cannot print the AIA CSRs in the remote gdb debugger, because the dynamic CSR xml is generated when the cpu is realized. This patch refreshes the dynamic CSR xml after we update the ext_smaia, so that

Re: [PATCH v2 4/5] Add CI variable RUNNER_TAG

On Mon, May 22, 2023 at 06:41:53PM +0100, Camilla Conte wrote: > This allows to set a job tag dinamically. typo - s/dinamically/dynamically/ can be fixed when a maintainer queues this, no need to repost just for this typo. > We need this to be able to select the Kubernetes runner. > See

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