On 6/6/23 16:46, Loïc Lefort wrote:
On Tue, Jun 6, 2023 at 1:39 PM Himanshu Chauhan
wrote:
Smepmp is a ratified extension which qemu refers to as epmp.
Rename epmp to smepmp and add it to extension list so that
it is added to the isa string.
Signed-off-by: Himanshu Chauhan
---
On 6/6/23 07:31, Paolo Bonzini wrote:
+if ! test -f "$source_path/subprojects/keycodemapdb/README" \
+&& test -f "$download" = disabled
test -f x = y
is some sort of paste-o. Remove the -f, I'm sure.
r~
Hi Steve,
In the current design you have, we have to specify both the command line
parameter "-migrate-mode-enable cpr-reboot"
*and* issue the monitor command "migrate_set_parameter mode cpr-${mode}".
Is it possible to opt-in to the CPR mode just once over the monitor
instead of having to
Broken during my build tcg once series.
I thought we already had a test for this, but no, so add one.
r~
Richard Henderson (2):
target/arm: Only include tcg/oversized-guest.h if CONFIG_TCG
gitlab: Add cross-arm64-kvm-only
target/arm/ptw.c | 5 +++--
We are not currently running a --disable-tcg test for arm64,
like we are for mips, ppc and s390x. We have a job for the
native aarch64 runner, but it is not run by default and it
is not helpful for normal developer testing without access
to qemu's private runner.
Use --without-default-features
Fixes the build for --disable-tcg.
This header is only needed for cross-hosting. Without CONFIG_TCG,
we know this is an AArch64 host, CONFIG_ATOMIC64 will be set, and
the TCG_OVERSIZED_GUEST block will never be compiled.
Signed-off-by: Richard Henderson
---
target/arm/ptw.c | 5 +++--
1 file
In order to support large number of vcpus, a newer 64-bit SMBIOS
entry point type is needed. Therefore, upgrade the default SMBIOS version
for PC machines to SMBIOS 3.0 for newer systems. Then increase the maximum
number of vCPUs for Q35 models to 1024, which is the limit for KVM.
Changes from
Into a helper function pc_machine_init_smbios() in preparation for
subsequent code to upgrade default SMBIOS entry point type.
Then, call the helper function from the pc_machine_initfn() to eliminate
duplicate code in pc_q35.c and pc_pixx.c. However, this changes the
ordering of when the
Since KVM_MAX_VCPUS is currently defined to 1024 for x86 as shown in
arch/x86/include/asm/kvm_host.h, update QEMU limits to the same number.
In case KVM could not support the specified number of vcpus, QEMU would
return the following error message:
qemu-system-x86_64: kvm_init_vcpu:
On Mon, Jun 5, 2023 at 12:00 PM Paolo Bonzini wrote:
>
> This reverts commits eea2d141179 ("Makefile: remove $(TESTS_PYTHON)",
> 2023-05-26) and 9c6692db550 ("tests: Use configure-provided pyvenv for
> tests", 2023-05-18).
>
> Right now, there is a conflict between wanting a ">=" constraint when
/qemu into
staging (2023-06-05 13:16:56 -0700)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20230606
for you to fetch changes up to f9ac778898cb28307e0f91421aba34d43c34b679:
target/arm: trap DCC access in user mode
The current sbsa-ref cannot use EHCI controller which is only
able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
Hence, this uses system bus XHCI to provide a usb controller with
64-bit DMA capablity instead of EHCI.
Signed-off-by: Yuquan Wang
---
docs/system/arm/sbsa.rst | 2 +-
Please review the change.
- sbsa-ref: Replace EHCI with XHCI on sysbus.
This version updates relevant Kconfig and sbsa.rst file.
Yuquan Wang (1):
hw/arm/sbsa-ref: use XHCI to replace EHCI
docs/system/arm/sbsa.rst | 2 +-
hw/arm/Kconfig | 2 +-
hw/arm/sbsa-ref.c| 21
On Tue, 2023-06-06 at 11:24 -0700, Richard Henderson wrote:
> On 6/6/23 06:27, Ilya Leoshkevich wrote:
> > @@ -8518,7 +8522,11 @@ int do_guest_openat(CPUArchState *cpu_env,
> > int dirfd, const char *pathname,
> > return fd;
> > }
> >
> > - return safe_openat(dirfd,
The ppc64 tuxrun tests are currently failing if "slirp" has been
disabled in the binary since they are using "-netdev user" now.
We have to skip the test if this network backend is missing.
Fixes: 6ee3624236 ("improve code coverage for ppc64")
Signed-off-by: Thomas Huth
---
Peter Xu writes:
> On Tue, Jun 06, 2023 at 11:45:49AM -0300, Fabiano Rosas wrote:
>> The code in threadinfo.c is only used for the QMP command
>> query-migrationthreads. Make it explicit that this is something
>> related to QMP.
>>
>> The current names are also too generic for a piece of code
On Tue, Jun 6, 2023 at 4:23 AM Paolo Bonzini wrote:
>
> Let pip decide whether a new version should be installed or the current
> one is okay. This ensures that the virtual environment is updated
> (either upgraded or downgraded) whenever a new version of a package is
> requested.
>
> The
On 6/6/23 11:51, Garhwal, Vikram wrote:
Hi Richard,
I fixed the tsan-build issue but now seeing another issue with “—disable-tcg” option for
cross builds xen. Here is the build failure message:
"include/tcg/oversized-guest.h:10:10: fatal error: tcg-target-reg-bits.h: No such file or
directory
On 6/6/23 3:50 PM, Richard Henderson wrote:
On 6/6/23 11:51, Garhwal, Vikram wrote:
Hi Richard,
I fixed the tsan-build issue but now seeing another issue with
“—disable-tcg” option for cross builds xen. Here is the build failure
message:
"include/tcg/oversized-guest.h:10:10: fatal error:
Currently, pc-q35 and pc-i44fx machine models are default to use SMBIOS 2.8
(32-bit entry point). Since SMBIOS 3.0 (64-bit entry point) is now fully
supported since QEMU 7.0, default to use SMBIOS 3.0 for newer machine
models. This is necessary to avoid the following message when launching
a VM
Count exceptions which can be queried with info irq monitor command.
Signed-off-by: BALATON Zoltan
---
target/ppc/cpu.h | 1 +
target/ppc/cpu_init.c| 18 ++
target/ppc/excp_helper.c | 1 +
3 files changed, 20 insertions(+)
diff --git a/target/ppc/cpu.h
Sorry for reviving this old thread, I lost the best timing to follow up
on this while I was on vacation. I have been working on this and found
out some discrepancy, please see below.
On 4/5/23 04:37, Eugenio Perez Martin wrote:
Hi!
As mentioned in the last upstream virtio-networking meeting,
Igor,
On 6/6/2023 3:11 PM, Igor Mammedov wrote:
On Tue, 6 Jun 2023 09:35:41 +0200
Igor Mammedov wrote:
On Mon, 5 Jun 2023 16:39:05 -0500
Suravee Suthikulpanit wrote:
[...]
+/* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */
+pcmc->default_smbios_ep_type =
On Mon, Jun 5, 2023 at 12:00 PM Paolo Bonzini wrote:
>
> Bumping avocado to version 101 has two issues. First, there are problems
> where Avocado is not logging of command lines or terminal output, and not
> collecting Python logs outside the avocado namespace.
>
> Second, the recent changes to
On 6/6/23 12:24, Philippe Mathieu-Daudé wrote:
On 6/6/23 18:25, Richard Henderson wrote:
This test consistently fails on Azure cloud build hosts in
a way that suggests a timing problem in the test itself:
--- .../194.out
+++ .../194.out.bad
@@ -14,7 +14,6 @@
{"return": {}}
{"data":
On 6/6/23 21:28, Thomas Huth wrote:
The ppc64 tuxrun tests are currently failing if "slirp" has been
disabled in the binary since they are using "-netdev user" now.
We have to skip the test if this network backend is missing.
Fixes: 6ee3624236 ("improve code coverage for ppc64")
Signed-off-by:
On Tue, Jun 6, 2023 at 1:39 PM Himanshu Chauhan
wrote:
>
> Smepmp is a ratified extension which qemu refers to as epmp.
> Rename epmp to smepmp and add it to extension list so that
> it is added to the isa string.
>
> Signed-off-by: Himanshu Chauhan
> ---
> target/riscv/cpu.c | 9 +
On 6/6/23 10:19, Andrew Jones wrote:
On Tue, May 30, 2023 at 04:46:10PM -0300, Daniel Henrique Barboza wrote:
We're going to change the handling of mvendorid/marchid/mimpid by the
KVM driver. Since these are always present in all CPUs let's put the
same validation for everyone.
It doesn't
On 6/6/23 10:13, Andrew Jones wrote:
On Tue, May 30, 2023 at 04:46:09PM -0300, Daniel Henrique Barboza wrote:
The absence of a satp mode in riscv_host_cpu_init() is causing the
following error:
$ sudo ./qemu/build/qemu-system-riscv64 -machine virt,accel=kvm \
-m 2G -smp 1 -nographic
On Tue, Jun 06, 2023 at 04:34:31PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Tue, Jun 06, 2023 at 11:45:49AM -0300, Fabiano Rosas wrote:
> >> The code in threadinfo.c is only used for the QMP command
> >> query-migrationthreads. Make it explicit that this is something
> >> related
On 6/6/23 16:28, Thomas Huth wrote:
The ppc64 tuxrun tests are currently failing if "slirp" has been
disabled in the binary since they are using "-netdev user" now.
We have to skip the test if this network backend is missing.
Fixes: 6ee3624236 ("improve code coverage for ppc64")
On 6/6/23 12:29, Ilya Leoshkevich wrote:
The only concrete objection I have is the change of API, which could
be fixed with return
get_errno(openat(...)).
I believe both openat() and safe_openat() return -1 on error and set
errno, or am I missing something?
Oops, no, bad memory on my part --
Igore,
On 6/6/2023 2:45 PM, Igor Mammedov wrote:
On Mon, 5 Jun 2023 16:39:04 -0500
Suravee Suthikulpanit wrote:
In preparation for subsequent code to upgrade default SMBIOS
entry point type. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
hw/i386/pc.c | 12
On 6/6/2023 2:35 PM, Igor Mammedov wrote:
On Mon, 5 Jun 2023 16:39:05 -0500
Suravee Suthikulpanit wrote:
Currently, pc-q35 and pc-i44fx machine models are default to use SMBIOS 2.8
(32-bit entry point). Since SMBIOS 3.0 (64-bit entry point) is now fully
supported since QEMU 7.0, default to
Igor,
On 6/6/2023 2:55 PM, Igor Mammedov wrote:
On Mon, 5 Jun 2023 16:39:06 -0500
Suravee Suthikulpanit wrote:
Since KVM_MAX_VCPUS is currently defined to 1024 for x86 as shown in
arch/x86/include/asm/kvm_host.h, update QEMU limits to the same number.
In case KVM could not support the
On Mon, 5 Jun 2023 16:50:02 -0700
wrote:
> From: Ankit Agrawal
>
> The GPU memory is exposed as device BAR1 to the VM and is discovered
> by QEMU through the VFIO_DEVICE_GET_REGION_INFO ioctl. QEMU performs
> the mapping to it.
>
> The GPU memory can be added in the VM as (upto 8) separate
On Tue, May 30, 2023 at 04:46:17PM -0300, Daniel Henrique Barboza wrote:
> At this moment we're retrieving env->misa_ext during
> kvm_arch_init_cpu(), leaving env->misa_ext_mask behind.
>
> We want to set env->misa_ext_mask, and we want to set it as early as
> possible. The reason is that we're
On Tue, Jun 6, 2023 at 8:29 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 6/6/23 07:12, Philippe Mathieu-Daudé wrote:
> > Since commit 139c1837db ("meson: rename included C source files
> > to .c.inc"), QEMU standard procedure for included C files is to
> > use *.c.inc.
> >
> >
On Tue, Jun 06, 2023 at 11:45:49AM -0300, Fabiano Rosas wrote:
> The code in threadinfo.c is only used for the QMP command
> query-migrationthreads. Make it explicit that this is something
> related to QMP.
>
> The current names are also too generic for a piece of code that
> doesn't affect the
06.06.2023 16:57, Christian Schoenebeck wrote:
..
+++ b/fsdev/virtfs-proxy-helper.c
+static int open_regular(const char *pathname, int flags, mode_t mode) {
+int fd;
+struct stat stbuf;
+
+fd = open(pathname, flags, mode);
+if (fd < 0) {
+return fd;
+}
+
+/*
Adds support for various type of backing sources for private
memory (in the sense of confidential computing), similar to the
backing sources available for shared memory.
Signed-off-by: Ackerley Tng
---
.../testing/selftests/kvm/include/test_util.h | 14
First stage of hugetlb support: add initialization and cleanup
routines
Signed-off-by: Ackerley Tng
---
include/uapi/linux/kvm.h | 25
virt/kvm/guest_mem.c | 88 +---
2 files changed, 108 insertions(+), 5 deletions(-)
diff --git
First create a gmem inode, then create a gmem file using the inode,
then install the file into an fd.
Creating the file in layers separates inode concepts (struct kvm_gmem)
from file concepts and makes cleaning up in stages neater.
Signed-off-by: Ackerley Tng
---
virt/kvm/guest_mem.c | 86
Expose get_hstate_idx() so it can be used from KVM's guest_mem code
Signed-off-by: Ackerley Tng
---
fs/hugetlbfs/inode.c| 9 -
include/linux/hugetlb.h | 14 ++
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
Expose inode_resv_map() so that hugetlbfs can access its own resv_map.
Hide restore_reserve_on_error_vma(), that function is now only used
within mm/hugetlb.c.
Signed-off-by: Ackerley Tng
---
fs/hugetlbfs/inode.c| 2 +-
include/linux/hugetlb.h | 21 +++--
mm/hugetlb.c
Introduce kvm_gmem_hugetlb_get_folio(), then update
kvm_gmem_allocate() and kvm_gmem_truncate() to use hugetlb functions.
Signed-off-by: Ackerley Tng
---
virt/kvm/guest_mem.c | 215 +--
1 file changed, 188 insertions(+), 27 deletions(-)
diff --git
TODO may want to move this to hugetlb
Signed-off-by: Ackerley Tng
---
fs/hugetlbfs/inode.c| 3 +--
include/linux/hugetlb.h | 4
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
index 3dab50d3ed88..4f25df31ae80 100644
---
Zeroing of pages is generalizable to hugetlb and is not specific to
hugetlbfs.
Rename hugetlbfs_zero_partial_page => hugetlb_zero_partial_page, move
it to mm/hugetlb.c and expose it in linux/hugetlb.h.
Signed-off-by: Ackerley Tng
---
fs/hugetlbfs/inode.c| 27 ++-
Update private_mem_conversions_test for various private memory backing
source types
Signed-off-by: Ackerley Tng
---
.../kvm/x86_64/private_mem_conversions_test.c | 38 ++-
1 file changed, 28 insertions(+), 10 deletions(-)
diff --git
Hello Ankit,
On 6/6/23 01:50, ank...@nvidia.com wrote:
From: Ankit Agrawal
NVIDIA is building systems which allows the CPU to coherently access
GPU memory. This GPU device memory can be added and managed by the
kernel memory manager. The patch holds the required changes in QEMU
to expose this
On 6/5/23 15:24, Philippe Mathieu-Daudé wrote:
We use the user_ss[] array to hold the user emulation sources,
and the softmmu_ss[] array to hold the system emulation ones.
Hold the latter in the 'system_ss[]' array for parity with user
emulation.
Mechanical change doing:
$ sed -i -e
On Tue, Jun 06, 2023 at 03:34:26PM +0300, Avihai Horon wrote:
> Yes, it's specifically for qapi. It's documented here [1].
>
> Thanks.
>
> [1]
> https://lore.kernel.org/qemu-devel/20230428105429.1687850-16-arm...@redhat.com/
Thanks, I'll repost soon.
--
Peter Xu
On 6/6/23 08:49, Philippe Mathieu-Daudé wrote:
For example in translate-a64.c handle_msr_i(SVCR) calls
gen_helper_set_svcr() which is declared in helper-sme.h.
The placement in helper-sme.h was not done with consideration as to which compilation
units might need to use it, since that wasn't a
It seems to me that we are OK with random as default behavior but we should
print out the seed (and abstract it into a shared function across arches).
Happy to re-work the patch if my understanding is correct.
Jun
On Thu, May 18, 2023 at 6:09 AM Alex Bennée wrote:
>
> Peter Maydell writes:
>
On Tue, Jun 06, 2023 at 11:45:50AM -0300, Fabiano Rosas wrote:
> This doubly linked list is common for all the multifd and migration
> threads so we need to avoid concurrent access.
>
> Add a mutex to protect the data from concurrent access. This fixes a
> crash when removing two MigrationThread
On 6/6/23 07:30, Paolo Bonzini wrote:
The following changes since commit 369081c4558e7e940fa36ce59bf17b2e390f55d3:
Merge tag 'pull-tcg-20230605' ofhttps://gitlab.com/rth7680/qemu into
staging (2023-06-05 13:16:56 -0700)
are available in the Git repository at:
On 6/6/23 18:25, Richard Henderson wrote:
This test consistently fails on Azure cloud build hosts in
a way that suggests a timing problem in the test itself:
--- .../194.out
+++ .../194.out.bad
@@ -14,7 +14,6 @@
{"return": {}}
{"data": {"status": "setup"}, "event": "MIGRATION", "timestamp":
On Tue, May 30, 2023 at 04:46:11PM -0300, Daniel Henrique Barboza wrote:
> Following the same logic used with 'mvendorid' let's also restrict
> 'mimpid' for named CPUs. Generic CPUs keep setting the value freely.
>
> Note that we're getting rid of the default RISCV_CPU_MARCHID value. The
> reason
On Tue, Jun 06, 2023 at 02:35:41AM +, Duan, Zhenzhong wrote:
> >-Original Message-
> >From: Peter Xu
> >Sent: Tuesday, June 6, 2023 2:39 AM
> >To: Duan, Zhenzhong
> >Cc: qemu-devel@nongnu.org; m...@redhat.com; jasow...@redhat.com;
> >pbonz...@redhat.com; richard.hender...@linaro.org;
On 6/6/23 16:37, Richard Henderson wrote:
On 6/6/23 07:12, Philippe Mathieu-Daudé wrote:
Since commit 139c1837db ("meson: rename included C source files
to .c.inc"), QEMU standard procedure for included C files is to
use *.c.inc.
Besides, since commit 6a0057aa22 ("docs/devel: make a statement
This test consistently fails on Azure cloud build hosts in
a way that suggests a timing problem in the test itself:
--- .../194.out
+++ .../194.out.bad
@@ -14,7 +14,6 @@
{"return": {}}
{"data": {"status": "setup"}, "event": "MIGRATION", "timestamp":
{"microseconds": "USECS", "seconds":
On 6/6/23 06:27, Ilya Leoshkevich wrote:
/proc/self/smaps is an extension of /proc/self/maps: it provides the
same lines, plus additional information about each range.
GDB uses /proc/self/smaps when available, which means that
generate-core-file tries it first before falling back to
From: Shashi Mallela
Included creation of ITS as part of SBSA platform GIC
initialization.
Signed-off-by: Shashi Mallela
---
hw/arm/sbsa-ref.c | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index
In 2021 Shashi Mallela sent v8 of GIC ITS patchset [1]. At that time it
was decided to do platform versioning first.
1.
https://lore.kernel.org/qemu-devel/20210812165341.40784-8-shashi.mall...@linaro.org/
Now we are going through our list of changes for SBSA Reference Platform
and GIC ITS is
[ I forgot to really copy anyone, as usual.. trying again ]
On Tue, Jun 06, 2023 at 11:03:11AM -0400, Peter Xu wrote:
> On Tue, Jun 06, 2023 at 12:22:16PM +0100, Joao Martins wrote:
> > On 05/06/2023 17:57, Peter Xu wrote:
> > > On Tue, May 30, 2023 at 06:59:25PM +0100, Joao Martins wrote:
> > >>
On Tue, May 30, 2023 at 04:46:15PM -0300, Daniel Henrique Barboza wrote:
> After changing user validation for mvendorid/marchid/mimpid to guarantee
> that the value is validated on user input time, coupled with the work in
> fetching KVM default values for them by using a scratch CPU, we're
>
On 6/6/23 06:27, Ilya Leoshkevich wrote:
These functions will be required by the GDB stub in order to provide
the guest view of /proc to GDB.
Reviewed-by: Alex Bennée
Signed-off-by: Ilya Leoshkevich
---
linux-user/qemu.h| 3 +++
linux-user/syscall.c | 54
On Tue, 6 Jun 2023, Igor Mammedov wrote:
On Sun, 28 May 2023 15:57:50 +0200 (CEST)
BALATON Zoltan wrote:
On pegasos2 which has ACPI as part of VT8231 south bridge the board
firmware writes PM control register by accessing the second byte so
addr will be 1. This wasn't handled correctly and
On Tue, 6 Jun 2023 at 18:16, Richard Henderson
wrote:
>
> The computation is documented as unused in this case,
> but triggers an ubsan error:
>
> ../accel/tcg/ldst_atomicity.c.inc:837:33: runtime error: shift exponent -32
> is negative
> SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior
hstate and subpool being retrievable from inode via hstate_inode() and
subpool_inode() respectively is a hugetlbfs concept.
hugetlb should be agnostic of hugetlbfs and hugetlb accounting
functions should accept hstate (required) and subpool (can be NULL)
independently of inode.
inode is still a
hstate_inode() is hugetlbfs-specific, limiting
hugetlb_add_to_page_cache() to hugetlbfs.
hugetlb_filemap_add_folio() allows hstate to be specified and further
separates hugetlb from hugetlbfs.
Signed-off-by: Ackerley Tng
---
include/linux/hugetlb.h | 2 ++
mm/hugetlb.c| 13
On Tue, Jun 06, 2023 at 12:22:16PM +0100, Joao Martins wrote:
> On 05/06/2023 17:57, Peter Xu wrote:
> > On Tue, May 30, 2023 at 06:59:25PM +0100, Joao Martins wrote:
> >> Much like pci_device_iommu_address_space() fetches the IOMMU AS, add a
> >> pci_device_iommu_memory_region() which lets it
On 06/06/2023 16:05, Peter Xu wrote:
> On Tue, Jun 06, 2023 at 11:03:11AM -0400, Peter Xu wrote:
>> On Tue, Jun 06, 2023 at 12:22:16PM +0100, Joao Martins wrote:
>>> On 05/06/2023 17:57, Peter Xu wrote:
On Tue, May 30, 2023 at 06:59:25PM +0100, Joao Martins wrote:
> Much like
We need GIC ITS information in DeviceTree so TF-A can pass it to EDK2.
Bumping platform version to 0.2 as this is important hardware change.
Signed-off-by: Marcin Juszkiewicz
---
hw/arm/sbsa-ref.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/arm/sbsa-ref.c
On 6/6/23 06:27, Ilya Leoshkevich wrote:
@@ -8518,7 +8522,11 @@ int do_guest_openat(CPUArchState *cpu_env, int dirfd,
const char *pathname,
return fd;
}
-return safe_openat(dirfd, path(pathname), flags, mode);
+if (safe) {
+return safe_openat(dirfd,
Hi Richard,
I fixed the tsan-build issue but now seeing another issue with “—disable-tcg”
option for cross builds xen. Here is the build failure message:
"include/tcg/oversized-guest.h:10:10: fatal error: tcg-target-reg-bits.h: No
such file or directory
10 | #include "tcg-target-reg-bits.h”
On Tue, 6 Jun 2023 at 16:50, Philippe Mathieu-Daudé wrote:
>
> On 6/6/23 16:37, Richard Henderson wrote:
> > On 6/6/23 07:12, Philippe Mathieu-Daudé wrote:
> >> Since commit 139c1837db ("meson: rename included C source files
> >> to .c.inc"), QEMU standard procedure for included C files is to
>
Hi Christian,
On Tue, 06 Jun 2023 15:57:50 +0200
Christian Schoenebeck wrote:
> The 9p protocol does not specifically define how server shall behave when
> client tries to open a special file, however from security POV it does
> make sense for 9p server to prohibit opening any special file on
Jun Sun writes:
> It seems to me that we are OK with random as default behavior but we should
> print out the seed (and abstract it into
> a shared function across arches).
>
> Happy to re-work the patch if my understanding is correct.
Works for me. Please respin.
--
Alex Bennée
Philippe Mathieu-Daudé writes:
> Since commit 139c1837db ("meson: rename included C source files
> to .c.inc"), QEMU standard procedure for included C files is to
> use *.c.inc.
>
> Besides, since commit 6a0057aa22 ("docs/devel: make a statement
> about includes") this is documented as the
Philippe Mathieu-Daudé writes:
> Follow the convention to use the .inc extension for .c/.h files
> re-included, as docummented in Coding Style since commit 6a0057aa22:
>
> If you do use template header files they should be named with
> the ``.c.inc`` or ``.h.inc`` suffix to make it
On 06/06/2023 18.25, Richard Henderson wrote:
This test consistently fails on Azure cloud build hosts in
a way that suggests a timing problem in the test itself:
--- .../194.out
+++ .../194.out.bad
@@ -14,7 +14,6 @@
{"return": {}}
{"data": {"status": "setup"}, "event": "MIGRATION",
On Tue, May 30, 2023 at 04:46:14PM -0300, Daniel Henrique Barboza wrote:
> Allow 'marchid' and 'mimpid' to also be initialized in
> kvm_riscv_init_machine_ids().
>
> After this change, the handling of mvendorid/marchid/mimpid for the
> 'host' CPU type will be equal to what we already have for TCG
On 6/5/23 22:56, Thomas Huth wrote:
Hi Richard!
The following changes since commit 848a6caa88b9f082c89c9b41afa975761262981d:
Merge tag 'migration-20230602-pull-request' of
https://gitlab.com/juan.quintela/qemu into staging (2023-06-02 17:33:29 -0700)
are available in the Git repository
On Tue, May 30, 2023 at 04:46:13PM -0300, Daniel Henrique Barboza wrote:
> Certain validations, such as the validations done for the machine IDs
> (mvendorid/marchid/mimpid), are done before starting the CPU.
> Non-dynamic (named) CPUs tries to match user input with a preset
> default. As it is
On 6/5/23 16:02, Philippe Mathieu-Daudé wrote:
We want to check the softmmu tlb availability, not
if we are targetting system emulation. Besides, this
code could be used by user emulation in the future.
Signed-off-by: Philippe Mathieu-Daudé
---
The computation is documented as unused in this case,
but triggers an ubsan error:
../accel/tcg/ldst_atomicity.c.inc:837:33: runtime error: shift exponent -32 is
negative
SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior
../accel/tcg/ldst_atomicity.c.inc:837:33 in
Signed-off-by: Richard
On 5/23/23 03:15, Philippe Mathieu-Daudé wrote:
While reviewing, the ROUND_UP() macro is easier to figure out.
Besides, the comment confirms we want to round up here.
Signed-off-by: Philippe Mathieu-Daudé
---
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 6/6/23 20:08, Warner Losh wrote:
On Tue, Jun 6, 2023 at 8:29 AM Richard Henderson
mailto:richard.hender...@linaro.org>> wrote:
On 6/6/23 07:12, Philippe Mathieu-Daudé wrote:
> Since commit 139c1837db ("meson: rename included C source files
> to .c.inc"), QEMU standard
On Tue, May 30, 2023 at 04:46:12PM -0300, Daniel Henrique Barboza wrote:
> 'marchid' shouldn't be set to a different value as previously set for
> named CPUs.
>
> For all other CPUs it shouldn't be freely set either - the spec requires
> that 'marchid' can't have the MSB (most significant bit)
I see. I think your suggestion makes sense, i.e., groups specified in one
line means intersection of groups, while multiple --group lines mean union
of groups.
BTW, I have moved along and added many new features to risu, including
generating instructions as shared libraries (instead of raw binary
This solution is heavily based on Daniel's original approach here, but
hopefully a cleaner way to impl:
https://lore.kernel.org/r/20230601161347.1803440-11-berra...@redhat.com
The difference is we use the switchover-hold flag rather than tuning
bw+downtime to guide test convergence, comparing to
Add a new migration parameter switchover-hold which can block src qemu
migration from switching over to dest from running.
One can set this flag to true so src qemu will keep iterating the VM data,
not switching over to dest even if it can.
It means now live migration works somehow like COLO; we
This v2 patchset is based on master. Since I'm not sure how long this
series will take for review, we could probably apply Dan's previous patch
10 first, then when I repost I can provide a revert patch when needed.
v2:
- Make the flag transparent to postcopy [Avihai]
- Fix qapi/ indents to 70
Hi,
Can you please rebase on top of Alistair's riscv-to-apply.next and re-send?
Some patches can't be applied cleanly, in particular patch 2, which conflicts
with Weiwei's "target/riscv: Split RISCVCPUConfig declarations from cpu.h
into cpu_cfg.h" that landed into riscv-to-apply.next a few
This will allow preparation steps to be shared
Signed-off-by: Ackerley Tng
---
include/linux/mm.h | 1 +
mm/truncate.c | 24 ++--
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 1f79667824eb..7a8f6b810de0
vma_*_reservation functions rely on vma_resv_map(), which assumes on a
hugetlbfs concept of the resv_map being stored in a specific field of
the inode.
This refactor enables vma_*_reservation functions, now renamed
resv_map_*_reservation, to be used with non-hugetlbfs filesystems,
further
Add tests for 2MB and 1GB page sizes.
Signed-off-by: Ackerley Tng
---
.../testing/selftests/kvm/guest_memfd_test.c | 33 ++-
1 file changed, 24 insertions(+), 9 deletions(-)
diff --git a/tools/testing/selftests/kvm/guest_memfd_test.c
Parametrize remove_mapping_hugepages() and hugetlb_unreserve_pages()
by resv_map to remove the use of inode_resv_map() and decouple hugetlb
with hugetlbfs.
Signed-off-by: Ackerley Tng
---
fs/hugetlbfs/inode.c| 16 ++--
include/linux/hugetlb.h | 6 --
mm/hugetlb.c
Parametrize alloc_hugetlb_folio_from_subpool() by resv_map to remove
the use of vma_resv_map() and decouple hugetlb with hugetlbfs.
Signed-off-by: Ackerley Tng
---
include/linux/hugetlb.h | 2 +-
mm/hugetlb.c| 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
1 - 100 of 329 matches
Mail list logo
