Re: [PATCH] linux-user: Propagate failure in mmap_reserve_or_unmap back to target_munmap

On 3/10/23 23:02, Richard Henderson wrote: Do not assert success, but return any failure received. Additionally, fix the method of earlier error return in target_munmap. Reported-by: Andreas Schwab Signed-off-by: Richard Henderson --- linux-user/mmap.c | 30 +-

Re: [PATCH 07/10] tcg/mips: Use tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 231 +++--- 1 file changed, 113 insertions(+), 118 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 04/10] tcg/aarch64: Use tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 177 +-- 1 file changed, 88 insertions(+), 89 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v8 0/5] Support x2APIC mode with TCG accelerator

On Tue, Sep 26, 2023 at 11:23:53PM +0700, Bui Quang Minh wrote: > On 9/26/23 23:06, Bui Quang Minh wrote: > > > Version 8 changes, > > - Patch 2, 4: > >+ Rebase to master and resolve conflicts in these 2 patches > > The conflicts when rebasing is due to the commit 9926cf34de5fa15da >

Re: [PATCH v4 7/8] vdpa: Introduce cursors to vhost_vdpa_net_loadx()

On Tue, Aug 29, 2023 at 7:55 AM Hawkins Jiawei wrote: > > This patch introduces two new arugments, `out_cursor` > and `in_cursor`, to vhost_vdpa_net_loadx(). Addtionally, > it includes a helper function > vhost_vdpa_net_load_cursor_reset() for resetting these > cursors. > > Furthermore, this

[PATCH] hw/virtio/virtio-pci: Avoid compiler warning with -Wshadow

"len" is used as parameter of the function virtio_write_config() and as a local variable, so this causes a compiler warning when compiling with "-Wshadow" and can be confusing for the reader. Rename the local variable to "caplen" to avoid this problem. Signed-off-by: Thomas Huth ---

[Stable-8.1.2 20/45] target/arm: Don't skip MTE checks for LDRT/STRT at EL0

From: Peter Maydell The LDRT/STRT "unprivileged load/store" instructions behave like normal ones if executed at EL0. We handle this correctly for the load/store semantics, but get the MTE checking wrong. We always look at s->mte_active[is_unpriv] to see whether we should be doing MTE checks,

[Stable-8.1.2 40/45] accel/tcg: Always require can_do_io

From: Richard Henderson Require i/o as the last insn of a TranslationBlock always, not only with icount. This is required for i/o that alters the address space, such as a pci config space write. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1866 Reviewed-by: Philippe Mathieu-Daudé

[Stable-8.1.2 18/45] include/exec: Widen tlb_hit/tlb_hit_page()

From: Anton Johansson tlb_addr is changed from target_ulong to uint64_t to match the type of a CPUTLBEntry value, and the addressed is changed to vaddr. Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Message-Id: <20230807155706.9580-8-a...@rev.ng> Signed-off-by: Richard

[Stable-8.1.2 26/45] migration: Fix race that dest preempt thread close too early

From: Peter Xu We hit intermit CI issue on failing at migration-test over the unit test preempt/plain: qemu-system-x86_64: Unable to read from socket: Connection reset by peer Memory content inconsistency at 5b43000 first_byte = bd last_byte = bc current = 4f hit_edge = 1 **

[Stable-8.1.2 14/45] file-posix: Check bs->bl.zoned for zone info

From: Hanna Czenczek Instead of checking bs->wps or bs->bl.zone_size for whether zone information is present, check bs->bl.zoned. That is the flag that raw_refresh_zoned_limits() reliably sets to indicate zone support. If it is set to something other than BLK_Z_NONE, other values and objects

[Stable-8.1.2 31/45] migration: Consolidate return path closing code

From: Fabiano Rosas We'll start calling the await_return_path_close_on_source() function from other parts of the code, so move all of the related checks and tracepoints into it. Reviewed-by: Peter Xu Signed-off-by: Fabiano Rosas Signed-off-by: Stefan Hajnoczi Message-ID:

[Stable-8.1.2 38/45] accel/tcg: Improve setting of can_do_io at start of TB

From: Richard Henderson Initialize can_do_io to true if this the TB has CF_LAST_IO and will consist of a single instruction. This avoids a set to 0 followed immediately by a set to 1. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson (cherry picked from commit

[Stable-8.1.2 11/45] hw/cxl: Fix CFMW config memory leak

From: Li Zhijian Allocate targets and targets[n] resources when all sanity checks are passed to avoid memory leaks. Cc: qemu-sta...@nongnu.org Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Li Zhijian Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jonathan Cameron Reviewed-by: Fan

[Stable-8.1.2 43/45] esp: use correct type for esp_dma_enable() in sysbus_esp_gpio_demux()

From: Mark Cave-Ayland The call to esp_dma_enable() was being made with the SYSBUS_ESP type instead of the ESP type. This meant that when GPIO 1 was being used to trigger a DMA request from an external DMA controller, the setting of ESPState's dma_enabled field would clobber unknown memory

[Stable-8.1.2 25/45] ui/vnc: fix handling of VNC_FEATURE_XVP

From: Paolo Bonzini VNC_FEATURE_XVP was not shifted left before adding it to vs->features, so it was never enabled; but it was also checked the wrong way with a logical AND instead of vnc_has_feature. Fix both places. Signed-off-by: Paolo Bonzini (cherry picked from commit

[Stable-8.1.2 19/45] hw/arm/boot: Set SCR_EL3.FGTEn when booting kernel

From: Fabian Vogt Just like d7ef5e16a17c sets SCR_EL3.HXEn for FEAT_HCX, this commit handles SCR_EL3.FGTEn for FEAT_FGT: When we direct boot a kernel on a CPU which emulates EL3, we need to set up the EL3 system registers as the Linux kernel documentation specifies:

Re: [PATCH] hw/virtio/virtio-pci: Avoid compiler warning with -Wshadow

On Wed, Oct 04, 2023 at 09:55:36AM +0200, Thomas Huth wrote: > "len" is used as parameter of the function virtio_write_config() > and as a local variable, so this causes a compiler warning > when compiling with "-Wshadow" and can be confusing for the reader. > Rename the local variable to "caplen"

[PATCH v4 02/20] q800: add djMEMC memory controller

The djMEMC controller is used to store information related to the physical memory configuration. Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 + hw/m68k/Kconfig | 1 + hw/m68k/q800.c

[PATCH v4 00/20] q800: add support for booting MacOS Classic - part 2

This series contains the remaining patches needed to allow QEMU's q800 machine to boot MacOS Classic when used in conjunction with a real Quadra 800 ROM image. In fact with this series applied it is possible to boot all of the following OSs: - MacOS 7.1 - 8.1, with or without virtual memory

[PATCH v4 01/20] q800-glue.c: convert to Resettable interface

Convert the GLUE device to 3-phase reset. The legacy method doesn't do anything that's invalid in the hold phase, so the conversion is simple and not a behaviour change. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/m68k/q800-glue.c | 7

[PULL 60/63] util/uuid: add a hash function

From: Albert Esteve Add hash function to uuid module using the djb2 hash algorithm. Add a couple simple unit tests for the hash function, checking collisions for similar UUIDs. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Albert Esteve Message-Id:

Re: [PATCH v2 1/3] i386/a-b-bootblock: factor test memory addresses out into constants

Daniil Tatianin wrote: > So that we have less magic numbers to deal with. This also allows us to > reuse these in the following commits. > > Signed-off-by: Daniil Tatianin > Reviewed-by: Peter Xu Reviewed-by: Juan Quintela queued.

Re: [PULL 00/63] virtio,pci: features, cleanups

On 4/10/23 10:43, Michael S. Tsirkin wrote: virtio,pci: features, cleanups vdpa: shadow vq vlan support net migration with cvq cxl: dummy ACPI QTG DSM support emulating 4 HDM decoders serial number

Re: [Stable-8.1.2 00/45] Patch Round-up for stable 8.1.2, freeze on 2023-10-14

Wed, 4 Oct 2023 11:44:53 +0300 Michael Tokarev : > Second, this is not even the production code, it is testing code. I need to double check if there is indeed a way to omit this code. A quick search indicates that disabling TCG may be required. > And the most important, third: even with the

[PULL 38/63] hw/acpi/acpi_dev_interface: Remove now unused #include "hw/boards.h"

From: Bernhard Beschow The "hw/boards.h" is unused since the previous commit. Since its removal requires include fixes in various unrelated files to keep the code compiling it has been split in a dedicated commit. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PULL 15/63] vdpa: use first queue SVQ state for CVQ default

From: Eugenio Pérez Previous to this patch the only way CVQ would be shadowed is if it does support to isolate CVQ group or if all vqs were shadowed from the beginning. The second condition was checked at the beginning, and no more configuration was done. After this series we need to check if

Re: [PATCH] hw/isa/vt82c686: Respect SCI interrupt assignment

Hi Bernhard, On 3/10/23 23:44, Bernhard Beschow wrote: According to the datasheet, SCI interrupts of the power management function aren't triggered through the PCI pins but rather directly to the integrated PIC. The routing is configurable through the ACPI interrupt select register at offset 42

Re: [PATCH 08/10] tcg/ppc: Use tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 284 --- 1 file changed, 143 insertions(+), 141 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index

Re: [PATCH 02/10] tcg: Provide guest_base fallback for system mode

On 3/10/23 19:43, Richard Henderson wrote: Provide a define to allow !tcg_use_softmmu code paths to compile in system mode, but require elimination. Signed-off-by: Richard Henderson --- tcg/tcg.c | 4 1 file changed, 4 insertions(+) Reviewed-by: Philippe Mathieu-Daudé

Re: [RFC] Proposal of QEMU PCI Endpoint test environment

> > hi shunsuke, all, > what about vfio-user + qemu? > FWIW, I have had some good success using VFIO-user to bridge software components to hardware designs. For the most part, I have been hooking up software endpoint models to hardware design components speaking the PCIe transaction layer

[Stable-8.1.2 03/45] hw/ppc: Round up the decrementer interval when converting to ns

From: Nicholas Piggin The rule of timers is typically that they should never expire before the timeout, but some time afterward. Rounding timer intervals up when doing conversion is the right thing to do. Under most circumstances it is impossible observe the decrementer interrupt before the dec

[Stable-8.1.2 06/45] hw/ppc: Always store the decrementer value

From: Nicholas Piggin When writing a value to the decrementer that raises an exception, the irq is raised, but the value is not stored so the store doesn't appear to have changed the register when it is read again. Always store the write value to the register. Fixes: e81a982aa53 ("PPC: Clean

[Stable-8.1.2 12/45] hw/cxl: Fix out of bound array access

From: Dmitry Frolov According to cxl_interleave_ways_enc(), fw->num_targets is allowed to be up to 16. This also corresponds to CXL r3.0 spec. So, the fw->target_hbs[] array is iterated from 0 to 15. But it is statically declared of length 8. Thus, out of bound array access may occur. Fixes:

[Stable-8.1.2 05/45] target/ppc: Sign-extend large decrementer to 64-bits

From: Nicholas Piggin When storing a large decrementer value with the most significant implemented bit set, it is to be treated as a negative and sign extended. This isn't hit for book3s DEC because of another bug, fixing it in the next patch exposes this one and can cause additional problems,

[Stable-8.1.2 02/45] host-utils: Add muldiv64_round_up

From: Nicholas Piggin This will be used for converting time intervals in different base units to host units, for the purpose of scheduling timers to emulate target timers. Timers typically must not fire before their requested expiry time but may fire some time afterward, so rounding up is the

[Stable-8.1.2 13/45] file-posix: Clear bs->bl.zoned on error

From: Hanna Czenczek bs->bl.zoned is what indicates whether the zone information is present and valid; it is the only thing that raw_refresh_zoned_limits() sets if CONFIG_BLKZONED is not defined, and it is also the only thing that it sets if CONFIG_BLKZONED is defined, but there are no zones.

[Stable-8.1.2 10/45] linux-user/hppa: lock both words of function descriptor

From: Mikulas Patocka The code in setup_rt_frame reads two words at haddr, but locks only one. This patch fixes it to lock both. Signed-off-by: Mikulas Patocka Acked-by: Helge Deller Cc: qemu-sta...@nongnu.org Signed-off-by: Helge Deller (cherry picked from commit

[Stable-8.1.2 04/45] hw/ppc: Avoid decrementer rounding errors

From: Nicholas Piggin The decrementer register contains a relative time in timebase units. When writing to DECR this is converted and stored as an absolute value in nanosecond units, reading DECR converts back to relative timebase. The tb<->ns conversion of the relative part can cause rounding

[Stable-8.1.2 15/45] file-posix: Fix zone update in I/O error path

From: Hanna Czenczek We must check that zone information is present before running update_zones_wp(). Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2234374 Fixes: Coverity CID 1512459 Signed-off-by: Hanna Czenczek Message-Id: <20230824155345.109765-4-hre...@redhat.com> Reviewed-by: Sam Li

[Stable-8.1.2 09/45] linux-user/hppa: clear the PSW 'N' bit when delivering signals

From: Mikulas Patocka qemu-hppa may crash when delivering a signal. It can be demonstrated with this program. Compile the program with "hppa-linux-gnu-gcc -O2 signal.c" and run it with "qemu-hppa -one-insn-per-tb a.out". It reports that the address of the flag is 0xb4 and it crashes when

Re: [PATCH v15 6/9] gfxstream + rutabaga: add initial support for gfxstream

Hi Gurchetan A few minor comments, after that I'd ack & merge the series. Fwiw, rutabaga is now in Fedora rawhide (https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=2238751) gfxstream is up for review (https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=2242058) On Wed, Oct 4, 2023 at 2:09 

Re: [Stable-8.1.2 00/45] Patch Round-up for stable 8.1.2, freeze on 2023-10-14

Wed, 4 Oct 2023 11:01:21 +0300 Michael Tokarev : > Please respond here or CC qemu-sta...@nongnu.org on any additional patches > you think should (or shouldn't) be included in the release. How about this change for 8.1.x? This will allow usage in openSUSE Tumbleweed. c01196bddd

[PATCH v4 05/20] q800: add IOSB subsystem

It is needed because it defines the BIOSConfig area. Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland Reviewed-by: BALATON Zoltan --- MAINTAINERS| 2 + hw/m68k/Kconfig| 1 + hw/m68k/q800.c | 9 +++ hw/misc/Kconfig| 3 + hw/misc/iosb.c

[PATCH v4 11/20] swim: add trace events for IWM and ISM registers

Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/block/swim.c | 14 ++ hw/block/trace-events | 7 +++ 2 files changed, 21 insertions(+) diff --git a/hw/block/swim.c b/hw/block/swim.c index 333da08ce0..7df36ea139 100644 --- a/hw/block/swim.c +++

[PATCH v4 06/20] q800: allow accesses to RAM area even if less memory is available

MacOS attempts a series of writes and reads over the entire RAM area in order to determine the amount of RAM within the machine. Allow accesses to the entire RAM area ignoring writes and always reading zero for areas where there is no physical RAM installed to allow MacOS to detect the memory size

[PATCH] audio/ossaudio: Fix compiler warning with -Wshadow

The "err" variable is only used twice in this code, in a very local fashion of first assigning it and then checking it in the next line. So there is no need to declare this variable a second time in the innermost block, we can re-use the variable that is declared at the beginning of the function.

[PATCH v4 08/20] asc: generate silence if FIFO empty but engine still running

MacOS (un)helpfully leaves the FIFO engine running even when all the samples have been written to the hardware, and expects the FIFO status flags and IRQ to be updated continuously. There is an additional problem in that not all audio backends guarantee an all-zero output when there is no FIFO

[PATCH v4 03/20] q800: add machine id register

MacOS reads this address to identify the hardware. This is a basic implementation returning the ID of Quadra 800. Details: http://mess.redump.net/mess/driver_info/mac_technical_notes "There are 3 ID schemes [...] The third and most scalable is a machine ID register at 0x5ffc. The top

Re: [PATCH v3] hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical

On 3/10/23 23:16, Bernhard Beschow wrote: Commit 6103451aeb74 ("hw/i386: Build-time assertion on pc/q35 reset register being identical.") introduced a build-time check where the addresses of the reset registers are expected to be equal. Back then the code to generate AML for the reset register

Re: [PATCH v4 8/8] vdpa: Send cvq state load commands in parallel

On Tue, Aug 29, 2023 at 7:55 AM Hawkins Jiawei wrote: > > This patch enables sending CVQ state load commands > in parallel at device startup by following steps: > > * Refactor vhost_vdpa_net_load_cmd() to iterate through > the control commands shadow buffers. This allows different > CVQ state

[Stable-8.1.2 08/45] hw/ppc: Read time only once to perform decrementer write

From: Nicholas Piggin Reading the time more than once to perform an operation always increases complexity and fragility due to introduced deltas. Simplify the decrementer write by reading the clock once for the operation. Signed-off-by: Nicholas Piggin Signed-off-by: Cédric Le Goater (cherry

[Stable-8.1.2 01/45] hw/ppc: Introduce functions for conversion between timebase and nanoseconds

From: Nicholas Piggin These calculations are repeated several times, and they will become a little more complicated with subsequent changes. Signed-off-by: Nicholas Piggin Signed-off-by: Cédric Le Goater (cherry picked from commit 7798f5c576d898e7e10c4a2518f3f16411dedeb9) Signed-off-by:

[Stable-8.1.2 00/45] Patch Round-up for stable 8.1.2, freeze on 2023-10-14

The following patches are queued for QEMU stable v8.1.2: https://gitlab.com/qemu-project/qemu/-/commits/staging-8.1 Patch freeze is 2023-10-14, and the release is planned for 2023-10-16: https://wiki.qemu.org/Planning/8.1 Please respond here or CC qemu-sta...@nongnu.org on any additional

[Stable-8.1.2 22/45] accel/tcg: mttcg remove false-negative halted assertion

From: Nicholas Piggin mttcg asserts that an execution ending with EXCP_HALTED must have cpu->halted. However between the event or instruction that sets cpu->halted and requests exit and the assertion here, an asynchronous event could clear cpu->halted. This leads to crashes running AIX on

[Stable-8.1.2 27/45] migration: Fix possible race when setting rp_state.error

From: Fabiano Rosas We don't need to set the rp_state.error right after a shutdown because qemu_file_shutdown() always sets the QEMUFile error, so the return path thread would have seen it and set the rp error itself. Setting the error outside of the thread is also racy because the thread could

[Stable-8.1.2 34/45] softmmu: Use async_run_on_cpu in tcg_commit

From: Richard Henderson After system startup, run the update to memory_dispatch and the tlb_flush on the cpu. This eliminates a race, wherein a running cpu sees the memory_dispatch change but has not yet seen the tlb_flush. Since the update now happens on the cpu, we need not use

[Stable-8.1.2 21/45] meson.build: Make keyutils independent from keyring

From: Thomas Huth Commit 0db0fbb5cf ("Add conditional dependency for libkeyutils") tried to provide a possibility for the user to disable keyutils if not required by makeing it depend on the keyring feature. This looked reasonable at a first glance (the unit test in tests/unit/ needs both), but

[Stable-8.1.2 45/45] scsi-disk: ensure that FORMAT UNIT commands are terminated

From: Mark Cave-Ayland Otherwise when a FORMAT UNIT command is issued, the SCSI layer can become confused because it can find itself in the situation where it thinks there is still data to be transferred which can cause the next emulated SCSI command to fail. Signed-off-by: Mark Cave-Ayland

[Stable-8.1.2 24/45] ui/vnc: fix debug output for invalid audio message

From: Paolo Bonzini The debug message was cut and pasted from the invalid audio format case, but the audio message is at bytes 2-3. Reviewed-by: Daniel P. Berrangé Signed-off-by: Paolo Bonzini (cherry picked from commit 0cb9c5880e6b8dedc4e20026ce859dd1ea9aac84) Signed-off-by: Michael Tokarev

[Stable-8.1.2 35/45] accel/tcg: Avoid load of icount_decr if unused

From: Richard Henderson With CF_NOIRQ and without !CF_USE_ICOUNT, the load isn't used. Avoid emitting it. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson (cherry picked from commit f47a90dacca8f74210a2675bdde7ab3856872b94) Signed-off-by: Michael Tokarev diff --git

[PATCH v4 14/20] mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK

The MacOS toolbox ROM calculates the number of branches that can be executed per millisecond as part of its timer calibration. Since modern hosts are considerably quicker than original hardware, the negative counter reaches zero before the calibration completes leading to division by zero later in

[PATCH v4 12/20] swim: split into separate IWM and ISM register blocks

The swim chip provides an implementation of both Apple's IWM and ISM floppy disk controllers. Split the existing implementation into separate register banks for each controller, whilst also switching the IWM registers from 16-bit to 8-bit as implemented in real hardware. Signed-off-by: Mark

[PATCH v4 15/20] mac_via: workaround NetBSD ADB bus enumeration issue

NetBSD assumes it can send its first ADB command after sending the ADB_BUSRESET command in ADB_STATE_NEW without changing the state back to ADB_STATE_IDLE first as detailed in the ADB protocol. Add a workaround to detect this condition at the start of ADB enumeration and send the next command

[PATCH v4 10/20] q800: add easc bool machine class property to switch between ASC and EASC

This determines whether the Apple Sound Chip (ASC) is set to enhanced mode (default) or to original mode. The real Q800 hardware used an EASC chip however a lot of older software only works with the older ASC chip. Adding this as a machine parameter allows QEMU to be used as an developer aid for

[PATCH v4 20/20] mac_via: extend timer calibration hack to work with A/UX

The A/UX timer calibration loop runs continuously until 2 consecutive iterations differ by at least 0x492 timer ticks. Modern hosts execute the timer calibration loop so fast that this situation never occurs causing a hang on boot. Use a similar method to Shoebill which is to randomly add 0x500

[PATCH v4 18/20] q800: add ESCC alias at 0xc000

Tests on real Q800 hardware show that the ESCC is addressable at multiple locations within the ESCC memory region - at least 0xc000, 0xc020 (as expected by the MacOS toolbox ROM) and 0xc040. All released NetBSD kernels before 10 use the 0xc000 address which causes a fatal error when running

[PULL 20/63] vhost: Add count argument to vhost_svq_poll()

From: Hawkins Jiawei Next patches in this series will no longer perform an immediate poll and check of the device's used buffers for each CVQ state load command. Instead, they will send CVQ state load commands in parallel by polling multiple pending buffers at once. To achieve this, this patch

[PULL 37/63] hw/acpi/acpi_dev_interface: Remove now unused madt_cpu virtual method

From: Bernhard Beschow This virtual method was always set to the x86-specific pc_madt_cpu_entry(), even in piix4 which is also used in MIPS. The previous changes use pc_madt_cpu_entry() otherwise, so madt_cpu can be dropped. Since pc_madt_cpu_entry() is now only used in x86-specific code, the

[PULL 45/63] hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c

From: Jonathan Cameron There is no strong justification for keeping these in the header so push them down into the associated cxl-component-utils.c file. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Fan Ni Signed-off-by: Jonathan Cameron Message-Id:

[PULL 57/63] virtio: use shadow_avail_idx while checking number of heads

From: Ilya Maximets We do not need the most up to date number of heads, we only want to know if there is at least one. Use shadow variable as long as it is not equal to the last available index checked. This avoids expensive qatomic dereference of the RCU-protected memory region cache as well

[PATCH v11 02/10] migration: convert migration 'uri' into 'MigrateAddress'

This patch parses 'migrate' and 'migrate-incoming' QAPI's 'uri' string containing migration connection related information and stores them inside well defined 'MigrateAddress' struct. Suggested-by: Aravind Retnakaran Signed-off-by: Het Gala Reviewed-by: Daniel P. Berrangé --- migration/exec.c

Re: [PATCH] target/riscv/tcg: remove RVG warning

On Tue, Oct 03, 2023 at 09:25:39AM -0300, Daniel Henrique Barboza wrote: > Vendor CPUs that set RVG are displaying user warnings about other > extensions that RVG must enable, one warning per CPU. E.g.: > > $ ./build/qemu-system-riscv64 -smp 8 -M virt -cpu veyron-v1 -nographic >

Re: [PATCH v5 2/2] migration: Update error description outside migration.c

Tejus GK wrote: > On 03/10/23 6:14 pm, Juan Quintela wrote: >> Tejus GK wrote: >>> A few code paths exist in the source code,where a migration is >>> marked as failed via MIGRATION_STATUS_FAILED, but the failure happens >>> outside of migration.c >>> >>> In such cases, an error_report()

[PATCH] target/i386: Check for USER_ONLY definition instead of SOFTMMU one

Since we *might* have user emulation with softmmu, replace the system emulation check by !user emulation one. (target/ was cleaned from invalid CONFIG_SOFTMMU uses at commit cab35c73be, but these files were merged few days after, thus missed the cleanup.) Signed-off-by: Philippe Mathieu-Daudé

[PATCH v4 07/20] audio: add Apple Sound Chip (ASC) emulation

The Apple Sound Chip was primarily used by the Macintosh II to generate sound in hardware which was previously handled by the toolbox ROM with software interrupts. Implement both the standard ASC and also the enhanced ASC (EASC) functionality which is used in the Quadra 800. Note that whilst

[PATCH v4 09/20] q800: add Apple Sound Chip (ASC) audio to machine

The Quadra 800 has the enhanced ASC (EASC) audio chip which supports both the legacy IRQ routing through VIA2 and also "A/UX" mode routing direct to the CPU. Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland --- hw/m68k/q800-glue.c | 11 ++- hw/m68k/q800.c

[PATCH v4 04/20] q800: implement additional machine id bits on VIA1 port A

Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/mac_via.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index f84cc68849..e87a1b82d8 100644 ---

[PATCH v4 13/20] swim: update IWM/ISM register block decoding

Update the IWM/ISM register block decoding to match the description given in the "SWIM Chip Users Reference". This allows us to validate the device response to the guest OS which currently only does just enough to indicate that the floppy drive is unavailable. Signed-off-by: Mark Cave-Ayland

[PATCH v4 17/20] mac_via: always clear ADB interrupt when switching to A/UX mode

When the NetBSD kernel initialises it can leave the ADB interrupt asserted depending upon where in the ADB poll cycle the MacOS ADB interrupt handler is when the NetBSD kernel disables interrupts. The NetBSD ADB driver uses the ADB interrupt state to determine if the ADB is busy and refuses to

[PATCH v4 16/20] mac_via: implement ADB_STATE_IDLE state if shift register in input mode

NetBSD switches directly to IDLE state without switching the shift register to input mode. Duplicate the existing ADB_STATE_IDLE logic in input mode from when the shift register is in output mode which allows the ADB autopoll handler to handle the response. Signed-off-by: Mark Cave-Ayland

[PATCH v4 19/20] q800: add alias for MacOS toolbox ROM at 0x40000000

According to the Apple Quadra 800 Developer Note document, the Quadra 800 ROM consists of 2 ROM code sections based at offsets 0x0 and 0x80. A/UX attempts to access the toolbox ROM at the lower offset during startup, so provide a memory alias to allow the access to succeed. Signed-off-by:

[PULL 54/63] hw/i386/pc: improve physical address space bound check for 32-bit x86 systems

From: Ani Sinha 32-bit x86 systems do not have a reserved memory for hole64. On those 32-bit systems without PSE36 or PAE CPU features, hotplugging memory devices are not supported by QEMU as QEMU always places hotplugged memory above 4 GiB boundary which is beyond the physical address space of

Re: [PULL 00/63] virtio,pci: features, cleanups

On Wed, Oct 04, 2023 at 04:43:13AM -0400, Michael S. Tsirkin wrote: > The following changes since commit 494a6a2cf7f775d2c20fd6df9601e30606cc2014: > > Merge tag 'pull-request-2023-09-25' of https://gitlab.com/thuth/qemu into > staging (2023-09-25 10:10:30 -0400) > > are available in the Git

[PULL 61/63] hw/display: introduce virtio-dmabuf

From: Albert Esteve This API manages objects (in this iteration, dmabuf fds) that can be shared along different virtio devices, associated to a UUID. The API allows the different devices to add, remove and/or retrieve the objects by simply invoking the public functions that reside in the

[PULL 47/63] hw/cxl: Fix and use same calculation for HDM decoder block size everywhere

From: Jonathan Cameron In order to avoid having the size of the per HDM decoder register block repeated in lots of places, create the register definitions for HDM decoder 1 and use the offset between the first registers in HDM decoder 0 and HDM decoder 1 to establish the offset. Calculate in

Re: [PATCH 06/10] tcg/loongarch64: Use tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 126 +++ 1 file changed, 61 insertions(+), 65 deletions(-) Trivial when reviewing with git-diff --ignore-all-space. Reviewed-by: Philippe

Re: [PATCH 10/10] tcg/s390x: Use tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 161 ++--- 1 file changed, 79 insertions(+), 82 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 09/10] tcg/riscv: Use tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 189 +++-- 1 file changed, 97 insertions(+), 92 deletions(-) @@ -2075,10 +2080,10 @@ static void tcg_target_qemu_prologue(TCGContext *s)

[PULL 40/63] hw/i386/acpi-build: Determine SMI command port just once

From: Bernhard Beschow The SMI command port is currently hardcoded by means of the ACPI_PORT_SMI_CMD macro. This hardcoding is Intel specific and doesn't match VIA, for example. There is already the AcpiFadtData::smi_cmd attribute which is used when building the FADT. Let's also use it when

Re: [PATCH 01/10] tcg: Introduce tcg_use_softmmu

On 3/10/23 19:43, Richard Henderson wrote: Begin disconnecting CONFIG_SOFTMMU from !CONFIG_USER_ONLY. Introduce a variable which can be set at startup to select one method or another for user-only. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 8 ++-- tcg/tcg-op-ldst.c | 14

Re: [PATCH v3] hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical

> On 04-Oct-2023, at 2:46 AM, Bernhard Beschow wrote: > > Commit 6103451aeb74 ("hw/i386: Build-time assertion on pc/q35 reset register > being identical.") introduced a build-time check where the addresses of the > reset registers are expected to be equal. Back then the code to generate AML

Re: [PULL 0/2] hex queue

Looks like these patches haven't been posted to the list for (public) review. Needs to happen before a pull request. Brian Cain writes: > The following changes since commit 36e9aab3c569d4c9ad780473596e18479838d1aa: > > migration: Move return path cleanup to main migration thread (2023-09-27

Re: [PATCH 1/1] hw/ide/core: terminate in-flight DMA on IDE bus reset

On Tuesday, 3 October 2023 John Snow wrote: > Simon, can you confirm that Fiona's patches are appropriate for your > reproducer? In the meantime I'll do my > own audit for the problem as you described it (thank you very much for that) > and see if there's anything else > that needs to be

[PATCH v11 00/10] migration: Modify 'migrate' and 'migrate-incoming' QAPI commands for migration

This is v11 patchset of modified 'migrate' and 'migrate-incoming' QAPI design for upstream review. Update: Daniel has reviewed all patches and is okay with them. Markus has also given Acked-by tag for patches related to QAPI syntax change. Fabiano, Juan and other migration maintainers,

[PATCH v11 09/10] migration: Implement MigrateChannelList to hmp migration flow.

Integrate MigrateChannelList with all transport backends (socket, exec and rdma) for both src and dest migration endpoints for hmp migration. Suggested-by: Aravind Retnakaran Signed-off-by: Het Gala Reviewed-by: Daniel P. Berrangé --- migration/migration-hmp-cmds.c | 15 +--

[PATCH v11 03/10] migration: convert socket backend to accept MigrateAddress

Socket transport backend for 'migrate'/'migrate-incoming' QAPIs accept new wire protocol of MigrateAddress struct. It is achived by parsing 'uri' string and storing migration parameters required for socket connection into well defined SocketAddress struct. Suggested-by: Aravind Retnakaran

[PATCH v11 06/10] migration: New migrate and migrate-incoming argument 'channels'

MigrateChannelList allows to connect accross multiple interfaces. Add MigrateChannelList struct as argument to migration QAPIs. We plan to include multiple channels in future, to connnect multiple interfaces. Hence, we choose 'MigrateChannelList' as the new argument over 'MigrateChannel' to make

[PATCH v11 04/10] migration: convert rdma backend to accept MigrateAddress

RDMA based transport backend for 'migrate'/'migrate-incoming' QAPIs accept new wire protocol of MigrateAddress struct. It is achived by parsing 'uri' string and storing migration parameters required for RDMA connection into well defined InetSocketAddress struct. Suggested-by: Aravind Retnakaran

[PATCH v11 07/10] migration: modify migration_channels_and_uri_compatible() for new QAPI syntax

migration_channels_and_uri_compatible() check for transport mechanism suitable for multifd migration gets executed when the caller calls old uri syntax. It needs it to be run when using the modern MigrateChannel QAPI syntax too. After URI -> 'MigrateChannel' :

  1   2   3   4   5   6   7   >