[PULL 41/63] hw/acpi: Trace GPE access in all device models, not just PIIX4

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow Signed-off-by: Bernhard Beschow Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230908084234.17642-8-shen...@gmail.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/core.c | 5 + hw/acpi/piix4.c

[PATCH] hw/usb: Silence compiler warnings in USB code when compiling with -Wshadow

2023-10-04 Thread Thomas Huth
Rename variables or remove nested definitions where it makes sense, so that we can finally compile the USB code with "-Wshadow", too. Signed-off-by: Thomas Huth --- hw/usb/desc.c| 2 +- hw/usb/dev-hub.c | 8 hw/usb/dev-storage.c | 6 +++--- hw/usb/hcd-xhci.c| 10

Re: [PATCH 2/3] target/riscv: Support discontinuous PMU counters

2023-10-04 Thread Rob Bradford
Hi Atish, On Tue, 2023-10-03 at 13:25 -0700, Atish Kumar Patra wrote: > On Tue, Oct 3, 2023 at 5:51 AM Rob Bradford > wrote: > > > > There is no requirement that the enabled counters in the platform > > are > > continuously numbered. Add a "pmu-mask" property that, if > > specified, can > > be

Re: [PATCH v2 2/3] hw/cxl: Add QTG _DSM support for ACPI0017 device

2023-10-04 Thread Jonathan Cameron via
On Wed, 4 Oct 2023 05:04:31 -0400 "Michael S. Tsirkin" wrote: > On Mon, Sep 04, 2023 at 05:18:46PM +0100, Jonathan Cameron wrote: > > From: Dave Jiang > > > > Add a simple _DSM call support for the ACPI0017 device to return a fake QTG > > ID value of 0 in all cases. The enabling is for _DSM

[PULL 51/63] vdpa net: stop probing if cannot set features

2023-10-04 Thread Michael S. Tsirkin
From: Eugenio Pérez Otherwise it continues the CVQ isolation probing. Fixes: 152128d646 ("vdpa: move CVQ isolation check to net_init_vhost_vdpa") Reported-by: Peter Maydell Signed-off-by: Eugenio Pérez Message-Id: <20230915170836.3078172-3-epere...@redhat.com> Tested-by: Lei Yang

[PULL 48/63] hw/cxl: Support 4 HDM decoders at all levels of topology

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron Support these decoders in CXL host bridges (pxb-cxl), CXL Switch USP and CXL Type 3 end points. Signed-off-by: Jonathan Cameron Message-Id: <20230913132523.29780-5-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin ---

[PULL 58/63] virtio: remove unnecessary thread fence while reading next descriptor

2023-10-04 Thread Michael S. Tsirkin
From: Ilya Maximets It was supposed to be a compiler barrier and it was a compiler barrier initially called 'wmb' when virtio core support was introduced. Later all the instances of 'wmb' were switched to smp_wmb to fix memory ordering issues on non-x86 platforms. However, this one doesn't need

[PULL 46/63] hw/cxl: Add utility functions decoder interleave ways and target count.

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron As an encoded version of these key configuration parameters is available in a register, provide functions to extract it again so as to avoid the need for duplicating the storage. Whilst here update the _enc() function to include additional values as defined in the CXL 3.0

[PULL 43/63] vdpa: fix gcc cvq_isolated uninitialized variable warning

2023-10-04 Thread Michael S. Tsirkin
From: Stefan Hajnoczi gcc 13.2.1 emits the following warning: net/vhost-vdpa.c: In function ‘net_vhost_vdpa_init.constprop’: net/vhost-vdpa.c:1394:25: error: ‘cvq_isolated’ may be used uninitialized [-Werror=maybe-uninitialized] 1394 | s->cvq_isolated = cvq_isolated; |

[PULL 10/63] virtio-net: do not reset vlan filtering at set_features

2023-10-04 Thread Michael S. Tsirkin
From: Hawkins Jiawei This function is called after virtio_load, so all vlan configuration is lost in migration case. Just allow all the vlan-tagged packets if vlan is not configured, and trust device reset to clear all filtered vlans. Fixes: 0b1eaa8803 ("virtio-net: Do not filter VLANs without

Re: [Stable-8.1.2 00/45] Patch Round-up for stable 8.1.2, freeze on 2023-10-14

2023-10-04 Thread Michael Tokarev
04.10.2023 11:19, Olaf Hering wrote: How about this change for 8.1.x? This will allow usage in openSUSE Tumbleweed. c01196bddd subprojects/berkeley-testfloat-3: Update to fix a problem with compiler warnings Hm. I don't think this one is a good candidate (not that it can't be included).

[PULL 62/63] vhost-user: add shared_object msg

2023-10-04 Thread Michael S. Tsirkin
From: Albert Esteve Add three new vhost-user protocol `VHOST_USER_BACKEND_SHARED_OBJECT_* messages`. These new messages are sent from vhost-user back-ends to interact with the virtio-dmabuf table in order to add or remove themselves as virtio exporters, or lookup for virtio dma-buf shared

[PULL 42/63] hw/acpi/core: Trace enable and status registers of GPE separately

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow The bit positions of both registers are related. Tracing the registers independently results in the same offsets across these registers which eases debugging. Signed-off-by: Bernhard Beschow Acked-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PULL 05/63] hw/virtio/vhost-vdpa: Use target-agnostic qemu_target_page_mask()

2023-10-04 Thread Michael S. Tsirkin
From: Philippe Mathieu-Daudé Similarly to commit e414ed2c47 ("virtio-iommu: Use target-agnostic qemu_target_page_mask"), Replace the target-specific TARGET_PAGE_SIZE and TARGET_PAGE_MASK definitions by a call to the runtime qemu_target_page_size() helper which is target agnostic. Signed-off-by:

Re: [PATCH RESEND 10/15] ppc: spapr: Initialize the GSB Elements lookup table.

2023-10-04 Thread Harsh Prateek Bora
On 9/7/23 08:31, Nicholas Piggin wrote: Might be good to add a common nested: prefix to all patches actually. Noted. On Wed Sep 6, 2023 at 2:33 PM AEST, Harsh Prateek Bora wrote: This is a first step towards enabling support for nested PAPR hcalls for providing the get/set of various

[PATCH v2 2/2] sysemu/kvm: Restrict hvf_get_supported_cpuid() to x86 targets

2023-10-04 Thread Philippe Mathieu-Daudé
hvf_get_supported_cpuid() is only defined for x86 targets (in target/i386/hvf/x86_cpuid.c). Its declaration is pointless on all other targets. All the calls to it in target/i386/cpu.c are guarded by a call on hvf_enabled(), so are elided when HVF is not built in. Therefore we can remove the

[PATCH v2 0/2] sysemu/accel: Simplify sysemu/hvf.h

2023-10-04 Thread Philippe Mathieu-Daudé
Trivial cleanups which simplify "sysemu/hvf.h". Since v1: - Add missing header in hvf-cpu.c/x86_cpuid.c (Roman) - Added Roman tags in patch 1 Philippe Mathieu-Daudé (2): target/i386/hvf: Remove unused includes in 'hvf-i386.h' sysemu/kvm: Restrict hvf_get_supported_cpuid() to x86 targets

Re: [PATCH 2/2] sysemu/kvm: Restrict hvf_get_supported_cpuid() to x86 targets

2023-10-04 Thread Philippe Mathieu-Daudé
On 10/9/23 22:59, Roman Bolshakov wrote: On Tue, Sep 05, 2023 at 02:39:06PM +0200, Philippe Mathieu-Daudé wrote: hvf_get_supported_cpuid() is only defined for x86 targets (in target/i386/hvf/x86_cpuid.c). Its declaration is pointless on all other targets. All the calls to it in

[PATCH v2] hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical

2023-10-04 Thread Bernhard Beschow
Commit 6103451aeb74 ("hw/i386: Build-time assertion on pc/q35 reset register being identical.") introduced a build-time check where the addresses of the reset registers are expected to be equal. Back then rev3 of the FADT was used which required the reset register to be populated and there was

Re: [PATCH 04/13] fuzz: Correct invalid mentions of 'softmmu' by 'system'

2023-10-04 Thread Alexander Bulekov
Reviewed-by: Alexander Bulekov Thank you On 231004 1106, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > tests/qtest/fuzz/fuzz.h | 4 ++-- > softmmu/memory.c| 2 +- > tests/qtest/fuzz/fuzz.c | 2 +- > 3 files changed, 4 insertions(+), 4 deletions(-) > >

RE: [PATCH RFC V2 31/37] physmem,gdbstub: Common helping funcs/changes to *unrealize* vCPU

2023-10-04 Thread Salil Mehta via
Hi Phil/Richard, > From: qemu-arm-bounces+salil.mehta=huawei@nongnu.org bounces+salil.mehta=huawei@nongnu.org> On Behalf Of Salil Mehta via > Sent: Tuesday, October 3, 2023 11:23 AM > > Hi Phil, > > > From: Philippe Mathieu-Daudé > > Sent: Tuesday, October 3, 2023 7:34 AM > > To:

Re: [PATCH 0/3] sysemu/accel: Simplify sysemu/xen.h

2023-10-04 Thread Philippe Mathieu-Daudé
On 5/9/23 14:21, Philippe Mathieu-Daudé wrote: Trivial cleanups which simplify "sysemu/xen.h". Philippe Mathieu-Daudé (3): sysemu/xen: Remove unuseful CONFIG_USER_ONLY header guard sysemu/xen: Remove unreachable xen_ram_alloc() code sysemu/xen: Allow elision of

[PULL 55/63] pcie_sriov: unregister_vfs(): fix error path

2023-10-04 Thread Michael S. Tsirkin
From: Vladimir Sementsov-Ogievskiy local_err must be NULL before calling object_property_set_bool(), so we must clear it on each iteration. Let's also use more convenient error_reportf_err(). Signed-off-by: Vladimir Sementsov-Ogievskiy Message-Id:

[PULL 03/63] hw/virtio: Propagate page_mask to vhost_vdpa_section_end()

2023-10-04 Thread Michael S. Tsirkin
From: Philippe Mathieu-Daudé Propagate TARGET_PAGE_MASK (see the previous commit for rationale). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230710094931.84402-3-phi...@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin ---

[PULL 14/63] virtio: don't zero out memory region cache for indirect descriptors

2023-10-04 Thread Michael S. Tsirkin
From: Ilya Maximets Lots of virtio functions that are on a hot path in data transmission are initializing indirect descriptor cache at the point of stack allocation. It's a 112 byte structure that is getting zeroed out on each call adding unnecessary overhead. It's going to be correctly

[PULL 33/63] hw/cxl: Add QTG _DSM support for ACPI0017 device

2023-10-04 Thread Michael S. Tsirkin
From: Dave Jiang Add a simple _DSM call support for the ACPI0017 device to return a fake QTG ID value of 0 in all cases. The enabling is for _DSM plumbing testing from the OS. Following edited for readbility only Device (CXLM) { Name (_HID, "ACPI0017") // _HID: Hardware ID ... Method

[PULL 49/63] hw/pci-bridge/cxl-upstream: Add serial number extended capability support

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron Will be needed so there is a defined serial number for information queries via the Switch CCI. Signed-off-by: Jonathan Cameron Message-Id: <20230913133615.29876-1-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin ---

[PATCH 11/13] meson: Rename softmmu_mods -> system_mods

2023-10-04 Thread Philippe Mathieu-Daudé
See commit de6cd7599b ("meson: Replace softmmu_ss -> system_ss") for rationale. Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/meson.build b/meson.build index 21a1bc03f8..8890dc5748 100644 --- a/meson.build

Re: [PULL 00/63] virtio,pci: features, cleanups

2023-10-04 Thread Michael S. Tsirkin
On Wed, Oct 04, 2023 at 10:54:35AM +0200, Philippe Mathieu-Daudé wrote: > On 4/10/23 10:43, Michael S. Tsirkin wrote: > > > > > virtio,pci: features, cleanups > > > > vdpa: > >shadow vq vlan support > >net migration

Re: [PATCH 0/5] m68k: Instantiate ESP and next-net in the next-cube machine

2023-10-04 Thread Mark Cave-Ayland
On 30/09/2023 14:23, Thomas Huth wrote: Mark Cave-Ayland recently asked me about the ESP patches for the next-cube machine that I once posted a long time ago, but never got it merged (since Mark is currently working on improving the ESP device). With his help, I dusted off the ESP patch, but we

[PATCH 03/13] cpu: Correct invalid mentions of 'softmmu' by 'system-mode'

2023-10-04 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- cpu.c| 2 +- hw/core/cpu-common.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu.c b/cpu.c index 0769b0b153..8cb6790142 100644 --- a/cpu.c +++ b/cpu.c @@ -209,7 +209,7 @@ static Property cpu_common_props[] =

[PATCH 05/13] tcg: Correct invalid mentions of 'softmmu' by 'system-mode'

2023-10-04 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- docs/devel/testing.rst | 2 +- tests/tcg/s390x/pgm-specification.mak | 2 +- include/qemu/atomic128.h| 4 ++-- include/tcg/tcg-op-common.h | 2 +- accel/tcg/user-exec.c

[PATCH 08/13] semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user()

2023-10-04 Thread Philippe Mathieu-Daudé
Add a check in 'softmmu-uaccess.h' that the header is only include in system emulation, and rename it as 'uaccess.h'. Rename the API methods: - softmmu_[un]lock_user*() -> uaccess_[un]lock_user*() - softmmu_strlen_user() -> uaccess_strlen_user(). Update a pair of comments. Signed-off-by:

[PATCH 13/13] system: Rename softmmu/ directory as system/

2023-10-04 Thread Philippe Mathieu-Daudé
The softmmu/ directory contains files specific to system emulation. Rename it as system/. Update meson rules, the MAINTAINERS file and all the documentation and comments. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 44 -

[PATCH 04/13] fuzz: Correct invalid mentions of 'softmmu' by 'system'

2023-10-04 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/fuzz/fuzz.h | 4 ++-- softmmu/memory.c| 2 +- tests/qtest/fuzz/fuzz.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tests/qtest/fuzz/fuzz.h b/tests/qtest/fuzz/fuzz.h index 21d1362d65..7da0bc3d7e 100644 ---

[PATCH 10/13] hw/virtio/meson: Rename softmmu_virtio_ss -> system_virtio_ss

2023-10-04 Thread Philippe Mathieu-Daudé
See commit de6cd7599b ("meson: Replace softmmu_ss -> system_ss") for rationale. Signed-off-by: Philippe Mathieu-Daudé --- hw/virtio/meson.build | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/virtio/meson.build b/hw/virtio/meson.build index

[PATCH 07/13] gdbstub: Rename 'softmmu' -> 'system'

2023-10-04 Thread Philippe Mathieu-Daudé
We have gdbstub/user.c for user emulation code, use gdbstub/system.c for system emulation part. Rename s/softmmu/system/ in meson and few comments. Signed-off-by: Philippe Mathieu-Daudé --- gdbstub/internals.h | 4 ++-- gdbstub/{softmmu.c => system.c} | 2 +- gdbstub/meson.build

[PATCH 09/13] target/i386: Rename i386_softmmu_kvm_ss -> i386_kvm_ss

2023-10-04 Thread Philippe Mathieu-Daudé
Software MMU is TCG specific. Here 'softmmu' is misused for system emulation. Anyhow, since KVM is system emulation specific, just rename as 'i386_kvm_ss'. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/kvm/meson.build | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-)

[PATCH 12/13] meson: Rename target_softmmu_arch -> target_system_arch

2023-10-04 Thread Philippe Mathieu-Daudé
Finish the convertion started with commit de6cd7599b ("meson: Replace softmmu_ss -> system_ss"). If the $target_type is 'system', then use the target_system_arch[] source set :) Mechanical change doing: $ sed -i -e s/target_softmmu_arch/target_system_arch/g \ $(git grep -l

[PATCH 00/13] misc: Rename 'softmmu' -> 'system'

2023-10-04 Thread Philippe Mathieu-Daudé
This series finishes the cleanup which remove the confusion of using 'softmmu' when we really mean 'system emulation', as opposition to 'user emulation'. Now that Richard posted its "tcg: Allow softmmu for user-only" series, this is particularly relevant:

[PATCH 01/13] softmmu/trace-events: Fix a typo

2023-10-04 Thread Philippe Mathieu-Daudé
Commit 8af3f5c6d6 ("softmmu: add trace point when bdrv_flush_all fails") added calls to trace_vm_stop_flush_all() in 'cpus.c'. Signed-off-by: Philippe Mathieu-Daudé --- softmmu/trace-events | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/softmmu/trace-events

[PULL 18/63] vdpa: move vhost_vdpa_set_vring_ready to the caller

2023-10-04 Thread Michael S. Tsirkin
From: Eugenio Pérez Doing that way allows CVQ to be enabled before the dataplane vqs, restoring the state as MQ or MAC addresses properly in the case of a migration. The patch does it by defining a ->load NetClientInfo callback also for dataplane. Ideally, this should be done by an independent

Re: [PATCH v2 2/3] hw/cxl: Add QTG _DSM support for ACPI0017 device

2023-10-04 Thread Michael S. Tsirkin
On Mon, Sep 04, 2023 at 05:18:46PM +0100, Jonathan Cameron wrote: > From: Dave Jiang > > Add a simple _DSM call support for the ACPI0017 device to return a fake QTG > ID value of 0 in all cases. The enabling is for _DSM plumbing testing > from the OS. > > Following edited for readbility only >

[PATCH 06/13] accel: Rename accel_softmmu* -> accel_system*

2023-10-04 Thread Philippe Mathieu-Daudé
Rename accel.softmmu -> accel.system in file paths and the register_types() method. Rename sysemu_stubs_ss -> system_stubs_ss in meson following the pattern used on other source set names. Signed-off-by: Philippe Mathieu-Daudé --- accel/{accel-softmmu.h => accel-system.h} | 6 +++---

Re: [PATCH v3 1/7] vhost-user: strip superfluous whitespace

2023-10-04 Thread Michael S. Tsirkin
On Mon, Oct 02, 2023 at 10:32:15PM +0200, Laszlo Ersek wrote: > Cc: "Michael S. Tsirkin" (supporter:vhost) why the (supporter:vhost) part? not all scripts will cope well with text after the mail. If you really want to keep it around, I think you should add a hash tag # before that - more tools

[PULL 50/63] vdpa net: fix error message setting virtio status

2023-10-04 Thread Michael S. Tsirkin
From: Eugenio Pérez It incorrectly prints "error setting features", probably because a copy paste miss. Fixes: 152128d646 ("vdpa: move CVQ isolation check to net_init_vhost_vdpa") Reported-by: Peter Maydell Signed-off-by: Eugenio Pérez Message-Id:

Re: [PATCH v2 3/3] s390x/a-b-bios: zero the first byte of each page on start

2023-10-04 Thread Juan Quintela
Daniil Tatianin wrote: > Same as with the x86 verison of this test, we relied on the contents of > all pages in RAM to be the same across the entire test range, which is > very fragile. Zero the first byte of each page before running the > increment loop to fix this. > > Fixes: 5571dc824b

[PATCH 02/13] travis-ci: Correct invalid mentions of 'softmmu' by 'system'

2023-10-04 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- .travis.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.travis.yml b/.travis.yml index b958eca5de..76859d48da 100644 --- a/.travis.yml +++ b/.travis.yml @@ -34,7 +34,7 @@ env: - BASE_CONFIG="--disable-docs

[PULL 35/63] hw/i386/acpi-build: Use pc_madt_cpu_entry() directly

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow This is x86-specific code, so there is no advantage in using pc_madt_cpu_entry() behind an architecture-agnostic interface. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230908084234.17642-2-shen...@gmail.com> Reviewed-by: Michael S.

[PULL 26/63] vhost-user: factor out "vhost_user_write_sync"

2023-10-04 Thread Michael S. Tsirkin
From: Laszlo Ersek The tails of the "vhost_user_set_vring_addr" and "vhost_user_set_u64" functions are now byte-for-byte identical. Factor the common tail out to a new function called "vhost_user_write_sync". This is purely refactoring -- no observable change. Cc: "Michael S. Tsirkin"

[PATCH] hw/net/vhost_net: Silence compiler warning when compiling with -Wshadow

2023-10-04 Thread Thomas Huth
Rename the innermost local variables to avoid compiler warnings with "-Wshadow". Signed-off-by: Thomas Huth --- hw/net/vhost_net.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c index 57427a3997..e8e1661646 100644 ---

Re: [PATCH] hw/net/vhost_net: Silence compiler warning when compiling with -Wshadow

2023-10-04 Thread Michael S. Tsirkin
On Wed, Oct 04, 2023 at 10:49:39AM +0200, Thomas Huth wrote: > Rename the innermost local variables to avoid compiler warnings > with "-Wshadow". > > Signed-off-by: Thomas Huth Reviewed-by: Michael S. Tsirkin feel free to merge > --- > hw/net/vhost_net.c | 8 > 1 file changed, 4

[PULL 52/63] vdpa net: follow VirtIO initialization properly at cvq isolation probing

2023-10-04 Thread Michael S. Tsirkin
From: Eugenio Pérez This patch solves a few issues. The most obvious is that the feature set was done previous to ACKNOWLEDGE | DRIVER status bit set. Current vdpa devices are permissive with this, but it is better to follow the standard. Fixes: 152128d646 ("vdpa: move CVQ isolation check to

[PULL 36/63] hw/acpi/cpu: Have build_cpus_aml() take a build_madt_cpu_fn callback

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow build_cpus_aml() is architecture independent but needs to create architecture- specific CPU AML. So far this was achieved by using a virtual method from TYPE_ACPI_DEVICE_IF. However, build_cpus_aml() would resolve this interface from global (!) state. This makes it quite

[PULL 25/63] vhost-user: tighten "reply_supported" scope in "set_vring_addr"

2023-10-04 Thread Michael S. Tsirkin
From: Laszlo Ersek In the vhost_user_set_vring_addr() function, we calculate "reply_supported" unconditionally, even though we'll only need it if "wait_for_reply" is also true. Restrict the scope of "reply_supported" to the minimum. This is purely refactoring -- no observable change. Cc:

[PULL 27/63] vhost-user: flatten "enforce_reply" into "vhost_user_write_sync"

2023-10-04 Thread Michael S. Tsirkin
From: Laszlo Ersek At this point, only "vhost_user_write_sync" calls "enforce_reply"; embed the latter into the former. This is purely refactoring -- no observable change. Cc: "Michael S. Tsirkin" (supporter:vhost) Cc: Eugenio Perez Martin Cc: German Maglione Cc: Liu Jiang Cc: Sergio Lopez

[PULL 01/63] pci: SLT must be RO

2023-10-04 Thread Michael S. Tsirkin
current code sets PCI_SEC_LATENCY_TIMER to RW, but for pcie to pcie bridges it must be RO 0 according to pci express spec which says: This register does not apply to PCI Express. It must be read-only and hardwired to 00h. For PCI Express to PCI/PCI-X Bridges, refer to the

Re: [PATCH v2 2/3] i386/a-b-bootblock: zero the first byte of each page on start

2023-10-04 Thread Juan Quintela
Daniil Tatianin wrote: > The migration qtest all the way up to this point used to work by sheer > luck relying on the contents of all pages from 1MiB to 100MiB to contain > the same one value in the first byte initially. > > This easily breaks if we reduce the amount of RAM for the test instances

[PULL 30/63] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously

2023-10-04 Thread Michael S. Tsirkin
From: Laszlo Ersek (1) The virtio-1.2 specification writes: > 3 General Initialization And Device Operation > 3.1 Device Initialization > 3.1.1 Driver Requirements: Device Initialization > > [...] > > 7. Perform

[PULL 53/63] amd_iommu: Fix APIC address check

2023-10-04 Thread Michael S. Tsirkin
From: Akihiko Odaki An MSI from I/O APIC may not exactly equal to APIC_DEFAULT_ADDRESS. In fact, Windows 17763.3650 configures I/O APIC to set the dest_mode bit. Cover the range assigned to APIC. Fixes: 577c470f43 ("x86_iommu/amd: Prepare for interrupt remap support") Signed-off-by: Akihiko

[PULL 31/63] hw/isa/ich9: Add comment on imperfect emulation of PIC vs. I/O APIC routing

2023-10-04 Thread Michael S. Tsirkin
From: David Woodhouse As noted in the comment, the PCI INTx lines are supposed to be routed to *both* the PIC and the I/O APIC. It's just that we don't cope with the concept of an IRQ being asserted to two *different* pins on the two irqchips. So we have this hack of routing to I/O APIC only if

[PULL 57/63] virtio: use shadow_avail_idx while checking number of heads

2023-10-04 Thread Michael S. Tsirkin
From: Ilya Maximets We do not need the most up to date number of heads, we only want to know if there is at least one. Use shadow variable as long as it is not equal to the last available index checked. This avoids expensive qatomic dereference of the RCU-protected memory region cache as well

[PULL 45/63] hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron There is no strong justification for keeping these in the header so push them down into the associated cxl-component-utils.c file. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Fan Ni Signed-off-by: Jonathan Cameron Message-Id:

[PULL 37/63] hw/acpi/acpi_dev_interface: Remove now unused madt_cpu virtual method

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow This virtual method was always set to the x86-specific pc_madt_cpu_entry(), even in piix4 which is also used in MIPS. The previous changes use pc_madt_cpu_entry() otherwise, so madt_cpu can be dropped. Since pc_madt_cpu_entry() is now only used in x86-specific code, the

[PULL 40/63] hw/i386/acpi-build: Determine SMI command port just once

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow The SMI command port is currently hardcoded by means of the ACPI_PORT_SMI_CMD macro. This hardcoding is Intel specific and doesn't match VIA, for example. There is already the AcpiFadtData::smi_cmd attribute which is used when building the FADT. Let's also use it when

Re: [Stable-8.1.2 00/45] Patch Round-up for stable 8.1.2, freeze on 2023-10-14

2023-10-04 Thread Olaf Hering
Wed, 4 Oct 2023 11:44:53 +0300 Michael Tokarev : > Second, this is not even the production code, it is testing code. I need to double check if there is indeed a way to omit this code. A quick search indicates that disabling TCG may be required. > And the most important, third: even with the

[PULL 38/63] hw/acpi/acpi_dev_interface: Remove now unused #include "hw/boards.h"

2023-10-04 Thread Michael S. Tsirkin
From: Bernhard Beschow The "hw/boards.h" is unused since the previous commit. Since its removal requires include fixes in various unrelated files to keep the code compiling it has been split in a dedicated commit. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PULL 15/63] vdpa: use first queue SVQ state for CVQ default

2023-10-04 Thread Michael S. Tsirkin
From: Eugenio Pérez Previous to this patch the only way CVQ would be shadowed is if it does support to isolate CVQ group or if all vqs were shadowed from the beginning. The second condition was checked at the beginning, and no more configuration was done. After this series we need to check if

Re: [PULL 00/63] virtio,pci: features, cleanups

2023-10-04 Thread Philippe Mathieu-Daudé
On 4/10/23 10:43, Michael S. Tsirkin wrote: virtio,pci: features, cleanups vdpa: shadow vq vlan support net migration with cvq cxl: dummy ACPI QTG DSM support emulating 4 HDM decoders serial number

Re: [PATCH v2 1/3] i386/a-b-bootblock: factor test memory addresses out into constants

2023-10-04 Thread Juan Quintela
Daniil Tatianin wrote: > So that we have less magic numbers to deal with. This also allows us to > reuse these in the following commits. > > Signed-off-by: Daniil Tatianin > Reviewed-by: Peter Xu Reviewed-by: Juan Quintela queued.

[PULL 60/63] util/uuid: add a hash function

2023-10-04 Thread Michael S. Tsirkin
From: Albert Esteve Add hash function to uuid module using the djb2 hash algorithm. Add a couple simple unit tests for the hash function, checking collisions for similar UUIDs. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Albert Esteve Message-Id:

[PULL 32/63] tests/acpi: Allow update of DSDT.cxl

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron Addition of QTG in following patch requires an update to the test data. Signed-off-by: Jonathan Cameron Message-Id: <20230904161847.18468-2-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni Reviewed-by:

[PULL 63/63] libvhost-user: handle shared_object msg

2023-10-04 Thread Michael S. Tsirkin
From: Albert Esteve In the libvhost-user library we need to handle VHOST_USER_GET_SHARED_OBJECT requests, and add helper functions to allow sending messages to interact with the virtio shared objects hash table. Signed-off-by: Albert Esteve Message-Id:

[PULL 17/63] vdpa: rename vhost_vdpa_net_load to vhost_vdpa_net_cvq_load

2023-10-04 Thread Michael S. Tsirkin
From: Eugenio Pérez Next patches will add the corresponding data load. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang Message-Id: <20230822085330.3978829-4-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- net/vhost-vdpa.c |

[PULL 34/63] tests/acpi: Update DSDT.cxl with QTG DSM

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron Description of change in previous patch. Signed-off-by: Jonathan Cameron Message-Id: <20230904161847.18468-4-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni Reviewed-by: Dave Jiang ---

Re: [PATCH] audio/ossaudio: Fix compiler warning with -Wshadow

2023-10-04 Thread Philippe Mathieu-Daudé
On 4/10/23 10:39, Thomas Huth wrote: The "err" variable is only used twice in this code, in a very local fashion of first assigning it and then checking it in the next line. So there is no need to declare this variable a second time in the innermost block, we can re-use the variable that is

[PULL 61/63] hw/display: introduce virtio-dmabuf

2023-10-04 Thread Michael S. Tsirkin
From: Albert Esteve This API manages objects (in this iteration, dmabuf fds) that can be shared along different virtio devices, associated to a UUID. The API allows the different devices to add, remove and/or retrieve the objects by simply invoking the public functions that reside in the

[PULL 47/63] hw/cxl: Fix and use same calculation for HDM decoder block size everywhere

2023-10-04 Thread Michael S. Tsirkin
From: Jonathan Cameron In order to avoid having the size of the per HDM decoder register block repeated in lots of places, create the register definitions for HDM decoder 1 and use the offset between the first registers in HDM decoder 0 and HDM decoder 1 to establish the offset. Calculate in

[PULL 54/63] hw/i386/pc: improve physical address space bound check for 32-bit x86 systems

2023-10-04 Thread Michael S. Tsirkin
From: Ani Sinha 32-bit x86 systems do not have a reserved memory for hole64. On those 32-bit systems without PSE36 or PAE CPU features, hotplugging memory devices are not supported by QEMU as QEMU always places hotplugged memory above 4 GiB boundary which is beyond the physical address space of

Re: [PULL 00/63] virtio,pci: features, cleanups

2023-10-04 Thread Michael S. Tsirkin
On Wed, Oct 04, 2023 at 04:43:13AM -0400, Michael S. Tsirkin wrote: > The following changes since commit 494a6a2cf7f775d2c20fd6df9601e30606cc2014: > > Merge tag 'pull-request-2023-09-25' of https://gitlab.com/thuth/qemu into > staging (2023-09-25 10:10:30 -0400) > > are available in the Git

[PULL 20/63] vhost: Add count argument to vhost_svq_poll()

2023-10-04 Thread Michael S. Tsirkin
From: Hawkins Jiawei Next patches in this series will no longer perform an immediate poll and check of the device's used buffers for each CVQ state load command. Instead, they will send CVQ state load commands in parallel by polling multiple pending buffers at once. To achieve this, this patch

[PATCH v4 07/20] audio: add Apple Sound Chip (ASC) emulation

2023-10-04 Thread Mark Cave-Ayland
The Apple Sound Chip was primarily used by the Macintosh II to generate sound in hardware which was previously handled by the toolbox ROM with software interrupts. Implement both the standard ASC and also the enhanced ASC (EASC) functionality which is used in the Quadra 800. Note that whilst

[PATCH v4 09/20] q800: add Apple Sound Chip (ASC) audio to machine

2023-10-04 Thread Mark Cave-Ayland
The Quadra 800 has the enhanced ASC (EASC) audio chip which supports both the legacy IRQ routing through VIA2 and also "A/UX" mode routing direct to the CPU. Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland --- hw/m68k/q800-glue.c | 11 ++- hw/m68k/q800.c

[PATCH v4 13/20] swim: update IWM/ISM register block decoding

2023-10-04 Thread Mark Cave-Ayland
Update the IWM/ISM register block decoding to match the description given in the "SWIM Chip Users Reference". This allows us to validate the device response to the guest OS which currently only does just enough to indicate that the floppy drive is unavailable. Signed-off-by: Mark Cave-Ayland

[PATCH v4 04/20] q800: implement additional machine id bits on VIA1 port A

2023-10-04 Thread Mark Cave-Ayland
Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/mac_via.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index f84cc68849..e87a1b82d8 100644 ---

[PATCH v4 17/20] mac_via: always clear ADB interrupt when switching to A/UX mode

2023-10-04 Thread Mark Cave-Ayland
When the NetBSD kernel initialises it can leave the ADB interrupt asserted depending upon where in the ADB poll cycle the MacOS ADB interrupt handler is when the NetBSD kernel disables interrupts. The NetBSD ADB driver uses the ADB interrupt state to determine if the ADB is busy and refuses to

[PATCH v4 19/20] q800: add alias for MacOS toolbox ROM at 0x40000000

2023-10-04 Thread Mark Cave-Ayland
According to the Apple Quadra 800 Developer Note document, the Quadra 800 ROM consists of 2 ROM code sections based at offsets 0x0 and 0x80. A/UX attempts to access the toolbox ROM at the lower offset during startup, so provide a memory alias to allow the access to succeed. Signed-off-by:

[PATCH v4 16/20] mac_via: implement ADB_STATE_IDLE state if shift register in input mode

2023-10-04 Thread Mark Cave-Ayland
NetBSD switches directly to IDLE state without switching the shift register to input mode. Duplicate the existing ADB_STATE_IDLE logic in input mode from when the shift register is in output mode which allows the ADB autopoll handler to handle the response. Signed-off-by: Mark Cave-Ayland

[PATCH v4 14/20] mac_via: work around underflow in TimeDBRA timing loop in SETUPTIMEK

2023-10-04 Thread Mark Cave-Ayland
The MacOS toolbox ROM calculates the number of branches that can be executed per millisecond as part of its timer calibration. Since modern hosts are considerably quicker than original hardware, the negative counter reaches zero before the calibration completes leading to division by zero later in

[PATCH v4 12/20] swim: split into separate IWM and ISM register blocks

2023-10-04 Thread Mark Cave-Ayland
The swim chip provides an implementation of both Apple's IWM and ISM floppy disk controllers. Split the existing implementation into separate register banks for each controller, whilst also switching the IWM registers from 16-bit to 8-bit as implemented in real hardware. Signed-off-by: Mark

[PATCH v4 18/20] q800: add ESCC alias at 0xc000

2023-10-04 Thread Mark Cave-Ayland
Tests on real Q800 hardware show that the ESCC is addressable at multiple locations within the ESCC memory region - at least 0xc000, 0xc020 (as expected by the MacOS toolbox ROM) and 0xc040. All released NetBSD kernels before 10 use the 0xc000 address which causes a fatal error when running

[PATCH v4 10/20] q800: add easc bool machine class property to switch between ASC and EASC

2023-10-04 Thread Mark Cave-Ayland
This determines whether the Apple Sound Chip (ASC) is set to enhanced mode (default) or to original mode. The real Q800 hardware used an EASC chip however a lot of older software only works with the older ASC chip. Adding this as a machine parameter allows QEMU to be used as an developer aid for

[PATCH v4 15/20] mac_via: workaround NetBSD ADB bus enumeration issue

2023-10-04 Thread Mark Cave-Ayland
NetBSD assumes it can send its first ADB command after sending the ADB_BUSRESET command in ADB_STATE_NEW without changing the state back to ADB_STATE_IDLE first as detailed in the ADB protocol. Add a workaround to detect this condition at the start of ADB enumeration and send the next command

[PATCH v4 20/20] mac_via: extend timer calibration hack to work with A/UX

2023-10-04 Thread Mark Cave-Ayland
The A/UX timer calibration loop runs continuously until 2 consecutive iterations differ by at least 0x492 timer ticks. Modern hosts execute the timer calibration loop so fast that this situation never occurs causing a hang on boot. Use a similar method to Shoebill which is to randomly add 0x500

[PATCH v4 08/20] asc: generate silence if FIFO empty but engine still running

2023-10-04 Thread Mark Cave-Ayland
MacOS (un)helpfully leaves the FIFO engine running even when all the samples have been written to the hardware, and expects the FIFO status flags and IRQ to be updated continuously. There is an additional problem in that not all audio backends guarantee an all-zero output when there is no FIFO

[PATCH v4 05/20] q800: add IOSB subsystem

2023-10-04 Thread Mark Cave-Ayland
It is needed because it defines the BIOSConfig area. Co-developed-by: Laurent Vivier Signed-off-by: Mark Cave-Ayland Reviewed-by: BALATON Zoltan --- MAINTAINERS| 2 + hw/m68k/Kconfig| 1 + hw/m68k/q800.c | 9 +++ hw/misc/Kconfig| 3 + hw/misc/iosb.c

[PATCH v4 11/20] swim: add trace events for IWM and ISM registers

2023-10-04 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/block/swim.c | 14 ++ hw/block/trace-events | 7 +++ 2 files changed, 21 insertions(+) diff --git a/hw/block/swim.c b/hw/block/swim.c index 333da08ce0..7df36ea139 100644 --- a/hw/block/swim.c +++

[PATCH] audio/ossaudio: Fix compiler warning with -Wshadow

2023-10-04 Thread Thomas Huth
The "err" variable is only used twice in this code, in a very local fashion of first assigning it and then checking it in the next line. So there is no need to declare this variable a second time in the innermost block, we can re-use the variable that is declared at the beginning of the function.

[PATCH v4 06/20] q800: allow accesses to RAM area even if less memory is available

2023-10-04 Thread Mark Cave-Ayland
MacOS attempts a series of writes and reads over the entire RAM area in order to determine the amount of RAM within the machine. Allow accesses to the entire RAM area ignoring writes and always reading zero for areas where there is no physical RAM installed to allow MacOS to detect the memory size

[PATCH v4 03/20] q800: add machine id register

2023-10-04 Thread Mark Cave-Ayland
MacOS reads this address to identify the hardware. This is a basic implementation returning the ID of Quadra 800. Details: http://mess.redump.net/mess/driver_info/mac_technical_notes "There are 3 ID schemes [...] The third and most scalable is a machine ID register at 0x5ffc. The top

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