"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Extract QOM
TARGET_DEFAULT_CPU_TYPE depends on the TARGET_X86_64 definition
which is target specific. Such target specific definition taint
"cpu-qom.h".
Since "cpu-qom.h" must be target agnostic, remove this target
specific definition uses by inlining TARGET_DEFAULT_CPU_TYPE in
the two machines using it.
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.
In few commits we are going to add more types, so replace
the type_register_static() to ease further reviews.
Hi Shaoqin,
> From: Shaoqin Huang
> Sent: Tuesday, October 10, 2023 7:47 AM
>
> On 9/26/23 18:04, Salil Mehta via wrote:
> > Factor out CPU properties code common for {hot,cold}-plugged CPUs. This
> > allows
> > code reuse.
> >
> > Signed-off-by: Salil Mehta
> > ---
> > hw/arm/virt.c
On 10/10/2023 09.49, Philippe Mathieu-Daudé wrote:
Add a method to return the architecture bits (currently 8/32/64).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/libqtest.h | 8
tests/qtest/libqtest.c | 21 +
2 files changed, 29 insertions(+)
diff
Am 09.10.23 um 19:07 schrieb Thomas Huth:
[...]
@@ -483,20 +482,14 @@ int kvm_arch_put_registers(CPUState *cs, int level)
cs->kvm_run->psw_addr = env->psw.addr;
cs->kvm_run->psw_mask = env->psw.mask;
-if (can_sync_regs(cs, KVM_SYNC_GPRS)) {
-for (i = 0; i < 16;
Am 10.10.23 um 13:12 schrieb Thomas Huth:
On 10/10/2023 13.02, Christian Borntraeger wrote:
Am 09.10.23 um 19:07 schrieb Thomas Huth:
Since we already require at least kernel 3.15 in the s390x KVM code,
we can assume that the KVM_CAP_SYNC_REGS capability is always there.
Thus turn this
On 9/15/23 14:11, Huang Rui wrote:
> Configure context init feature flag for virglrenderer.
>
> Originally-by: Antonio Caggiano
> Signed-off-by: Huang Rui
> ---
>
> V4 -> V5:
> - Inverted patch 5 and 6 because we should configure
> HAVE_VIRGL_CONTEXT_INIT firstly. (Philippe)
>
>
On 9/10/23 18:41, Alex Bennée wrote:
Coverity complains that we have an unbalance use of mutex leading to
potential deadlocks.
Fixes: CID 1519048
Fixes: a208ba09bd ("tests/plugin: add a hotblocks plugin")
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
---
On 3/10/23 20:30, Richard Henderson wrote:
Collect items like input and output code size, guest instruction count,
intermediate ops, spills, etc.
Signed-off-by: Vanderson M. do Rosario
Signed-off-by: Alex Bennée
Signed-off-by: Fei Wu
[rth: Consolidated at the end of translation.]
On Tue, 10 Oct 2023, BALATON Zoltan wrote:
@@ -2169,8 +2195,10 @@ static void sm501_pci_class_init(ObjectClass *klass,
void *data)
static void sm501_pci_init(Object *o)
{
+#ifdef CONFIG_PIXMAN
Do you still need the ifdef here if we keep the property even with !PIXMAN?
Maybe you intended to
Hi,
On 8/18/23 17:49, Xiaoyao Li wrote:
According to Chapter "CPUID Virtualization" in TDX module spec, CPUID
bits of TD can be classified into 6 types:
1 | As configured | configurable by VMM, independent of native
Dear Support team,
I am facing an issue with running Qemu guest running in Windows host and
here the details:
- Windows 10 host
- hyper-v is enabled
- openvpn tap-windows v9 adapter is installed and network interface is
named to QEMU_TAP
-Qemu 8.1.0 is installed
While running in cmd terminal:
Hi
On Tue, Oct 10, 2023 at 3:59 PM BALATON Zoltan wrote:
>
> On Tue, 10 Oct 2023, marcandre.lur...@redhat.com wrote:
> > From: Marc-André Lureau
> >
> > Drop the "x-pixman" property and use fallback path in such case.
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > hw/display/sm501.c | 46
> On 10-Oct-2023, at 3:19 PM, Thomas Huth wrote:
>
> On 10/10/2023 09.49, Philippe Mathieu-Daudé wrote:
>
> Some short patch description, please! Why is this necessary/useful?
> (I think I know, but other might not, and it is also important for the
> history)
Other than this,
Reviewed-by:
Hi
On Tue, Oct 10, 2023 at 2:09 PM BALATON Zoltan wrote:
>
> On Tue, 10 Oct 2023, Marc-André Lureau wrote:
> > On Tue, Oct 10, 2023 at 1:53 PM BALATON Zoltan wrote:
> >> On Tue, 10 Oct 2023, Marc-André Lureau wrote:
> >>> Hi Zoltan
> >>>
> >>> On Mon, Sep 18, 2023 at 9:59 PM BALATON Zoltan
seabios starts to make the placement of the 64bit mmio window
depend on the physical address space. Run the testcase with
a fixed processor on tcg to avoid different results depending
on the host machine.
Signed-off-by: Gerd Hoffmann
---
tests/qtest/bios-tables-test.c | 2 ++
1 file changed, 2
On Tue, 10 Oct 2023, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Acked-by: BALATON Zoltan
---
configs/devices/mips64el-softmmu/default.mak | 2 +-
hw/display/Kconfig | 2 +-
hw/display/meson.build
On Tue, 10 Oct 2023, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
Drop the "x-pixman" property and use fallback path in such case.
Signed-off-by: Marc-André Lureau
---
hw/display/sm501.c | 46 +-
1 file changed, 37 insertions(+), 9
Het Gala writes:
> On 10/10/2023 2:34 AM, Fabiano Rosas wrote:
>> Het Gala writes:
>>
>>> This is v12 patchset of modified 'migrate' and 'migrate-incoming' QAPI
>>> design
>>> for upstream review.
>>>
>>> Would like to thank all the maintainers that actively participated in the
>>> v11
>>>
> On 10-Oct-2023, at 5:20 PM, Philippe Mathieu-Daudé wrote:
>
> Invert 'option_rom' logic and rename it as 'option_rom_has_mr' to fix:
>
> hw/core/loader.c:1073:27: error: declaration shadows a variable in the
> global scope [-Werror,-Wshadow]
> bool option_rom,
On 2023/10/10 16:49, Philippe Mathieu-Daudé wrote:
Additionally use qtest_get_arch_bits() when relevant.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Akihiko Odaki
On Tue, 10 Oct 2023, Marc-André Lureau wrote:
Hi Zoltan
On Mon, Sep 18, 2023 at 9:59 PM BALATON Zoltan wrote:
On Mon, 18 Sep 2023, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
Drop the "x-pixman" property and use fallback path in such case.
Signed-off-by: Marc-André Lureau
On 10/10/23 11:58, Thomas Huth wrote:
On 10/10/2023 09.49, Philippe Mathieu-Daudé wrote:
Additionally use qtest_get_arch_bits() when relevant.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/ahci-test.c | 5 ++---
tests/qtest/am53c974-test.c | 4 +---
Am 09.10.23 um 19:07 schrieb Thomas Huth:
Since we already require at least kernel 3.15 in the s390x KVM code,
we can assume that the KVM_CAP_SYNC_REGS capability is always there.
Thus turn this into a hard requirement now.
Signed-off-by: Thomas Huth
---
target/s390x/kvm/kvm.c | 20
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 0x0001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
DWordMemory (ResourceProducer, PosDecode,
On 2023/10/5 17:57, Max Chou wrote:
The operator (fwmacc16) of vfwmaccbf16.vf helper function should be
replaced by fwmaccbf16.
Signed-off-by: Max Chou
---
target/riscv/vector_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/vector_helper.c
Signed-off-by: Gerd Hoffmann
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8bf4..a251b20a1bdd 100644
---
/seabios-20231010-pull-request
for you to fetch changes up to e83f3600f9ff7d9e0d014f328e64c49bb81b945c:
tests/acpi: disable tests/data/acpi/q35/DSDT.mmio64 updates (2023-10-10
11:11:55 +0200)
seabios: update to git snapshot
Give
Signed-off-by: Gerd Hoffmann
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index a251b20a1bdd..dfb8523c8bf4 100644
---
Fix:
hw/core/machine.c:1302:22: error: declaration shadows a variable in the
global scope [-Werror,-Wshadow]
const CPUArchId *cpus = possible_cpus->cpus;
^
hw/core/numa.c:69:17: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
On 9/15/23 14:11, Huang Rui wrote:
> + if virgl.version().version_compare('>= 0.9.0') and
> virgl.version().version_compare('< 1.0.0')
> +message('Enabling virglrenderer unstable APIs')
> +virgl = declare_dependency(compile_args:
> '-DVIRGL_RENDERER_UNSTABLE_APIS',
> +
On Sun, 17 Sep 2023, Volker Rümelin wrote:
Cc: qemu-stable. Patch 1/8 is a bug fix.
Cc: more people. The maintainer of hw/audio is busy with other projects.
Earlier this year I was asked if I could help to debug an audio playback
speed issue with the es1370 device. While debugging the playback
On 3/10/23 20:30, Richard Henderson wrote:
From: Fei Wu
Dump the hottest TBs if -d tb_stats:{all,jit,exec}[:dump_num_at_exit]
Signed-off-by: Fei Wu
Signed-off-by: Richard Henderson
---
bsd-user/bsd-proc.h| 2 ++
include/tcg/tb-stats.h | 10 +-
accel/tcg/monitor.c| 8
On 10/10/23 14:43, Alex Bennée wrote:
Nicholas Piggin writes:
An AIX image can be provided by setting AIX_IMAGE environment
variable when running avocado.
It's questionable whether we should carry these in upstream QEMU.
It's convenient to see how to run these things, but simple enough
to
Hello,
On 10/9/23 08:32, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
Hi,
Implement RAMFB migration, and add properties to enable it only on >= 8.2
machines, + a few related cleanups.
Should this series go in vfio-next ?
Thanks,
C.
thanks
v5:
- add missing
On 10/10/23 09:49, Philippe Mathieu-Daudé wrote:
While qtest_get_arch() returns the target architecture name,
such "i386" or "x86_64", qtest_get_base_arch() return the
"base" (or real underlying) architecture, in this example
that is "x86".
Signed-off-by: Philippe Mathieu-Daudé
---
> From: Shaoqin Huang
> Sent: Tuesday, October 10, 2023 8:39 AM
> To: Salil Mehta ; qemu-devel@nongnu.org; qemu-
> a...@nongnu.org
> Cc: m...@kernel.org; jean-phili...@linaro.org; Jonathan Cameron
> ; lpieral...@kernel.org;
> peter.mayd...@linaro.org; richard.hender...@linaro.org;
>
On 10/10/2023 10.42, Philippe Mathieu-Daudé wrote:
On 10/10/23 09:49, Philippe Mathieu-Daudé wrote:
While qtest_get_arch() returns the target architecture name,
such "i386" or "x86_64", qtest_get_base_arch() return the
"base" (or real underlying) architecture, in this example
that is "x86".
> From: Shaoqin Huang
> Sent: Tuesday, October 10, 2023 9:18 AM
> To: Salil Mehta ; qemu-devel@nongnu.org; qemu-
> a...@nongnu.org
> Cc: m...@kernel.org; jean-phili...@linaro.org; Jonathan Cameron
> ; lpieral...@kernel.org;
> peter.mayd...@linaro.org; richard.hender...@linaro.org;
>
On 10/10/2023 09.49, Philippe Mathieu-Daudé wrote:
Some short patch description, please! Why is this necessary/useful?
(I think I know, but other might not, and it is also important for the history)
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/arm-cpu-features.c | 49
On 9/10/23 18:40, Alex Bennée wrote:
After testing locally I decided to revert a5754847e0 (tests/avocado: Disable the
test_sbsaref_edk2_firmware by default) as the test seems pretty
stable:
env QEMU_TEST_FLAKY_TESTS=1 retry.py -n 50 -c -- \
./tests/venv/bin/avocado run \
On Tue, 10 Oct 2023 at 18:23, Nicholas Piggin wrote:
>
> Add simple Linux kernel boot tests for BookE 64-bit and 32-bit CPUs
> using Guenter Roeck's rootfs images for Linux testing, and a gitlab
> repository with kernel images that I built since there are very few
> sources of modern BookE images
> On 10-Oct-2023, at 5:20 PM, Philippe Mathieu-Daudé wrote:
>
> Rename 'address_space' -> 'legacy_io' and
> 'address_space_io' -> 'io' to fix:
This works but why not replace address_space with legacy_address_space instead?
>
> hw/display/vga.c:2307:29: error: declaration shadows a
On 10.10.23 12:36, Alex Bennée wrote:
Hanna Czenczek writes:
On 10.10.23 06:00, Yajun Wu wrote:
On 10/9/2023 5:13 PM, Hanna Czenczek wrote:
External email: Use caution opening links or attachments
On 09.10.23 11:07, Hanna Czenczek wrote:
On 09.10.23 10:21, Hanna Czenczek wrote:
On
Radeon cards have a 30 bit DAC and corresponding palette register to
access it. We only use 8 bits but let the guests use 10 bit color
values for those that access it through this register.
Signed-off-by: BALATON Zoltan
---
hw/display/ati.c | 9 +
hw/display/ati_dbg.c | 1 +
CPU_RESOLVING_TYPE is a per-target definition, and is
irrelevant for other targets. Move it to "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/cpu-qom.h | 1 -
target/riscv/cpu.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu-qom.h
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Extract QOM
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Extract QOM
On Tue, Oct 10, 2023 at 4:57 AM Yajun Wu wrote:
>
>
> On 10/9/2023 6:28 PM, German Maglione wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On Sat, Oct 7, 2023 at 4:23 AM Yajun Wu wrote:
> >>
> >> On 10/6/2023 6:34 PM, Michael S. Tsirkin wrote:
> >>> External
On Tue, Oct 10, 2023 at 1:11 PM Jeuk Kim wrote:
>
> From: Jeuk Kim
>
> This patch fixes invalid ufs register fields.
> This fixes an issue reported by Bin Meng that
> caused ufs to fail over riscv.
>
Fixes: bc4e68d362ec ("hw/ufs: Initial commit for emulated
Universal-Flash-Storage")
On Tue, 10 Oct 2023, Marc-André Lureau wrote:
Hi
On Tue, Oct 10, 2023 at 2:09 PM BALATON Zoltan wrote:
On Tue, 10 Oct 2023, Marc-André Lureau wrote:
On Tue, Oct 10, 2023 at 1:53 PM BALATON Zoltan wrote:
On Tue, 10 Oct 2023, Marc-André Lureau wrote:
Hi Zoltan
On Mon, Sep 18, 2023 at 9:59
Hanna Czenczek writes:
> On 10.10.23 06:00, Yajun Wu wrote:
>>
>> On 10/9/2023 5:13 PM, Hanna Czenczek wrote:
>>> External email: Use caution opening links or attachments
>>>
>>>
>>> On 09.10.23 11:07, Hanna Czenczek wrote:
On 09.10.23 10:21, Hanna Czenczek wrote:
> On 07.10.23 04:22,
On 10/10/2023 13.02, Christian Borntraeger wrote:
Am 09.10.23 um 19:07 schrieb Thomas Huth:
Since we already require at least kernel 3.15 in the s390x KVM code,
we can assume that the KVM_CAP_SYNC_REGS capability is always there.
Thus turn this into a hard requirement now.
Signed-off-by:
Peter Xu recently made me aware of a crash bug that turned out to be
caused by disobeying string input visitor restrictions:
/*
* The string input visitor does not implement support for visiting
* QAPI structs, alternates, null, or arbitrary QTypes. Only flat lists
* of
On 3/10/23 20:30, Richard Henderson wrote:
Move all of it into accel/tcg/monitor.c. This puts everything
about tcg that is only used by the monitor in the same place.
Signed-off-by: Richard Henderson
---
accel/tcg/internal-common.h | 2 -
include/exec/cputlb.h | 1 -
On Tue, 10 Oct 2023 at 18:25, Nicholas Piggin wrote:
>
> POWER10 is the latest pseries CPU.
>
> Signed-off-by: Nicholas Piggin
Reviewed-by: Joel Stanley
> ---
> hw/ppc/spapr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index
Nicholas Piggin writes:
> An AIX image can be provided by setting AIX_IMAGE environment
> variable when running avocado.
>
> It's questionable whether we should carry these in upstream QEMU.
> It's convenient to see how to run these things, but simple enough
> to maintain in out of tree
On 3/10/23 20:30, Richard Henderson wrote:
From: "Vanderson M. do Rosario"
Introduce a MonitorDisasSpace to replace the current is_physical
boolean argument to monitor_disas. Generate an error if we attempt
to read past the end of a single RAMBlock.
Signed-off-by: Vanderson M. do Rosario
Richard Henderson writes:
> Do not rely on return value of 0 to indicate error,
> pass along an Error pointer to be set.
Not wrong, but goes against error.h's recommendation
* - Whenever practical, also return a value that indicates success /
* failure. This can make the error checking
The GPIO_VGA_DDC and GPIO_DVI_DDC registers are used on Radeon for DDC
access. Some drivers like the PPC Mac FCode ROM uses unaligned writes
to these registers so implement this the same way as already done for
GPIO_MONID which is used the same way for the Rage 128 Pro.
Signed-off-by: BALATON
The LoongArch 'virt' machine doesn't use any ISA UART.
No need to build the device model, remove its Kconfig entry.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/loongarch/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index
ISA bus and serial aren't used by the LoongArch virt
machine. Remove the dead code.
Philippe Mathieu-Daudé (2):
hw/loongarch/virt: Remove unused ISA UART
hw/loongarch/virt: Remove unused ISA Bus
include/hw/loongarch/virt.h | 3 ---
hw/loongarch/virt.c | 5 -
hw/loongarch/Kconfig
The LoongArch 'virt' machine doesn't use its ISA I/O region.
If a ISA device were to be mapped there, there is no support
for ISA IRQ. Unlikely useful. Simply remove.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/loongarch/virt.h | 3 ---
hw/loongarch/virt.c | 5 -
Hi
On Tue, Oct 10, 2023 at 1:53 PM BALATON Zoltan wrote:
>
> On Tue, 10 Oct 2023, Marc-André Lureau wrote:
> > Hi Zoltan
> >
> > On Mon, Sep 18, 2023 at 9:59 PM BALATON Zoltan wrote:
> >>
> >> On Mon, 18 Sep 2023, marcandre.lur...@redhat.com wrote:
> >>> From: Marc-André Lureau
> >>>
> >>>
[spooky season is coming up, so time for some thread necromancy!]
On Thu, Jul 27 2023, Cornelia Huck wrote:
> On Tue, Jul 25 2023, Gavin Shan wrote:
>
>> On 7/24/23 18:48, Cornelia Huck wrote:
>>> On Mon, Jul 24 2023, Gavin Shan wrote:
On 7/18/23 21:14, Cornelia Huck wrote:
> We
On Tue, 10 Oct 2023, Marc-André Lureau wrote:
On Tue, Oct 10, 2023 at 1:53 PM BALATON Zoltan wrote:
On Tue, 10 Oct 2023, Marc-André Lureau wrote:
Hi Zoltan
On Mon, Sep 18, 2023 at 9:59 PM BALATON Zoltan wrote:
On Mon, 18 Sep 2023, marcandre.lur...@redhat.com wrote:
From: Marc-André
git shortlog
Gerd Hoffmann (7):
disable array bounds warning
better kvm detection
detect physical address space size
move 64bit pci window to end of address space
be less conservative with the 64bit pci io window
qemu: log reservations in fw_cfg
t(lams, );
}
}
fdt_add_flash_node(lams);
---
base-commit: 2f3913f4b2ad74baeb5a6f1d36efbd9ecdf1057d
change-id: 20231010-loongarch-loader-params-f0bc0b2cb5ea
Best regards,
On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
CPU_RESOLVING_TYPE is a per-target definition, and is
irrelevant for other targets. Move it to "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/cpu-qom.h | 1 -
target/riscv/cpu.h | 2 ++
2 files changed, 2
On 3/10/23 20:30, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/exec/memory.h | 2 ++
softmmu/physmem.c | 4 ++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index ef23d65afc..ebdecf64a6 100644
---
On Fri, 6 Oct 2023 at 07:23, Glenn Miles wrote:
>
> Allow external devices to drive pca9552 input pins by adding
> input GPIO's to the model. This allows a device to connect
> its output GPIO's to the pca9552 input GPIO's.
>
> In order for an external device to set the state of a pca9552
> pin,
Dmitry Frolov writes:
> qemu_ram_block_from_host() may return NULL, which will be dereferenced w/o
> check. Usualy return value is checked for this function.
> Found by Linux Verification Center (linuxtesting.org) with SVACE.
>
> Fixes: c7c0e72408df5e7821c0e995122fb2fe0ac001f1 ("migration/ram:
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.
In few commits we are going to add more types, so replace
the type_register_static() to ease further reviews.
TYPE_RISCV_CPU_BASE depends on the TARGET_RISCV32/TARGET_RISCV64
definitions which are target specific. Such target specific
definition taints "cpu-qom.h".
Since "cpu-qom.h" must be target agnostic, remove its target
specific definition uses by inlining TYPE_RISCV_CPU_BASE in the
two machines
Since the OBJECT_DECLARE_CPU_TYPE() macro uses the abstract ArchCPU
type, when declaring multiple CPUs of the same ArchCPU type we get
an error related to the indirect G_DEFINE_AUTOPTR_CLEANUP_FUNC()
use within OBJECT_DECLARE_TYPE():
target/mips/cpu-qom.h:31:1: error: redefinition of
CPU_RESOLVING_TYPE is a per-target definition, and is
irrelevant for other targets. Move it to "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/ppc/cpu-qom.h | 3 +--
target/ppc/cpu.h | 2 ++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu-qom.h
"target/foo/cpu-qom.h" is supposed to be target agnostic
(include-able by any target). Add such mention in the
header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu-qom.h| 2 +-
target/hppa/cpu-qom.h | 2 +-
target/microblaze/cpu-qom.h | 2 +-
3 files changed, 3
On 10/10/23 11:46, Thomas Huth wrote:
On 10/10/2023 09.49, Philippe Mathieu-Daudé wrote:
Add a method to return the architecture bits (currently 8/32/64).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/libqtest.h | 8
tests/qtest/libqtest.c | 21 +
2
On 9/15/23 14:11, Huang Rui wrote:
> Venus in virglrenderer has required render server support.
>
> Signed-off-by: Huang Rui
> ---
> hw/display/virtio-gpu-virgl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/display/virtio-gpu-virgl.c
On 10/10/23 14:50, Philippe Mathieu-Daudé wrote:
On 10/10/23 14:46, Ani Sinha wrote:
On 10-Oct-2023, at 5:20 PM, Philippe Mathieu-Daudé
wrote:
Rename 'address_space' -> 'legacy_io' and
'address_space_io' -> 'io' to fix:
This works but why not replace address_space with
Hi
On Tue, Oct 10, 2023 at 4:30 PM BALATON Zoltan wrote:
>
> On Tue, 10 Oct 2023, BALATON Zoltan wrote:
> >> @@ -2169,8 +2195,10 @@ static void sm501_pci_class_init(ObjectClass *klass,
> >> void *data)
> >>
> >> static void sm501_pci_init(Object *o)
> >> {
> >> +#ifdef CONFIG_PIXMAN
> >
> > Do
Hi
On Tue, Oct 10, 2023 at 4:49 PM Cédric Le Goater wrote:
>
> Hello,
>
> On 10/9/23 08:32, marcandre.lur...@redhat.com wrote:
> > From: Marc-André Lureau
> >
> > Hi,
> >
> > Implement RAMFB migration, and add properties to enable it only on >= 8.2
> > machines, + a few related cleanups.
>
>
Hi Jean,
On 9/29/23 18:16, Jean-Philippe Brucker wrote:
> On Wed, Sep 13, 2023 at 10:01:44AM +0200, Eric Auger wrote:
>> Introduce resv_region_list_insert() helper which inserts
>> a new ReservedRegion into a sorted list of reserved region.
>> In case of overlap, the new region has higher priority
> From: Shaoqin Huang
> Sent: Tuesday, October 10, 2023 8:34 AM
> To: Salil Mehta ; qemu-devel@nongnu.org; qemu-
> a...@nongnu.org
> Cc: m...@kernel.org; jean-phili...@linaro.org; Jonathan Cameron
> ; lpieral...@kernel.org;
> peter.mayd...@linaro.org; richard.hender...@linaro.org;
>
_boot(lams, );
} else {
-loongarch_direct_kernel_boot(lams);
+loongarch_direct_kernel_boot(lams, );
}
}
fdt_add_flash_node(lams);
---
base-commit: 2f3913f4b2ad74baeb5a6f1d36efbd9ecdf1057d
change-id: 20231010-loongarch-loader-params-f0bc0b2cb5ea
Best regards,
--
Thomas Weißschuh
On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
TYPE_RISCV_CPU_BASE depends on the TARGET_RISCV32/TARGET_RISCV64
definitions which are target specific. Such target specific
definition taints "cpu-qom.h".
Since "cpu-qom.h" must be target agnostic, remove its target
specific definition uses
在 2023/10/10 下午5:28, Philippe Mathieu-Daudé 写道:
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
On 9/10/23 18:40, Alex Bennée wrote:
We need this to test some TPM stuff.
Message-Id: <20230925144854.1872513-3-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
Reviewed-by: Daniel P. Berrangé
---
.gitlab-ci.d/cirrus/macos-12.vars| 2 +-
On 9/10/23 18:40, Alex Bennée wrote:
The modern packaging of cross GCC's doesn't need the explicit version
number at the end.
Signed-off-by: Alex Bennée
---
configure | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 9/15/23 14:11, Huang Rui wrote:
> Hi all,
>
> Antonio Caggiano made the venus with QEMU on KVM platform last
> September[1]. This series are inherited from his original work to support
> the features of context init, hostmem, resource uuid, and blob resources
> for venus.
> At March of this
On Tue, 10 Oct 2023 at 18:24, Nicholas Piggin wrote:
>
> POWER10 is the latest IBM Power machine. Although it is not offered in
> "OPAL mode" (i.e., powernv configuration), so there is a case that it
> should remain at powernv9, most of the development work is going into
> powernv10 at the
> On 10-Oct-2023, at 5:20 PM, Philippe Mathieu-Daudé wrote:
>
> Fix:
>
> hw/core/machine.c:1302:22: error: declaration shadows a variable in the
> global scope [-Werror,-Wshadow]
> const CPUArchId *cpus = possible_cpus->cpus;
> ^
> hw/core/numa.c:69:17: error:
On 3/10/23 20:30, Richard Henderson wrote:
From: Fei Wu
Enable TBStatistics collection from startup.
Signed-off-by: Vanderson M. do Rosario
Signed-off-by: Alex Bennée
Signed-off-by: Fei Wu
[rth: Change "tb_stats_foo" to "tb_stats:foo"]
Signed-off-by: Richard Henderson
---
Philippe Mathieu-Daudé writes:
> On 3/10/23 20:30, Richard Henderson wrote:
>> From: Fei Wu
>> Dump the hottest TBs if -d
>> tb_stats:{all,jit,exec}[:dump_num_at_exit]
>> Signed-off-by: Fei Wu
>> Signed-off-by: Richard Henderson
>> ---
>> bsd-user/bsd-proc.h| 2 ++
>>
On Tue, Oct 10, 2023 at 02:11:13PM +0900, Jeuk Kim wrote:
> From: Jeuk Kim
>
> This patch fixes invalid ufs register fields.
> This fixes an issue reported by Bin Meng that
> caused ufs to fail over riscv.
>
> Signed-off-by: Jeuk Kim
> ---
> include/block/ufs.h | 4 ++--
> 1 file changed, 2
On 10/7/23 02:02, Richard W.M. Jones wrote:
RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
this adds about 5% total overhead when emulating RV64 on x86-64 host.
Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
disk. The guest has a copy of the qemu
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
05.10.2023 13:04, Niklas Cassel wrote:
From: Niklas Cassel
Legacy software contains a standard mechanism for generating a reset to a
Serial ATA device - setting the SRST (software reset) bit in the Device
Control register.
Serial ATA has a more robust mechanism called COMRESET, also referred
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