During the FDT generation use the existing mask containing the enabled
counters rather then generating a new one. Using the existing mask will
support the use of discontinuous counters.
Signed-off-by: Rob Bradford
---
hw/riscv/virt.c| 2 +-
target/riscv/pmu.c | 6 +-
target/riscv/pmu.h
This has been replaced by a "pmu-mask" property that provides much more
flexibility.
Signed-off-by: Rob Bradford
---
docs/about/deprecated.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 8b136320e2..37f3414ef8
Currently the available PMU counters start at HPM3 and run through to
the number specified by the "pmu-num" property. There is no
requirement in the specification that the available counters be
continously numbered. This series add suppport for specifying a
discountinuous range of counters though
Check the PMU available bitmask when checking if a counter is valid
rather than comparing the index against the number of PMUs.
Signed-off-by: Rob Bradford
---
target/riscv/csr.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
Using a mask instead of the number of PMU devices supports the accurate
emulation of platforms that have a discontinuous set of PMU counters.
Generate a warning if the old property changed from the default but
still go ahead and use it to generate the mask if the user has changed
it from the
Hello,
Please review the patch-set version 5.
I have incorporated review comments from Cedric.
Ninad Palsule (10):
hw/fsi: Introduce IBM's Local bus
hw/fsi: Introduce IBM's scratchpad
hw/fsi: Introduce IBM's cfam,fsi-slave
hw/fsi: Introduce IBM's FSI
hw/fsi: IBM's On-chip Peripheral
Complete the cpu execution loop. At this time, we recognize exits
associated with only MMIO access. Future patches will add support for
recognizing other exit reasons, such as PSCI calls made by guest.
Signed-off-by: Srivatsa Vaddagiri
---
accel/gunyah/gunyah-accel-ops.c | 1 +
Specify the location of device-tree and its size, as Gunyah requires the
device-tree to be parsed before VM can begin its execution.
Signed-off-by: Srivatsa Vaddagiri
---
MAINTAINERS | 1 +
hw/arm/virt.c | 6 ++
include/sysemu/gunyah.h | 7 +++
Avoid dereferencing a NULL pointer that its_class_name() could return.
Signed-off-by: Srivatsa Vaddagiri
---
hw/arm/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a13c658bbf..b55d5c7282 100644
--- a/hw/arm/virt.c
+++
Add a new accelerator, gunyah, with basic functionality of creating a
VM. Subsequent patches will add support for other functions required to
run a VM.
Signed-off-by: Srivatsa Vaddagiri
---
MAINTAINERS | 7 +++
accel/Kconfig | 3 +
IRQFD function allows registering of an @eventfd and @irq. @irq will be
injected inside guest when @eventfd is written into.
IOEVENTFD function allows registering an @eventfd and a guest physical
address, @addr, along with optional data. A poll() on @eventfd will be
woken up when guest attempts
These are some work-arounds required temporarily until some limitations
with Gunyah hypervisor are addressed.
Signed-off-by: Srivatsa Vaddagiri
---
accel/gunyah/gunyah-all.c | 18 ++
hw/arm/boot.c | 3 ++-
hw/arm/virt.c | 3 ++-
Gunyah hypervisor supports several APIs for a host VM to assign some of
its memory to the VM being created.
Lend - assigned memory is made private to VM (host loses access)
Share - assigned memory is shared between host and guest VM
No APIs exist however, at this time, for a protected VM
Add 'protected-vm' and 'preshmem-size' properties that can be specified
for a VM.
Protected VMs are those that have 'protected-vm' property set. Their
memory cannot be accessed by their (potentially untrusted) host. They
are useful to run secure applications whose data should remain private
to
Customize device-tree with Gunyah specific properties. Some of these
properties include specification of doorbells that need to be created
and associated with various interrupts.
Signed-off-by: Srivatsa Vaddagiri
---
hw/arm/virt.c | 11 ++
include/sysemu/gunyah.h | 7
On Thu, Oct 12, 2023 at 01:42:04AM +0900, Akihiko Odaki wrote:
> On 2023/10/12 1:21, Thomas Huth wrote:
> > On 11/10/2023 17.48, Akihiko Odaki wrote:
> > > On 2023/10/11 17:51, Daniel P. Berrangé wrote:
> > > > On Wed, Oct 11, 2023 at 04:03:09PM +0900, Akihiko Odaki wrote:
> > > > > Make
Now we retrieve the usable IOVA ranges from the host,
we now the physical IOMMU aperture and we can remove
the assumption of 64b IOVA space when calling
vfio_host_win_add().
This works fine in general but in case of an IOMMU memory
region this becomes more tricky. For instance the virtio-iommu
MR
OSPM evaluates _EVT method to map the event. The CPU hotplug event eventually
results in start of the CPU scan. Scan figures out the CPU and the kind of
event(plug/unplug) and notifies it back to the guest. Update the GED AML _EVT
method with the call to \\_SB.CPUS.CSCN
Also, macro
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
PCI and is IO port based and hence existing CPUs AML code assumes _CRS objects
would evaluate to a system resource which describes IO Port address. But on ARM
arch CPUs control device(\\_SB.PRES) register interface is
ACPI GED(as described in the ACPI 6.2 spec) can be used to generate ACPI events
when OSPM/guest receives an interrupt listed in the _CRS object of GED. OSPM
then maps or demultiplexes the event by evaluating _EVT method.
This change adds the support of CPU hotplug event initialization in the
ACPI GED shall be used to convey to the guest kernel about any CPU hot-(un)plug
events. Therefore, existing ACPI GED framework inside QEMU needs to be enhanced
to support CPU hotplug state and events.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
Reviewed-by:
ACPI CPU hotplug related initialization should only happen if ACPI_CPU_HOTPLUG
support has been enabled for particular architecture. Add cpu_hotplug_hw_init()
stub to avoid compilation break.
Signed-off-by: Salil Mehta
Reviewed-by: Jonathan Cameron
Reviewed-by: Gavin Shan
Reviewed-by: Shaoqin
In vfio_realize, on the error path, we currently call
vfio_detach_device() after a successful vfio_attach_device.
While this looks natural, vfio_instance_finalize also induces
a vfio_detach_device(), and it seems to be the right place
instead as other resources are released there which happen
to
On Wed, Oct 11, 2023 at 06:57:07PM +, Bernhard Beschow wrote:
>
>
> Am 8. Oktober 2023 17:56:48 UTC schrieb Chuck Zmudzinski :
> >On 10/7/23 8:38 AM, Bernhard Beschow wrote:
> >> This series consolidates the implementations of the PIIX3 and PIIX4 south
> >> bridges and makes PIIX4 usable in
On Wednesday, October 11, 2023 8:41 PM, Juan Quintela wrote:
> Wei Wang wrote:
> > Current migration_completion function is a bit long. Refactor the long
> > implementation into different subfunctions:
> > - migration_completion_precopy: completion code related to precopy
> > -
Akihiko Odaki writes:
> GDBFeatureBuilder unifies the logic to generate dynamic GDBFeature.
>
> Signed-off-by: Akihiko Odaki
> Reviewed-by: Richard Henderson
> ---
> include/exec/gdbstub.h | 20 ++
> gdbstub/gdbstub.c | 59 ++
> 2
On 2023/10/11 15:43, Akihiko Odaki wrote:
On 2023/10/10 16:56, Michael Tokarev wrote:
10.10.2023 05:59, Akihiko Odaki wrote:
The largest possible virtio-net header is struct virtio_net_hdr_v1_hash.
Fixes: fbbdbddec0 ("tap: allow extended virtio header with hash info")
Signed-off-by: Akihiko
On 11/10/2023 17.48, Akihiko Odaki wrote:
On 2023/10/11 17:51, Daniel P. Berrangé wrote:
On Wed, Oct 11, 2023 at 04:03:09PM +0900, Akihiko Odaki wrote:
Make qemu-plugin.h consumable for C++ platform.
Signed-off-by: Akihiko Odaki
---
docs/devel/tcg-plugins.rst | 4
meson.build
On Wed, 11 Oct 2023 16:23:35 +0530
Ani Sinha wrote:
> pc_get_device_memory_range() finds the device memory size by calculating the
> difference between maxram and ram sizes. This calculation makes sense only
> when
> maxram is greater than the ram size. Make sure we check for that before
>
On 10/5/23 22:41, Glenn Miles wrote:
Allow external devices to drive pca9552 input pins by adding
input GPIO's to the model. This allows a device to connect
its output GPIO's to the pca9552 input GPIO's.
In order for an external device to set the state of a pca9552
pin, the pin must first be
On Sun, 8 Oct 2023 01:47:39 +0530
wrote:
> From: Ankit Agrawal
>
> ACPI spec provides a scheme to associate "Generic Initiators" [1]
> (e.g. heterogeneous processors and accelerators, GPUs, and I/O devices with
> integrated compute or DMA engines GPUs) with Proximity Domains. This is
>
A reserved region is a range tagged with a type. Let's directly use
the Range type in the prospect to reuse some of the library helpers
shipped with the Range type.
Signed-off-by: Eric Auger
Reviewed-by: David Hildenbrand
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
---
Collect iova range information if VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE
capability is supported.
This allows to propagate the information though the IOMMU MR
set_iova_ranges() callback so that virtual IOMMUs
get aware of those aperture constraints. This is only done if
the info is available and
'rs' is not used in that function. It's a leftover from commit
9360447d34 ("ram: Use MigrationStats for statistics").
Reviewed-by: Peter Xu
Signed-off-by: Fabiano Rosas
---
migration/ram.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/migration/ram.c
It makes a bit more sense to have the zero page handling of xbzrle
right where we save the zero page.
Also invert the exit condition to remove one level of indentation
which makes the next patch easier to grasp.
Reviewed-by: Peter Xu
Signed-off-by: Fabiano Rosas
---
migration/ram.c | 35
Add basic tests for file-based migration.
Note that we cannot use test_precopy_common because that routine
expects it to be possible to run the migration live. With the file
transport there is no live migration because we must wait for the
source to finish writing the migration data to the file
We don't need to do this in two pieces. One single function makes it
easier to grasp, specially since it removes the indirection on the
return value handling.
Reviewed-by: Peter Xu
Signed-off-by: Fabiano Rosas
---
migration/ram.c | 46 +-
1 file
From: Nikolay Borisov
Extract the ramblock parsing code into a routine that operates on the
sequence of headers from the stream and another the parses the
individual ramblock. This makes ram_load_precopy() easier to
comprehend.
Signed-off-by: Nikolay Borisov
Reviewed-by: Philippe Mathieu-Daudé
We don't need the QEMUFile when we're already passing the
PageSearchStatus.
Reviewed-by: Peter Xu
Signed-off-by: Fabiano Rosas
---
migration/ram.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/migration/ram.c b/migration/ram.c
index cd765212af..c8474f6fd8
We've found the source of flakiness in this test, so re-enable it.
Reviewed-by: Juan Quintela
Signed-off-by: Fabiano Rosas
---
tests/qtest/migration-test.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c
Am 8. Oktober 2023 17:56:48 UTC schrieb Chuck Zmudzinski :
>On 10/7/23 8:38 AM, Bernhard Beschow wrote:
>> This series consolidates the implementations of the PIIX3 and PIIX4 south
>> bridges and makes PIIX4 usable in the PC machine via an experimental command
>> line parameter. The motivation
On Wed, 2023-10-11 at 19:05 +0200, Cédric Le Goater wrote:
> On 10/5/23 22:41, Glenn Miles wrote:
> > Allow external devices to drive pca9552 input pins by adding
> > input GPIO's to the model. This allows a device to connect
> > its output GPIO's to the pca9552 input GPIO's.
> >
> > In order
On Wed, Oct 11, 2023 at 05:44:28PM +0300, Michael Tokarev wrote:
> 11.10.2023 16:12, Niklas Cassel wrote:
> > From: Niklas Cassel
> >
> > According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set,
> > we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ
> > unconditionally,
More closely follow the QEMU style by returning an Error and propagating
it there is an error relating to the PMU setup.
Further simplify the function by removing the num_counters parameter as
this is available from the passed in cpu pointer.
Signed-off-by: Rob Bradford
Reviewed-by: Alistair
Add 32-bit version of mask generating macro and use it in the RISC-V PMU
code.
Signed-off-by: Rob Bradford
---
include/qemu/bitops.h | 3 +++
target/riscv/pmu.c| 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index
On 06/10/2023 14.39, Fabiano Rosas wrote:
Add a version of qtest_init() that takes an environment variable
containing the path of the QEMU binary. This allows tests to use more
than one QEMU binary.
If no variable is provided or the environment variable does not exist,
that is not an error.
On 06/10/2023 14.39, Fabiano Rosas wrote:
We're adding support for testing migration using two different QEMU
binaries. We'll provide the second binary in a new environment
variable.
Allow qtest_qemu_binary() to receive the name of the new variable. If
the new environment variable is not set,
On 06/10/2023 14.39, Fabiano Rosas wrote:
The migration tests are being enhanced to test migration between
different QEMU versions. A requirement of migration is that the
machine type between source and destination matches, including the
version.
We cannot hardcode machine types in the tests
It was necessary since an Linux older than 2.6.35 may implement the
virtio-net header but may not allow to change its length. Remove it
since such an old Linux is no longer supported.
Signed-off-by: Akihiko Odaki
---
net/tap_int.h | 1 -
net/tap-bsd.c | 5 -
net/tap-linux.c | 20
vhost requires eBPF for RSS. Even when eBPF is not available, virtio-net
reported RSS availability, and raised a warning only after the
guest requested RSS, and the guest could not know that RSS is not
available.
Check RSS availability during device realization and return an error
if RSS is
Since qemu_set_vnet_hdr_len() is always called when
qemu_using_vnet_hdr() is called, we can merge them and save some code.
For consistency, express that the virtio-net header is not in use by
returning 0 with qemu_get_vnet_hdr_len() instead of having a dedicated
function,
This series contains fixes and improvements for virtio-net RSS and hash
reporting feature.
V2 -> V3:
Added patch "tap: Remove tap_probe_vnet_hdr_len()".
Added patch "tap: Remove qemu_using_vnet_hdr()".
Added patch "net: Move virtio-net header length assertion".
Added patch "net: Remove
calculate_rss_hash() was using hash value 0 to tell if it calculated
a hash, but the hash value may be 0 on a rare occasion. Have a
distinct bool value for correctness.
Fixes: f3fa412de2 ("ebpf: Added eBPF RSS program.")
Signed-off-by: Akihiko Odaki
---
tools/ebpf/rss.bpf.c | 20
Even if eBPF is not available, virtio-net can perform RSS on the
user-space if vhost is disabled although such a configuration results in
a warning. If vhost is enabled, the configuration will be rejected when
realizing the device. Therefore, VIRTIO_NET_F_RSS should not be cleared
even if eBPF is
Akihiko Odaki writes:
> MISA limits are common for all instances of a RISC-V CPU class so they
> are better put into class.
>
> Signed-off-by: Akihiko Odaki
> ---
> +static void riscv_host_cpu_init(Object *obj)
> +{
> +CPURISCVState *env = _CPU(obj)->env;
>
On 11/10/2023 17.38, Stefan Hajnoczi wrote:
On Wed, 11 Oct 2023 at 07:23, Michael Tokarev wrote:
From: Peter Maydell
In query_port() we pass the address of a local pvrdma_port_attr
struct to the rdma_query_backend_port() function. Unfortunately,
rdma_backend_query_port() wants a pointer to
Gunyah is an open-source Type-1 hypervisor, that is currently supported on ARM64
architecture. Source code for it can be obtained from:
https://github.com/quic/gunyah-hypervisor.
This patch series adds support for Gunyah hypervisor via a new
accelerator option, 'gunyah'. This patch series is
gunyah.h containts UAPI definitions exported by Gunyah Linux kernel
driver. This file will be referenced by Gunyah accelerator driver in
Qemu.
Note: Gunyah Linux kernel driver is not yet merged in Linux kernel.
v14 of the patch series has been posted on mailing lists.
next_packet_size name is a bit misleading, so add more comments
where its defined.
We send data in two chunks in multifd thread:
- send the packet with normal (non-zero) guest pages offsets that are
dirty.
This uses the packet_len and we increment number of packets
for this thread that
Hi, this is a resend of a few patches that lingered behind in the past
months. They are all reviewed and tested.
patch 1 is the test for the file transport which missed the last pull;
patches 2-6 are two small refactorings to ram.c that are prerequisite
for the fixed ram work;
patch 7 enables
Hello
While working and testing various live migration scenarios,
a few issues were found.
This is the version 2 of the changes with few non-functional
modifications minus the dropped patch.
I have dropped the patch [1/4] since the discussion with Fabiano
and his proposed changes:
Virtual CPU hotplug support is being added across various architectures[1][3].
This series adds various code bits common across all architectures:
1. vCPU creation and Parking code refactor [Patch 1]
2. Update ACPI GED framework to support vCPU Hotplug [Patch 4,6,7]
3. ACPI CPUs AML code change
KVM vCPU creation is done once during the initialization of the VM when Qemu
thread is spawned. This is common to all the architectures.
Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the
corresponding KVM vCPU object in the Host KVM is not destroyed and its
CPU ctrl-dev MMIO region length could be used in ACPI GED and various other
architecture specific places. Move ACPI_CPU_HOTPLUG_REG_LEN macro to more
appropriate common header file.
Signed-off-by: Salil Mehta
Reviewed-by: Alex Bennée
Reviewed-by: Jonathan Cameron
Reviewed-by: Gavin Shan
While netmap implements virtio-net header, it does not implement
receive_raw(). Instead of implementing receive_raw for netmap, add
virtio-net headers in the common code and use receive_iov()/receive()
instead. This also fixes the buffer size for the virtio-net header.
Fixes: fbbdbddec0 ("tap:
RSS is disabled by default.
Fixes: 590790297c ("virtio-net: implement RSS configuration command")
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 70 +++--
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a/hw/net/virtio-net.c
The code to attach or detach the eBPF program to RSS were duplicated so
unify them into one function to save some code.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 90 ++---
1 file changed, 36 insertions(+), 54 deletions(-)
diff --git
The virtio-net header length assertion should happen for any clients.
Signed-off-by: Akihiko Odaki
---
net/net.c | 5 +
net/tap.c | 3 ---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/net/net.c b/net/net.c
index 1bb4f33a63..6d2fa8d40f 100644
--- a/net/net.c
+++ b/net/net.c
On 2023/10/11 17:51, Daniel P. Berrangé wrote:
On Wed, Oct 11, 2023 at 04:03:09PM +0900, Akihiko Odaki wrote:
Make qemu-plugin.h consumable for C++ platform.
Signed-off-by: Akihiko Odaki
---
docs/devel/tcg-plugins.rst | 4
meson.build| 2 +-
Hi Vladimir,
On Fri, Oct 6, 2023 at 5:08 PM Vladimir Isaev
wrote:
>
> Hi Mayuresh,
>
> 25.09.2023 14:09, Mayuresh Chitale wrote:
> > As per the Priv and Smepmp specifications, certain bits such as the 'L'
> > bit of pmp entries and mseccfg.MML can only be cleared upon reset and it
> > is
Add unit tests for both resv_region_list_insert() and
range_inverse_array().
Signed-off-by: Eric Auger
---
v2 -> v3:
- conversion to new GList based protos
---
tests/unit/test-resv-mem.c | 318 +
tests/unit/meson.build | 1 +
2 files changed, 319
This helper will allow to convey information about valid
IOVA ranges to virtual IOMMUS.
Signed-off-by: Eric Auger
---
v2 -> v3:
- Pass a Glist instead
- Added a comment on memory_region_iommu_set_iova_ranges
- Removed R-b due to that change
---
include/exec/memory.h | 30
This helper reverses a list of regions within a [low, high]
span, turning original regions into holes and original
holes into actual regions, covering the whole UINT64_MAX span.
Signed-off-by: Eric Auger
---
v2 -> v3:
- now operate on GList's. Fix the commit msg by mentionning
low/high
Fabiano Rosas wrote:
> Juan Quintela writes:
>
>> From: Fabiano Rosas
>>
>> There is currently no way to write a test for errors that happened in
>> qmp_migrate before the migration has started.
>>
>> Add a version of qmp_migrate that ensures an error happens. To make
>> use of it a test needs
"Wang, Wei W" wrote:
> On Wednesday, October 11, 2023 8:41 PM, Juan Quintela wrote:
>> Wei Wang wrote:
>> > Current migration_completion function is a bit long. Refactor the long
>> > implementation into different subfunctions:
>> > - migration_completion_precopy: completion code related to
11.10.2023 16:12, Niklas Cassel wrote:
From: Niklas Cassel
According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set,
we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ
unconditionally, regardless if the I bit is set in the FIS or not.
Thus, we should never raise a normal
Paolo Bonzini writes:
> Commit a908985971a ("target/i386/seg_helper: introduce tss_set_busy",
> 2023-09-26) failed to use the tss_selector argument of the new function,
> which was therefore unused.
>
> This shows up as a #GP fault when booting old versions of 32-bit
> Linux.
>
> Fixes:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
An APB-to-OPB bridge enabling access to the OPB from the ARM core in
the AST2600. Hardware limitations prevent the OPB from being directly
mapped into APB, so all accesses are indirect through the bridge.
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
This commit models the FSI bus. CFAM is hanging out of FSI bus. The bus
is model such a way that it is embedded inside the FSI master which is a
bus controller.
The FSI master: A controller in the platform service
tap prepends a zeroed virtio-net header when writing a packet to a
tap with virtio-net header enabled but not in use. This only happens
when s->host_vnet_hdr_len == sizeof(struct virtio_net_hdr).
Signed-off-by: Akihiko Odaki
---
net/tap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
It is necessary to copy the header only for byte swapping. Worse, when
byte swapping is not needed, the header can be larger than the buffer
due to VIRTIO_NET_F_HASH_REPORT, which results in buffer overflow.
Copy the header only when byte swapping is needed.
Fixes: e22f0603fb ("virtio-net:
Akihiko Odaki writes:
> Simplify GDBRegisterState by replacing num_regs and xml members with
> one member that points to GDBFeature.
>
> Signed-off-by: Akihiko Odaki
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Hi Alex,
On 9/20/23 22:02, Alex Williamson wrote:
> On Wed, 13 Sep 2023 10:01:47 +0200
> Eric Auger wrote:
>
>> Now we retrieve the usable IOVA ranges from the host,
>> we now the physical IOMMU aperture and we can remove
>> the assumption of 64b IOVA space when calling
>> vfio_host_win_add().
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Elena Ufimtseva writes:
> next_packet_size name is a bit misleading, so add more comments
> where its defined.
> We send data in two chunks in multifd thread:
> - send the packet with normal (non-zero) guest pages offsets that are
>dirty.
>This uses the packet_len and we increment
On Wed, 2023-10-11 at 16:27 +0200, Cédric Le Goater wrote:
> On 9/27/23 22:32, Glenn Miles wrote:
> > The pca9552 INPUT0 and INPUT1 registers are supposed to
> > hold the logical values of the LED pins. A logical 0
> > should be seen in the INPUT0/1 registers for a pin when
> > its corresponding
Daniel P. Berrangé writes:
> On Wed, Oct 11, 2023 at 04:28:41PM +0200, Juan Quintela wrote:
>> Fabiano Rosas wrote:
>> > Stop relying on defaults and select a machine explicitly for every
>> > architecture.
>> >
>> > This is a prerequisite for being able to select machine types for
>> >
Added basic qtests for FSI model.
Signed-off-by: Ninad Palsule
---
v3:
- Added new qtest as per Cedric's comment.
V4:
- Remove MAINTAINER and documentation changes from this commit
---
tests/qtest/fsi-test.c | 210
tests/qtest/meson.build | 2 +
2
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in
POWER processors. This now makes an appearance in the ASPEED SoC due
to tight integration of the FSI master IP with the OPB, mainly the
existence
On Thu, 5 Oct 2023, Philippe Mathieu-Daudé wrote:
On 5/10/23 20:18, BALATON Zoltan wrote:
It is used by other machines not just fuloong2e so put it in a
separate section and add myself as reviewer.
Forgot to cc qemu-trivial. I thought maybe Philippe takes this but there
were a bunch of these
On Wed, Oct 11, 2023 at 8:45 AM Alistair Francis wrote:
>
> On Mon, Sep 25, 2023 at 9:08 PM Mayuresh Chitale
> wrote:
> >
> > From: Himanshu Chauhan
> >
> > Smepmp is a ratified extension which qemu refers to as epmp.
> > Rename epmp to smepmp and add it to extension list so that
> > it is
On Mon, Oct 9, 2023 at 6:56 AM Alistair Francis wrote:
>
> On Mon, Sep 25, 2023 at 9:11 PM Mayuresh Chitale
> wrote:
> >
> > As per the Priv spec: "The R, W, and X fields form a collective WARL
> > field for which the combinations with R=0 and W=1 are reserved."
> > However currently such writes
Akihiko Odaki writes:
> MISA limits are common for all instances of a RISC-V CPU class so they
> are better put into class.
>
> Signed-off-by: Akihiko Odaki
> ---
> target/riscv/cpu-qom.h | 2 +
> target/riscv/cpu.h | 2 -
> hw/riscv/boot.c | 2 +-
> target/riscv/cpu.c
Gunyah hypervisor supports emulation of a GICv3 compatible interrupt
controller. Emulation is handled by hypervisor itself, with Qemu being
allowed to specify some of the properties such as IO address at which
GICv3 should be mapped in guest address space. These properties are
conveyed to
Hello Thomas,
Thanks for the review.
On 10/11/23 10:35, Thomas Huth wrote:
On 11/10/2023 17.13, Ninad Palsule wrote:
Added basic qtests for FSI model.
Signed-off-by: Ninad Palsule
---
v3:
- Added new qtest as per Cedric's comment.
V4:
- Remove MAINTAINER and documentation changes from
Add gunyah.rst that provide some informaiton on how to build and test
'gunyah' accelerator with open-source Gunyah hypervisor.
Signed-off-by: Srivatsa Vaddagiri
---
MAINTAINERS| 1 +
docs/system/arm/gunyah.rst | 214 +
2 files changed, 215
PCI functions are plugged on a PCI bus. They can only access
external memory regions via the bus.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/lpc_ich9.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index
PCI functions are plugged on a PCI bus. They can only access
external memory regions via the bus.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sparc64/sun4u.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index
Hi Vishnu
On 11/10/2023 12:08, Vishnu Pajjuri wrote:
Hi Salil,
On 11-10-2023 16:02, Salil Mehta wrote:
[...]
From: Vishnu Pajjuri
Sent: Wednesday, October 11, 2023 11:23 AM
To: Salil Mehta;qemu-devel@nongnu.org; qemu-
a...@nongnu.org
Cc:m...@kernel.org;jean-phili...@linaro.org; Jonathan
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