On 17/10/2023 15:01, Philippe Mathieu-Daudé wrote:
Access QOM parent with the proper QOM VIRTIO_DEVICE() macro.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/display/virtio-gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/display/virtio-gpu.c
On Tue, 17 Oct 2023, Helge Deller wrote:
On 10/17/23 21:19, BALATON Zoltan wrote:
On Tue, 17 Oct 2023, Helge Deller wrote:
On 10/17/23 18:13, BALATON Zoltan wrote:
On Tue, 17 Oct 2023, del...@kernel.org wrote:
From: Helge Deller
Signed-off-by: Helge Deller
---
hw/net/tulip.c | 2
On Fri, Oct 13, 2023 at 10:56:27AM +0300, Emmanouil Pitsidianakis wrote:
> /* resubmitted because git-send-email crashed with previous attempt */
>
> Hello,
>
> This RFC is inspired by the kernel's move to -Wimplicit-fallthrough=3
> back in 2019.[0]
> We take one step (or two) further by
Wires up four I2C controller instances to the powernv10 chip
XSCOM address space.
Each controller instance is wired up to two I2C buses of
its own. No other I2C devices are connected to the buses
at this time.
Signed-off-by: Glenn Miles
---
Based-on:
On 10/14/23 03:01, Paolo Bonzini wrote:
Use MO_SIGN to indicate signed vs. unsigned extension, and filter out
bits other than MO_SIGN and MO_SIZE.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 30 +++---
1 file changed, 15 insertions(+), 15
Hi Cédric,
>-Original Message-
>From: Cédric Le Goater
>Sent: Tuesday, October 17, 2023 11:51 PM
>Subject: Re: [PATCH v2 02/27] vfio: Introduce base object for VFIOContainer and
>targetted interface
>
>On 10/16/23 10:31, Zhenzhong Duan wrote:
>> From: Eric Auger
>>
>> Introduce a dumb
On Wed, 2023-08-23 at 11:37 -0400, Peter Xu wrote:
> On Wed, Aug 23, 2023 at 01:23:25PM +0100, David Woodhouse wrote:
> > From: David Woodhouse
> >
> > A generic X86IOMMUClass->int_remap function should not return VT-d
> > specific values; fix it to return 0 if the interrupt was successfully
> >
On Tue, 2023-10-17 at 17:28 -0400, Michael S. Tsirkin wrote:
> On Tue, Oct 17, 2023 at 10:19:55PM +0100, David Woodhouse wrote:
> > On Wed, 2023-08-23 at 11:37 -0400, Peter Xu wrote:
> > > On Wed, Aug 23, 2023 at 01:23:25PM +0100, David Woodhouse wrote:
> > > > From: David Woodhouse
> > > >
> >
On Tue, 17 Oct 2023, Mark Cave-Ayland wrote:
On 16/10/2023 23:16, BALATON Zoltan wrote:
On Sun, 15 Oct 2023, Mark Cave-Ayland wrote:
On 14/10/2023 17:13, BALATON Zoltan wrote:
On Sat, 14 Oct 2023, Mark Cave-Ayland wrote:
Using the portio_list*() APIs really is the right way to implement this
From: Nabih Estefan Diaz
- Implementation of Transmit function for packets
- Implementation for reading and writing from and to descriptors in
memory for Tx
NOTE: This function implements the steps detailed in the datasheet for
transmitting messages from the GMAC.
Signed-off-by: Nabih
From: Nabih Estefan Diaz
- Created qtest to check initialization of registers in GMAC Module.
- Implemented test into Build File.
Signed-off-by: Nabih Estefan Diaz
---
tests/qtest/meson.build | 11 +-
tests/qtest/npcm_gmac-test.c | 209 +++
2 files
From: Nabih Estefan Diaz
- Implementation of Receive function for packets
- Implementation for reading and writing from and to descriptors in
memory for Rx
NOTE: At this point in development we believe this function is working
as intended, and the kernel supports these findings, but we need
From: Hao Wu
The PCI Mailbox Module is a high-bandwidth communcation module
between a Nuvoton BMC and CPU. It features 16KB RAM that are both
accessible by the BMC and core CPU. and supports interrupt for
both sides.
This patch implements the BMC side of the PCI mailbox module.
Communication
From: Hao Wu
This patch implements the basic registers of GMAC device. Actual network
communications are not supported yet.
Signed-off-by: Hao Wu
include/hw: Fix type problem in NPCMGMACState
- Fix type problem in NPCMGMACState
- Fix Register Initalization which was breaking boot-up in
From: Hao Wu
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx.c | 36 ++--
include/hw/arm/npcm7xx.h | 2 ++
2 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index c9e87162cb..12e11250e1 100644
---
From: Nabih Estefan Diaz
- General GMAC Register handling
- GMAC IRQ Handling
- Added traces in some methods for debugging
- Lots of declarations for accessing information on GMAC Descriptors
(npcm_gmac.h file)
NOTE: With code on this state, the GMAC can boot-up properly and will show up
in
From: Hao Wu
This patches adds a qtest for NPCM7XX PCI Mailbox module.
It sends read and write requests to the module, and verifies that
the module contains the correct data after the requests.
Signed-off-by: Hao Wu
---
tests/qtest/meson.build | 1 +
On Tue, Oct 17, 2023 at 4:04 PM Nabih Estefan
wrote:
> From: Nabih Estefan Diaz
>
> - Implemeted classes for GMAC Receive and Transmit Descriptors
> - Implemented Masks for said descriptors
>
> Signed-off-by: Nabih Estefan Diaz
>
Reviewed-by: Hao Wu
> ---
> hw/net/npcm_gmac.c |
On 17/10/2023 15:01, Philippe Mathieu-Daudé wrote:
Access QOM parent with the proper QOM [VIRTIO_]DEVICE() macros.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/vhost-user-blk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/block/vhost-user-blk.c
On 17/10/2023 14:50, Philippe Mathieu-Daudé wrote:
pcspk_init() is a legacy init function, inline and remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/audio/pcspk.h | 10 --
hw/i386/pc.c | 3 ++-
hw/isa/i82378.c | 5 -
hw/mips/jazz.c
Am 19.09.2023 um 18:57 hat Andrey Drobyshev geschrieben:
> v2 --> v3:
> * Patch 3/8: fixed logic in the if statement, so that we align on blk
>when blk_old_backing == NULL;
> * Patch 4/8: comment fix;
> * Patch 5/8: comment fix; dropped redundant "if (blk_new_backing)"
>statements.
>
>
Replace register defines with the REG32 macro from registerfields.h in
the Cadence GEM device.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 527 +--
1 file changed, 261 insertions(+), 266 deletions(-)
diff --git a/hw/net/cadence_gem.c
The CRC was stored in an unsigned variable in gem_receive. Change it for
a uint32_t to ensure we have the correct variable size here.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/cadence_gem.c
Use de FIELD macro to describe the DMACFG register fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 48
1 file changed, 31 insertions(+), 17 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index
Use de FIELD macro to describe the IRQ related register fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 51 +---
1 file changed, 39 insertions(+), 12 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index
Now we have a Error** passed into the return path thread stack, which is
even clearer than an int retval. Change ram_dirty_bitmap_reload() and the
callers to use a bool instead to replace errnos.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Xu
---
migration/ram.h | 2 +-
The MDIO access is done only on a write to the PHYMNTNC register. A
subsequent read is used to retrieve the result but does not trigger an
MDIO access by itself.
Refactor the PHY access logic to perform all accesses (MDIO reads and
writes) at PHYMNTNC write time.
Signed-off-by: Luc Michel
---
Normally the postcopy recover phase should only exist for a super short
period, that's the duration when QEMU is trying to recover from an
interrupted postcopy migration, during which handshake will be carried out
for continuing the procedure with state changes from PAUSED -> RECOVER ->
v4:
- Some patches merged, reposting the rest patches
- Fixed a bug in the new test case reported by Fabiano
- Try to keep close_return_path_on_source() return a value (even though it
still fetches from migrate_has_error)
- Two more patches added to cleanup retval of rp thread functions
v1:
Use de FIELD macro to describe the TXSTATUS and RXSTATUS register
fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 34 +-
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index
Juan Quintela wrote:
> Use blocked-mirror with NBD instead.
>
> Signed-off-by: Juan Quintela
> Acked-by: Stefan Hajnoczi
> Reviewed-by: Thomas Huth
> Reviewed-by: Markus Armbruster
Hi Kevin and Stefan
Can we change the iotest output to fix this?
On 10/14/23 03:01, Paolo Bonzini wrote:
The new decoder likes to compute the address in A0 very early, so the
gen_lea_v_seg in gen_pop_T0 would clobber the address of the memory
operand. Instead use T0 since it is already available and will be
overwritten immediately after.
Signed-off-by:
On 17/10/2023 15:01, Philippe Mathieu-Daudé wrote:
Access QOM parent with the proper QOM VIRTIO_SCSI_COMMON() macro.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/scsi/virtio-scsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/virtio-scsi.c
Hi Marc-André,
> Hi
>
> On Fri, Oct 13, 2023 at 2:51 AM Dongwon Kim
> wrote:
> >
> > When turning on or off full-screen menu, all detached windows should
> > be full-screened or un-full-screened altogether.
>
> I am not convinced this is desirable. Not only having multiple fullscreen
>
You have an extra "\" in the title.
On Tue, Oct 17, 2023 at 4:04 PM Nabih Estefan
wrote:
> From: Nabih Estefan Diaz
>
> - Created qtest to check initialization of registers in GMAC Module.
> - Implemented test into Build File.
>
> Signed-off-by: Nabih Estefan Diaz
> ---
>
On 10/14/23 03:01, Paolo Bonzini wrote:
@@ -224,6 +233,8 @@ struct X86OpEntry {
unsigned vex_class:8;
X86VEXSpecial vex_special:8;
uint16_t valid_prefix:16;
+uint8_t check:8;
+uint8_t intercept:8;
bool is_decode:1;
};
Unless you have
On 17/10/2023 14:12, Philippe Mathieu-Daudé wrote:
Access to QemuInputHandlerState::handler are read-only.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/virtio/virtio-input.h | 2 +-
include/ui/input.h | 2 +-
chardev/msmouse.c| 2 +-
rp_state.error was a boolean used to show error happened in return path
thread. That's not only duplicating error reporting (migrate_set_error),
but also not good enough in that we only do error_report() and set it to
true, we never can keep a history of the exact error and show it in
Hi,
This series brings small changes to the Cadence GEM Ethernet model.
There is (almost) no behaviour change.
Patches 1 to 9 replace handcrafted defines with the use of REG32 and
FIELDS macros for register and fields declarations.
Patch 10 fixes PHY accesses so that they are done only on a
Use de FIELD macro to describe the NWCFG register fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 60
1 file changed, 39 insertions(+), 21 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index
Describe screening registers fields using the FIELD macros.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 92 ++--
1 file changed, 47 insertions(+), 45 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index
Use the FIELD macro to describe the PHYMNTNC register fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 955a8da134..4c5fe10316 100644
---
Use the FIELD macro to describe the DESCONF6 register fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 6d084a3b31..955a8da134 100644
--- a/hw/net/cadence_gem.c
+++
Use the FIELD macro to describe the NWCTRL register fields.
Signed-off-by: Luc Michel
---
hw/net/cadence_gem.c | 53 +---
1 file changed, 40 insertions(+), 13 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index
From: Fabiano Rosas
To do so, create two paired sockets, but make them not providing real data.
Feed those fake sockets to src/dst QEMUs for recovery to let them go into
RECOVER stage without going out. Test that we can always kick it out and
recover again with the right ports.
This patch is
After we have errp which contains the more detailed error message, make
ram_save_queue_pages() returns bool in its stack.
Signed-off-by: Peter Xu
---
migration/ram.h | 4 ++--
migration/migration.c | 16
migration/ram.c | 18 +-
3 files changed, 19
On 17/10/2023 07:11, Richard Henderson wrote:
While doing some other testing the other day, I noticed my sparc64
chroot running particularly slowly. I think I know what the problem
is there, but fixing that was going to be particularly ugly with the
existing sparc translator.
So I've
On Wed, 2023-08-30 at 21:20 +0100, David Woodhouse wrote:
> From: David Woodhouse
>
> The interrupt from timer 0 in legacy mode is supposed to go to IRQ 0 on
> the i8259 and IRQ 2 on the I/O APIC. The generic x86 GSI handling can't
> cope with IRQ numbers differing between the two chips (despite
From: Hao Wu
This patch wires the PCI mailbox module to Nuvoton SoC.
Google-Rebase-Count: 5
Google-Bug-Id: 262938292
Signed-off-by: Hao Wu
Change-Id: Ifd858a7ed760557faa15a7a1cef66b2056f06e2e
---
docs/system/arm/nuvoton.rst | 2 ++
hw/arm/npcm7xx.c| 3 ++-
include/hw/arm/npcm7xx.h
On 10/14/23 03:01, Paolo Bonzini wrote:
Some instructions use YMM0 implicitly, or use YMM9 as a read-modify-write
register destination. Initialize those registers as well.
Signed-off-by: Paolo Bonzini
Reviewed-by: Richard Henderson
r~
>-Original Message-
>From: Cédric Le Goater
>Sent: Tuesday, October 17, 2023 11:51 PM
>Subject: Re: [PATCH v2 01/27] vfio: Rename VFIOContainer into
>VFIOLegacyContainer
>
>Hello,
>
>On 10/16/23 10:31, Zhenzhong Duan wrote:
>> From: Eric Auger
>>
>> In the prospect to introduce a base
David,
On 7/6/2023 3:56 PM, David Hildenbrand wrote:
ram_block_discard_range() cannot possibly do the right thing in
MAP_PRIVATE file mappings in the general case.
To achieve the documented semantics, we also have to punch a hole into
the file, possibly messing with other
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Tuesday, October 10, 2023 12:23 AM
> To: Brian Cain ; richard.hender...@linaro.org;
> a...@rev.ng
> Cc: arm...@redhat.com; peter.mayd...@linaro.org; Matheus Bernardino
> (QUIC) ; stefa...@redhat.com; a...@rev.ng;
> Marco Liebel
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