On 1/15/2024 11:18 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 03:45:58PM +0800, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 15:45:58 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 10/16] i386/cpu: Introduce cluster-id to X86CPU
On 1/15/2024 1:59 PM, Zhao Liu wrote:
(Also cc
On Mon, Jan 15, 2024 at 12:36 AM Troy Lee wrote:
>
> Hi Stephen and Cedric,
>
> This issue haven't been found in real platform but sometime happens in
> emulator, e.g. Simic.
Do you have a workaround that you use in other simulators that we
could also try using in QEMU?
> > Adding Aspeed
On 1/15/24 20:14, Richard Henderson wrote:
On 1/16/24 09:25, Daniel Henrique Barboza wrote:
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/cpu.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index
Reviewed-by: Konstantin Kostiuk
On Wed, Jan 3, 2024 at 7:34 PM Philippe Mathieu-Daudé
wrote:
> On 3/1/24 17:51, Samuel Tardieu wrote:
> > guest-exec invocation does not need the full path of the executable to
> > execute. Using only the command names ensures correct execution of the
> > test
Peter Xu writes:
> On Mon, Nov 27, 2023 at 05:25:57PM -0300, Fabiano Rosas wrote:
>> For the upcoming support to fixed-ram migration with multifd, we need
>> to be able to accept an iovec array with non-contiguous data.
>>
>> Add a pwritev and preadv version that splits the array into
On Tue, Jan 09, 2024 at 07:17:17PM +0100, Kevin Wolf wrote:
> Commit ff32bb53 tried to get minimal struct support into the string
> output visitor by just making it return "". Unfortunately, it
> forgot that the caller will still make more visitor calls for the
> content of the struct.
>
> If the
On 12/1/24 22:33, Fabiano Rosas wrote:
Philippe Mathieu-Daudé writes:
Move the 'has_el2' and 'has_el3' properties to the abstract
QOM parent.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/cpu/cortex_mpcore.h | 5 +
hw/arm/exynos4210.c| 10 --
On 1/17/24 02:50, Bin Meng wrote:
Some ELF files really do have segments of zero size, e.g.:
Program Headers:
Type Offset VirtAddr PhysAddr
FileSizMemSiz Flags Align
RISCV_ATTRIBUT 0x25b8
On Tue, 16 Jan 2024 at 16:20, Philippe Mathieu-Daudé wrote:
>
> On 13/1/24 14:36, Peter Maydell wrote:
> > On Wed, 10 Jan 2024 at 19:53, Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Since v2 [2]:
> >> - Dropped "Simplify checking A64_MTE bit in FEATURE_ID register"
> >> - Correct
On Fri, Dec 29, 2023 at 2:10 PM Stefan Hajnoczi wrote:
> > First, performance: since some years ago, since prior to qemu 6.2 until
> > latest 8.2, win10 and win11 vms always worked slower than expected. This
> > could be noticed by comparing booting/starting times between vm and a
> > bare metal
The common.qemu bash functions allow tests to interact with the QMP
monitor of a QEMU process. I spent two days trying to update 141 when
the order of the test output changed, but found it would still fail
occassionally because printf() and QMP events race with synchronous QMP
communication.
I
Several bugs have been reported related to how QMP commands are rescheduled in
qemu_aio_context:
- https://gitlab.com/qemu-project/qemu/-/issues/1933
- https://issues.redhat.com/browse/RHEL-17369
- https://bugzilla.redhat.com/show_bug.cgi?id=2215192
-
Hello Cedric,
[ clg: - move FSICFAMState object under FSIMasterState
- introduced fsi_master_init()
- reworked fsi_master_realize()
- dropped FSIBus definition ]
Move the list down before my S-o-b.
Done.
Signed-off-by: Andrew Jeffery
Reviewed-by: Joel Stanley
By default, the timeout to receive any specified event from the QEMU VM is 60
seconds set by the python avocado test framework. Please see event_wait() and
events_wait() in python/qemu/machine/machine.py. If the matching event is not
triggered within that interval, an asyncio.TimeoutError is
Reviewed-by: Konstantin Kostiuk
On Wed, Jan 10, 2024 at 9:42 AM Peng Ji wrote:
> ping !
> please review this patch :
> https://patchew.org/QEMU/20231227071540.4035803-1-peng...@smartx.com/
>
> thanks
>
>
>
> On Fri, Jan 5, 2024 at 9:47 PM Philippe Mathieu-Daudé
> wrote:
>
>> On 27/12/23
Peter Xu writes:
> On Mon, Nov 27, 2023 at 05:26:00PM -0300, Fabiano Rosas wrote:
>> Currently multifd does not need to have knowledge of pages on the
>> receiving side because all the information needed is within the
>> packets that come in the stream.
>>
>> We're about to add support to
On 1/15/2024 1:44 AM, Peter Xu wrote:
> On Fri, Jan 12, 2024 at 07:05:02AM -0800, Steve Sistare wrote:
>> Change all migration notifiers to type NotifierWithReturn, so notifiers
>> can return an error status in a future patch. For now, pass NULL for the
>> notifier error parameter, and do not
On 1/15/2024 2:37 AM, Peter Xu wrote:
> On Fri, Jan 12, 2024 at 07:05:07AM -0800, Steve Sistare wrote:
>> Move common code for the error path in migrate_fd_connect to a shared
>> fail label. No functional change.
>>
>> Signed-off-by: Steve Sistare
>
> Reviewed-by: Peter Xu
>
> One nitpick
On 1/12/2024 4:38 PM, Alex Williamson wrote:
> On Fri, 12 Jan 2024 07:04:59 -0800
> Steve Sistare wrote:
>
>> Allow cpr-reboot for vfio if the guest is in the suspended runstate. The
>> guest drivers' suspend methods flush outstanding requests and re-initialize
>> the devices, and thus there is
On 1/15/2024 1:48 AM, Peter Xu wrote:
> On Fri, Jan 12, 2024 at 07:05:03AM -0800, Steve Sistare wrote:
>> bool migration_in_incoming_postcopy(void)
>> diff --git a/ui/spice-core.c b/ui/spice-core.c
>> index b3cd229..e43a93f 100644
>> --- a/ui/spice-core.c
>> +++ b/ui/spice-core.c
>> @@ -580,7
On 1/15/2024 2:33 AM, Peter Xu wrote:
> On Fri, Jan 12, 2024 at 07:05:10AM -0800, Steve Sistare wrote:
>> Allow cpr-reboot for vfio if the guest is in the suspended runstate. The
>> guest drivers' suspend methods flush outstanding requests and re-initialize
>> the devices, and thus there is no
On 16/1/24 07:27, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Mon, Jan 15, 2024 at 05:39:19PM +, Peter Maydell wrote:
On Mon, 15 Jan 2024 at 13:54, Thomas Huth wrote:
On 12/01/2024 16.39, Philippe Mathieu-Daudé wrote:
Hi Thomas
+Laurent & Peter
On 12/1/24 11:00, Thomas
As I'm the addressee of the ping for some reason ... :-)
the fix looks good to me but I'm not sure about all the consequences of
moving kvm_put_vcpu_events() to an earlier stage. Max, Paolo, please
take a look!
Eiichi Tsukata writes:
> Ping.
>
>> On Nov 8, 2023, at 10:12, Eiichi Tsukata
Hi
On Mon, Jan 15, 2024 at 10:49 PM Stefan Hajnoczi wrote:
>
> On Fri, Jan 12, 2024 at 07:36:19PM +0900, Akihiko Odaki wrote:
> > Coroutine may be pooled even after COROUTINE_TERMINATE if
> > CONFIG_COROUTINE_POOL is enabled and fake stack should be saved in
> > such a case to keep
Based-on: <20240116003551.75168-1-...@linux.ibm.com>
([PATCH v3 0/3] linux-user: Allow gdbstub to ignore page protection)
v1: https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg02911.html
v1 -> v2: Avoid touching the system gdbstub.
Advertise QCatchSyscalls+ only on Linux.
Hi,
I
GDB supports stopping on syscall entry and exit using the "catch
syscall" command. It relies on 3 packets, which are currently not
supported by QEMU:
* qSupported:QCatchSyscalls+ [1]
* QCatchSyscalls: [2]
* T05syscall_entry: and T05syscall_return: [3]
Implement generation and handling of these
Check that adding/removing syscall catchpoints works.
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/multiarch/Makefile.target | 10 +++-
tests/tcg/multiarch/catch-syscalls.c | 51 ++
tests/tcg/multiarch/gdbstub/catch-syscalls.py | 52 +++
3
On 16/1/24 02:39, Bibo Mao wrote:
When compiling qemu with system KVM mode for LoongArch, header files
in directory linux-headers/asm-loongarch should be used firstly.
Otherwise it fails to find kvm.h on system with old glibc, since
latest kernel header files are not installed.
This patch adds
On Mon, Nov 27, 2023 at 05:26:01PM -0300, Fabiano Rosas wrote:
> Some functionalities of multifd are incompatible with the 'fixed-ram'
> migration format.
>
> The MULTIFD_FLUSH flag in particular is not used because in fixed-ram
> there is no sinchronicity between migration source and destination
Hi,
I want to improve the startup speed of Windows VM. On the x86
architecture, QEMU's Windows11 VM can enable the Fast startup function,
but it cannot work on the ARM architecture. By the way, the Fast startup
function of Windows on ARM physical machines can work normally.
Is there
On 16/01/2024 10.46, Philippe Mathieu-Daudé wrote:
On 16/1/24 07:27, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Mon, Jan 15, 2024 at 05:39:19PM +, Peter Maydell wrote:
On Mon, 15 Jan 2024 at 13:54, Thomas Huth wrote:
On 12/01/2024 16.39, Philippe Mathieu-Daudé wrote:
Hi
We can't directly save the ephemeral imatch from argv as that memory
will get recycled.
Message-Id: <20240103173349.398526-40-alex.ben...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
diff --git a/contrib/plugins/execlog.c
We can only request a list of registers once the vCPU has been
initialised so the user needs to use either call the get function on
vCPU initialisation or during the translation phase.
We don't expose the reg number to the plugin instead hiding it behind
an opaque handle. This allows for a bit of
From: Akihiko Odaki
This avoids optimizations incompatible when reading registers.
Signed-off-by: Akihiko Odaki
Reviewed-by: Pierrick Bouvier
Message-Id: <20240103173349.398526-37-alex.ben...@linaro.org>
Message-Id: <20231213-gdb-v17-12-777047380...@daynix.com>
Signed-off-by: Alex Bennée
On Thu, Dec 21, 2023 at 08:45:05AM -0500, Eric Auger wrote:
> We used to set default page_size_mask to qemu_target_page_mask() but
> with VFIO assignment it makes more sense to use the actual host page mask
> instead.
>
> So from now on qemu_real_host_page_mask() will be used as a default.
> To
On Tue, 16 Jan 2024 at 13:09, Jonathan Cameron
wrote:
>
> On Mon, 18 Dec 2023 11:32:57 +
> Peter Maydell wrote:
>
> > If FEAT_NV2 redirects a system register access to a memory offset
> > from VNCR_EL2, that access might fault. In this case we need to
> > report the correct syndrome
On 12/28/23 11:12, Alexander Ivanov wrote:
There is no necessity to search to the end of the bitmap. Limit the search
area as cluster_index + count.
Add cluster_end variable to avoid its calculation in a few places.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 9 +
1
On 12/28/23 11:12, Alexander Ivanov wrote:
In parallels_check_leak() we change file size but don't correct data_end
field of BDRVParallelsState structure. Fix it.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/block/parallels.c
On Tue, 16 Jan 2024 at 14:50, Jonathan Cameron
wrote:
>
> On Tue, 16 Jan 2024 13:20:33 +
> Peter Maydell wrote:
> > Bisecting to this patch is a bit weird because at this point
> > in the series emulation of FEAT_NV2 should be disabled and
> > the code being added should never be used. You
From: Inès Varhol
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
Message-id: 20240109194438.70934-4-ines.var...@telecom-paris.fr
Signed-off-by: Peter Maydell
---
From: Inès Varhol
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
Message-id: 20240109160658.311932-3-ines.var...@telecom-paris.fr
Signed-off-by: Peter Maydell
---
From: Samuel Tardieu
Signed-off-by: Samuel Tardieu
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Laurent Vivier
Message-id: 20240109184508.3189599-1-...@rfc1149.net
Fixes: ff68dacbc786 ("armv7m: Split systick out from NVIC")
Signed-off-by: Peter Maydell
---
hw/timer/trace-events | 2 +-
On Tue, 16 Jan 2024 14:59:15 +
Peter Maydell wrote:
> On Tue, 16 Jan 2024 at 14:50, Jonathan Cameron
> wrote:
> >
> > On Tue, 16 Jan 2024 13:20:33 +
> > Peter Maydell wrote:
> > > Bisecting to this patch is a bit weird because at this point
> > > in the series emulation of FEAT_NV2
Using fleecing backup like in [0] on a qcow2 image (with metadata
preallocation) can lead to the following assertion failure:
> bdrv_co_do_block_status: Assertion `!(ret & BDRV_BLOCK_ZERO)' failed.
In the reproducer [0], it happens because the BDRV_BLOCK_RECURSE flag
will be set by the qcow2
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 04:13:23AM -0500, Xiaoyao Li wrote:
> Date: Mon, 15 Jan 2024 04:13:23 -0500
> From: Xiaoyao Li
> Subject: [PATCH 0/2] i386/cpu: Two minor fixes for
> x86_cpu_enable_xsave_components()
> X-Mailer: git-send-email 2.34.1
>
> The two bugs were introduced when
On 12/28/23 11:12, Alexander Ivanov wrote:
In parallels_check_leak() file can be truncated. In this case the used
bitmap would not comply to the file. Recreate the bitmap after file
truncation.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 8
1 file changed, 8
On 12/28/23 11:12, Alexander Ivanov wrote:
All the checks were fixed to work with used bitmap. Create used bitmap in
parallels_open() even if need_check is true.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff
On Tue, 16 Jan 2024 13:20:33 +
Peter Maydell wrote:
> On Tue, 16 Jan 2024 at 13:09, Jonathan Cameron
> wrote:
> >
> > On Mon, 18 Dec 2023 11:32:57 +
> > Peter Maydell wrote:
> >
> > > If FEAT_NV2 redirects a system register access to a memory offset
> > > from VNCR_EL2, that access
We don't currently document the syntax of .hx files anywhere
except in a few comments at the top of individual .hx files.
We don't even have somewhere in the developer docs where we
could do this.
Add a new files docs/devel/docs.rst which can be a place to
document how our docs build process
From: Inès Varhol
Although very similar to the STM32F4xx EXTI, STM32L4x5 EXTI generates
more than 32 event/interrupt requests and thus uses more registers
than STM32F4xx EXTI which generates 23 event/interrupt requests.
Acked-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by:
From: Inès Varhol
The SYSCFG input GPIOs aren't connected yet. When the STM32L4x5 GPIO
device will be implemented, its output GPIOs will be connected to the
SYSCFG input GPIOs.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Arnaud Minier
Signed-off-by:
Improve the 'highmem' option docs to note that by default we assume
that a 32-bit kernel on an LPAE-capable CPU has LPAE enabled, and
what the consequences are.
Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
Reviewed-by: Eric Auger
Message-id:
From: Hao Wu
Change-Id: Id8a3461fb5042adc4c3fd6f4fbd1ca0d33e22565
Signed-off-by: Hao Wu
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
Message-id: 20240110234232.4116804-6-nabiheste...@google.com
Signed-off-by: Peter Maydell
Reviewed-by: Peter Maydell
---
include/hw/arm/npcm7xx.h |
This patch wires the PCI mailbox module to Nuvoton SoC.
Change-Id: I14c42c628258804030f0583889882842bde0d972
Signed-off-by: Hao Wu
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
Message-id: 20240110234232.4116804-3-nabiheste...@google.com
[PMM: moved some changes incorrectly in previous
From: Gavin Shan
It's found that some of the CPU type names in the array of valid
CPU types are invalid because their corresponding classes aren't
registered, as reported by Peter Maydell.
[gshan@gshan build]$ ./qemu-system-arm -machine virt -cpu cortex-a9
qemu-system-arm: Invalid CPU model:
In arm_pamax(), we need to cope with the virt board calling this
function on a CPU object which has been inited but not realize.
We used to do propagation of feature-flag implications (such as
"V7VE implies LPAE") at realize, so we have some code in arm_pamax()
which manually checks for both V7VE
On 12/28/23 11:12, Alexander Ivanov wrote:
Add a helper to set unused areas in the used bitmap.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 18 ++
block/parallels.h | 2 ++
2 files changed, 20 insertions(+)
diff --git a/block/parallels.c b/block/parallels.c
On Tue, 16 Jan 2024 at 14:16, sanjana gogte wrote:
>
> I hope this message finds you well. I am reaching out to seek your expertise
> regarding a persistent issue I have encountered while working with QEMU,
> specifically a hardfault error when emulating the MPS2AN505 with a Cortex-M33
> core.
On 12/28/23 11:12, Alexander Ivanov wrote:
In parallels_check_duplicate() We use a bitmap for duplication detection.
This bitmap is not related to used_bmap field in BDRVParallelsState. Add
a comment about it to avoid confusion.
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 5 -
Hi Jean,
On 1/16/24 13:53, Jean-Philippe Brucker wrote:
> On Thu, Dec 21, 2023 at 08:45:05AM -0500, Eric Auger wrote:
>> We used to set default page_size_mask to qemu_target_page_mask() but
>> with VFIO assignment it makes more sense to use the actual host page mask
>> instead.
>>
>> So from now
John Snow writes:
> differentiate between "actively in the process of checking" and
> "checking has completed". This allows us to clean up the types of some
> internal fields such as QAPISchemaObjectType's members field which
> currently uses "None" as a test for determining if check has been
tags/pull-target-arm-20240116
for you to fetch changes up to 7ec39730a9cc443c752d4cad2bf1c00467551ef5:
load_elf: fix iterator's type for elf file processing (2024-01-15 17:14:22
+)
target-arm queue:
* docs/devel/docs: Document
From: Nabih Estefan Diaz
- Created qtest to check initialization of registers in GMAC Module.
- Implemented test into Build File.
Change-Id: I8b2fe152d3987a7eec4cf6a1d25ba92e75a5391d
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
Message-id:
From: Inès Varhol
Acked-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
Message-id: 20240109194438.70934-2-ines.var...@telecom-paris.fr
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
docs/system/arm/b-l475e-iot01a.rst | 2 +-
From: Nabih Estefan Diaz
- Implementation of Receive function for packets
- Implementation for reading and writing from and to descriptors in
memory for Rx
When RX starts, we need to flush the queued packets so that they
can be received by the GMAC device. Without this it won't work
with TAP
This patch implements the basic registers of GMAC device and sets
registers for networking functionalities.
Tested:
The following message shows up with the change:
Broadcom BCM54612E stmmac-0:00: attached PHY driver [Broadcom BCM54612E]
(mii_bus:phy_addr=stmmac-0:00, irq=POLL)
stmmaceth
On Tue, 16 Jan 2024 at 15:29, Jonathan Cameron
wrote:
>
> On Tue, 16 Jan 2024 14:59:15 +
> Peter Maydell wrote:
>
> > On Tue, 16 Jan 2024 at 14:50, Jonathan Cameron
> > wrote:
> > >
> > > On Tue, 16 Jan 2024 13:20:33 +
> > > Peter Maydell wrote:
> > > > Bisecting to this patch is a bit
On 1/16/2024 10:19 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 04:13:23AM -0500, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 04:13:23 -0500
From: Xiaoyao Li
Subject: [PATCH 0/2] i386/cpu: Two minor fixes for
x86_cpu_enable_xsave_components()
X-Mailer: git-send-email 2.34.1
The two
Some ELF files really do have segments of zero size, e.g.:
Program Headers:
Type Offset VirtAddr PhysAddr
FileSizMemSiz Flags Align
RISCV_ATTRIBUT 0x25b8 0x 0x
Cc'ing Gerd & Marc-André for UI.
On 3/11/23 19:27, Peter Maydell wrote:
Convert the musicpal key input device to use
qemu_add_kbd_event_handler(). This lets us simplify it because we no
longer need to track whether we're in the middle of a PS/2 multibyte
key sequence.
In the conversion we
On Tue, 16 Jan 2024 at 16:08, Philippe Mathieu-Daudé wrote:
>
> On 12/1/24 17:54, Peter Maydell wrote:
> > On Mon, 8 Jan 2024 at 13:06, Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi Gerd,
> >>
> >> On 8/1/24 13:53, Philippe Mathieu-Daudé wrote:
> >>> From: Gerd Hoffmann
> >>>
> >>> Add an
On 12/1/24 14:15, Mark Cave-Ayland wrote:
This series contains fixes for the esp-pci device (am53c974 or dc390) for a
few issues spotted whilst testing the previous ESP series.
Patches 1-3 are fixes for issues found by Helge/Guenter whilst testing the
hppa C3700 machine with the amd53c974/dc390
From: Peng Fan
xen_invalidate_map_cache_entry is not expected to run in a
coroutine. Without this, there is crash:
signo=signo@entry=6, no_tid=no_tid@entry=0) at pthread_kill.c:44
threadid=) at pthread_kill.c:78
at /usr/src/debug/glibc/2.38+git-r0/sysdeps/posix/raise.c:26
Hi,
I want to improve the startup speed of Windows VM. On the x86 architecture,
QEMU's Windows11 VM can enable the Fast startup function, but it cannot work on
the ARM architecture. In addition, Windows can also enable the Fast startup
function on the ARM host.
Is there anything missing in
I hope this message finds you well. I am reaching out to seek your
expertise regarding a persistent issue I have encountered while working
with QEMU, specifically a hardfault error when emulating the MPS2AN505 with
a Cortex-M33 core.
I have been grappling with this issue for some time and am
On 12/28/23 11:12, Alexander Ivanov wrote:
Now we support extensions saving and can let to work with them in
read-write mode.
Signed-off-by: Alexander Ivanov
---
block/parallels-ext.c | 4
block/parallels.c | 17 -
2 files changed, 4 insertions(+), 17 deletions(-)
On 1/16/24 02:04, Philippe Mathieu-Daudé wrote:
Hi,
(Cc'ing Li, Strahinja and Niek)
On 15/1/24 19:27, Guenter Roeck wrote:
Add watchdog timer support to Allwinner-H40 and Bananapi.
The watchdog timer is added as an overlay to the Timer
module memory map.
I'm confused by these registers from
Hi!
I noticed that there are some error messages about a missing python module
in the "avocado-system-opensuse" QEMU CI job:
https://gitlab.com/qemu-project/qemu/-/jobs/5911721890#L191
Anybody interested in fixing those?
Thomas
On Mon, Jan 15, 2024 at 8:53 AM Markus Armbruster wrote:
>
> John Snow writes:
>
> > declare, but don't initialize the type of "type" to be QAPISchemaType -
>
> Declare
>
> > and allow the value to be initialized during check(). This creates a
> > form of delayed initialization for
On 12/1/24 17:54, Peter Maydell wrote:
On Mon, 8 Jan 2024 at 13:06, Philippe Mathieu-Daudé wrote:
Hi Gerd,
On 8/1/24 13:53, Philippe Mathieu-Daudé wrote:
From: Gerd Hoffmann
Add an update buffer where all block updates are staged.
Flush or discard updates properly, so we should never see
>> >
>> > Given that, an alternative proposal that I think would work
>> > for you would be to add a 'placeholder' memory node definition
>> > in SRAT (so allow 0 size explicitly - might need a new SRAT
>> > entry to avoid backwards compat issues).
>>
>> Putting all the PCI/GI/... complexity
Hi,
I want to improve the startup speed of Windows VM. On the x86 architecture,
QEMU's Windows11 VM can enable the Fast startup function, but it cannot work on
the ARM architecture. In addition, Windows can also enable the Fast startup
function on the ARM host.
Is there anything missing in
On 12/28/23 11:12, Alexander Ivanov wrote:
For parallels images extensions we need to allocate host clusters
without any connection to BAT. Move host clusters allocation code to
parallels_allocate_host_clusters().
This function can be called not only from coroutines so all the
*_co_* functions
From: Nabih Estefan Diaz
- Add PCS Register check to npcm_gmac-test
Change-Id: I34821beb5e0b1e89e2be576ab58eabe41545af12
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
Message-id: 20240110234232.4116804-11-nabiheste...@google.com
Signed-off-by: Peter Maydell
Reviewed-by: Peter
From: Inès Varhol
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Alistair Francis
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
Message-id: 20240109160658.311932-4-ines.var...@telecom-paris.fr
Signed-off-by: Peter Maydell
---
tests/qtest/stm32l4x5_exti-test.c | 524
From: Hao Wu
The PCI Mailbox Module is a high-bandwidth communcation module
between a Nuvoton BMC and CPU. It features 16KB RAM that are both
accessible by the BMC and core CPU. and supports interrupt for
both sides.
This patch implements the BMC side of the PCI mailbox module.
Communication
From: Anastasia Belova
j is used while loading an ELF file to byteswap segments'
data. If data is larger than 2GB an overflow may happen.
So j should be elf_word.
This commit fixes a minor bug: it's unlikely anybody is trying to
load ELF files with 2GB+ segments for wrong-endianness targets,
From: Nabih Estefan Diaz
- Implementation of Transmit function for packets
- Implementation for reading and writing from and to descriptors in
memory for Tx
NOTE: This function implements the steps detailed in the datasheet for
transmitting messages from the GMAC.
Added relevant trace-events
From: Hao Wu
This patches adds a qtest for NPCM7XX PCI Mailbox module.
It sends read and write requests to the module, and verifies that
the module contains the correct data after the requests.
Change-Id: I2e1dbaecf8be9ec7eab55cb54f7fdeb0715b8275
Signed-off-by: Hao Wu
Signed-off-by: Nabih
On Tue, Jan 16, 2024 at 2:22 AM Markus Armbruster wrote:
>
> John Snow writes:
>
> > On Mon, Jan 15, 2024 at 8:16 AM Markus Armbruster wrote:
> >>
> >> John Snow writes:
> >>
> >> > Include entities don't have names, but we generally expect "entities" to
> >> > have names. Reclassify all
On Mon, 2 Oct 2023 17:12:43 +0100
Salil Mehta wrote:
> Hi Gavin,
>
> > From: Gavin Shan
> > Sent: Wednesday, September 27, 2023 7:29 AM
> > To: Salil Mehta ; qemu-devel@nongnu.org; qemu-
> > a...@nongnu.org
> > Cc: m...@kernel.org; jean-phili...@linaro.org; Jonathan Cameron
> > ;
On 13/1/24 14:36, Peter Maydell wrote:
On Wed, 10 Jan 2024 at 19:53, Philippe Mathieu-Daudé wrote:
Since v2 [2]:
- Dropped "Simplify checking A64_MTE bit in FEATURE_ID register"
- Correct object_property_get_bool() uses
- Update ARM_FEATURE_AARCH64 && aa64_mte
Since RFC [1]:
- Split one
On Mon, Jan 15, 2024 at 08:12:29AM -0800, Guenter Roeck wrote:
> On 1/15/24 03:02, Philippe Mathieu-Daudé wrote:
> > On 13/1/24 20:16, Guenter Roeck wrote:
> > > If machine USB support is not enabled, create unimplemented devices
> > > for the USB memory ranges to avoid crashes when booting Linux.
From: Akihiko Odaki
Align the parameters of gdb_get_reg_cb and gdb_set_reg_cb with the
gdb_read_register and gdb_write_register members of CPUClass to allow
to unify the logic to access registers of the core and coprocessors
in the future.
Signed-off-by: Akihiko Odaki
Reviewed-by: Alex Bennée
This makes them a bit more visible in the TCG emulation menu rather
than hiding them away bellow the ToC limit.
Message-Id: <20240103173349.398526-43-alex.ben...@linaro.org>
Reviewed-by: Pierrick Bouvier
Signed-off-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
diff --git
From: Akihiko Odaki
Now we know all instances of GDBFeature that is used in CPU so we can
traverse them to find XML. This removes the need for a CPU-specific
lookup function for dynamic XMLs.
Signed-off-by: Akihiko Odaki
Reviewed-by: Alex Bennée
Message-Id:
From: Akihiko Odaki
This function is no longer used.
Signed-off-by: Akihiko Odaki
Reviewed-by: Alex Bennée
Message-Id: <20240103173349.398526-35-alex.ben...@linaro.org>
Message-Id: <20231213-gdb-v17-9-777047380...@daynix.com>
Signed-off-by: Alex Bennée
diff --git a/include/hw/core/cpu.h
From: Akihiko Odaki
GDBFeature has the num_regs member so use it where applicable to
remove magic numbers.
Signed-off-by: Akihiko Odaki
Message-Id: <20240103173349.398526-34-alex.ben...@linaro.org>
Message-Id: <20231213-gdb-v17-8-777047380...@daynix.com>
Signed-off-by: Alex Bennée
diff --git
On 1/8/24 21:26, David Woodhouse wrote:
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/arm/aspeed.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index cc59176563..bed5e4f40b 100644
--- a/hw/arm/aspeed.c
+++
Peter Xu writes:
> On Mon, Nov 27, 2023 at 05:25:55PM -0300, Fabiano Rosas wrote:
>> Allow multifd to open file-backed channels. This will be used when
>> enabling the fixed-ram migration stream format which expects a
>> seekable transport.
>>
>> The QIOChannel read and write methods will use
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